Thursday, August 1, 2024
AVS ALD/ALE conference returns to Helsinki after 20 years to celebrate 50 years of ALD!
Thursday, July 18, 2024
Chipmetrics Launches New Test Chips for Advanced Atomic Layer Processes
Thursday, July 11, 2024
Tokyo Electron Introduces Acrevia Tool to Enhance EUV Lithography
Tokyo Electron has introduced Acrevia, a state-of-the-art gas cluster beam (GCB) system aimed at refining patterns created by EUV lithography. This advanced tool is set to reduce the necessity for EUV double patterning, thereby improving chipmaking yields and lowering production costs. Acrevia addresses critical challenges such as line edge roughness (LER), a common issue in lithography that affects the precision of pattern edges and overall chip performance. By optimizing pattern sidewalls through precise etching, Acrevia promises to significantly enhance within-wafer uniformity and mitigate LER, contributing to higher yield and better chip reliability. While not replacing High-NA EUV lithography, Acrevia marks a substantial leap forward in semiconductor manufacturing innovation.
Sources:
Chipmetrics' Metrology Workshop
Sunday, June 16, 2024
Boosting the Future: Increased ALD Use Paves the Way for Advanced GAAFET Technology
The Biden administration is considering a complete ban on the export of chips utilizing Gate All-Around Field Effect Transistor (GAAFET) technology to China, Bloomberg reports (LINK). The rationale behind this potential ban is the concern that such advanced transistors could be leveraged for military applications and artificial intelligence (AI) advancements by China. This move follows previous restrictions from 2022, when the U.S. barred its Electronic Design and Automation (EDA) companies from selling tools necessary for GAAFET development to China. In addition, advanced chip exports from companies like Nvidia were restricted, with these measures being progressively tightened and expanded over time.
Atomic Layer Deposition (ALD) is celebrating its 50th anniversary in 2024. The anniversary marks 50 years since Dr. Tuomo Suntola and his colleagues filed the first patent for Atomic Layer Epitaxy in 1974, which laid the foundation for ALD technology. This milestone will be celebrated at various events, including the ALD 2024 conference, where Dr. Suntola is expected to deliver the opening remarks .
The production of GAAFETs requires a significant increase in the use of ALD technology - maybe up to 40% more according to ASM. ALD is essential for creating the ultra-thin, uniform films needed for GAAFET structures, ensuring high-quality, defect-free layers that are critical for advanced transistor performance. This technology enables precise control over the deposition process, crucial for developing high-k dielectrics and other materials that enhance GAAFET performance and efficiency. As the semiconductor industry now transitions from FinFET to GAAFET technology, leveraging ALD's capabilities is vital for maintaining and advancing Moore's Law, enabling more powerful and energy-efficient chips using existing manufacturing infrastructure
Applied Materials has outlined next-generation tools essential for producing 3nm and GAA transistors, such as those in Samsung's upcoming 3GAE and 3GAP technologies. These advanced tools address the complexities of GAA transistor manufacturing, including precise lithography, epitaxy, and selective materials removal. Applied's Producer Selectra Selective Etch IMS tool is pivotal in defining channel width without damaging surrounding materials, while the Centura Prime Epi tool ensures clean deposition of Si and SiGe nanosheets. Additionally, their Integrated Materials Solution (IMS) systems integrate atomic layer deposition (ALD), thermal steps, and plasma treatments to optimize the gate oxide stack, enhancing performance and reducing gate leakage. These innovations are crucial as they enable higher performance, lower power consumption, and greater transistor density, aligning with the industry's move from FinFET to GAA technology.
Today GAA transistors are currently in mass production only by Samsung, which offered the technology to customers with its 3-nanometer process in 2022. Intel is set to follow, producing GAAFET on its 2-nanometer process expected to be available in its products later this year. TSMC, the market leader, plans to introduce GAAFET with its own 2 nm process in 2025. The GAAFET technology itself is not inherently suited for AI or military applications but represents an evolution in transistor design, enabling denser packing of transistors as lithography equipment and manufacturing processes advance. This technology shift, akin to transitioning to a new node, typically results in either reduced power consumption or improved performance by 15-25%.
The improvements facilitated by GAAFET could significantly enhance the capabilities available to China. SMIC, China's largest contract manufacturer, currently produces chips on a 7 nm process and is believed to be capable of reaching at least 5 nanometers with existing tools. The combination of this process with GAAFET could theoretically prevent China from falling too far behind Western advancements. However, China has been effectively shut out from developing GAAFET using tools from leading EDA companies, all of which are American. Additionally, the Dutch company ASML, dominant in the lithography equipment market, has not sold its EUV (Extreme Ultraviolet) machines to China and faced further restrictions in 2023 on selling its advanced DUV (Deep Ultraviolet) equipment. In April 2024, ASML took another step in the tech war against China by announcing that it would no longer service existing equipment in China, potentially crippling the country's semiconductor manufacturing capabilities. The specific details of the new export bans are still unclear, but Reuters notes that initial proposals have faced criticism from the U.S. semiconductor industry for being overly broad and extensive.
Source: USA överväger ytterligare GAAFET-sanktioner mot Kina – Semi14, www.ASM.com, Applied Materials Outlines Next-Gen Tools for 3nm and GAA Transistor Era (anandtech.com), Atomic layer deposition, next-gen transistors, and ASM (techfund.one)
ASML Unveils Hyper-NA EUV: Pioneering New Frontiers in Chip Innovation and Efficiency
Monday, June 10, 2024
Air Liquide signed major contract to support the semiconductor industry in the U.S. with an investment of more than 250 million dollars
Air Liquide has announced a significant investment exceeding $250 million to construct a new industrial gas production facility in Idaho, USA. This plant will supply ultra-pure nitrogen and other essential gases to Micron Technology, Inc., a leading semiconductor manufacturer, as well as other local customers. The facility, part of a long-term contract, will play a crucial role in the production of memory chips and is expected to be operational by the end of 2025. This project will generate hundreds of jobs during both the construction and operational phases and is designed to be highly efficient, incorporating digital technologies and modularization to ensure reliability and quick delivery.
Matthieu Giard, Chief Executive Officer of Americas for the Air Liquide Group, said
We are pleased to further strengthen our 30 year-long partnership with Micron Technology. Our partner’s trust in Air Liquide reinforces our position in the Electronics industry as a technology leader with strong innovation capabilities. This investment will support the production of leading-edge memory chips, notably to meet the growing demand for computing capacities required by Artificial Intelligence. This contract illustrates our strategy to further accompany our customers in their development, including in the U.S. The Electronics activity is a strong driver of our 2025 strategic plan ADVANCE, which closely links financial and extra-financial performances.
This initiative exemplifies Air Liquide's commitment to technological advancement and environmental sustainability in the semiconductor sector. The new production unit will be 5% more power-efficient than previous generations and aims to use 100% renewable energy within five years. Matthieu Giard, CEO of Americas for Air Liquide, highlighted the long-standing partnership with Micron Technology and the strategic importance of this investment in supporting the demand for advanced memory chips, driven by the rise of artificial intelligence. Scott Gatzemeier of Micron Technology emphasized the project’s role in enhancing the U.S. semiconductor supply chain, driving significant growth in domestic material sourcing, and bolstering the semiconductor ecosystem across the country.
NCD Co., Ltd. has supplied ALD equipment for manufacturing perovskite solar cells to Korea Electric Power Corporation
About NCD Co., Ltd:
NCD Co., Ltd. is a rapidly growing Korean company specializing in the development and manufacturing of ALD (Atomic Layer Deposition) and CVD (Chemical Vapor Deposition) equipment. Founded in 2010 and based in Daejeon, NCD focuses on providing advanced equipment, process development, coating services, and consulting for industries such as solar cells and OLED displays. Their innovative solutions aim to enhance efficiency and productivity in high-volume manufacturing.
For more information, visit their official website: NCD Tech.
Saturday, June 8, 2024
Jusung Engineering to Spin Off Semiconductor Business, Aiming for Market Revaluation and Strategic Growth
Jusung Engineering, a a first in Korea’s chipmaking equipment industry, has announced a significant restructuring aimed at enhancing its market valuation and navigating geopolitical risks. The company will spin off its highly successful semiconductor division into a new entity, marking a strategic move to unlock greater value for its shareholders and position itself for future growth.
Chairman Hwang Chul-ju highlighted the undervaluation of Jusung despite its proprietary technologies and leading market position. By creating a new entity for its semiconductor business, Jusung aims to elevate its market cap, which currently lags behind international competitors. The new semiconductor entity, tentatively named Jusung Engineering, will operate independently, allowing it to focus solely on expanding its technological capabilities and market presence.
The spin-off comes as Jusung's semiconductor division continues to excel with its advanced film deposition technologies, including selective semi-spheric silicon deposition and atomic layer deposition (ALD). These technologies are pivotal in the production of DRAM memory, NAND flash, and logic chips. As the demand for more integrated and smaller semiconductor devices grows, Jusung's ALD equipment is set to become increasingly crucial. Additionally, Jusung’s poly etchers, applicable across various semiconductor products, will play a significant role in diversifying the company’s offerings.
Despite achieving annual sales of 200 billion won ($146 million) and holding a market cap of 1.6 trillion won, Jusung's valuation remains significantly lower than its global peers. For instance, Dutch competitor ASM boasts a market cap of 47.3 trillion won. The spin-off is expected to narrow this gap, potentially achieving comparable sales records within five years.
The decision also aims to mitigate risks from the ongoing US-China rivalry. By separating the semiconductor business, Jusung can better shield its other divisions, including display and solar panel equipment, from potential geopolitical fallout. This strategic insulation ensures that the company’s diverse operations remain resilient in the face of international tensions.
There is speculation about Hwang Eun-seok, the chairman’s son, taking the helm of the new semiconductor entity. With a doctorate in material science and experience at Samsung Semiconductors, Eun-seok is well-prepared for leadership, though Chairman Hwang emphasizes that any succession will be merit-based.
Jusung Engineering's spin-off of its semiconductor business represents a bold move to enhance its market valuation and strategically position itself for sustained growth. By creating a focused, independent entity, Jusung aims to capitalize on its technological strengths and navigate the complexities of the global semiconductor market more effectively. This restructuring is set to unlock new opportunities and reinforce Jusung's standing as a key player in the tech industry.
Sources: Jusung, Undervalued no more: Jusung Engineering to spin off chip business (naver.com)
Thursday, April 25, 2024
Fundamentals of ALD course – 6-7 June 2024, University of Bath, UK
The "Fundamentals of ALD" course, scheduled for June 6-7, 2024 at the University of Bath, UK, targets newcomers and professionals seeking to deepen their understanding of atomic layer deposition (ALD). It will cover the theoretical and practical aspects of ALD, including surface chemistry, process configurations, reactor design, and material properties. Professors Gregory Parsons, Seán Barry, and Erwin Kessels will lead the course, offering both foundational insights and advanced techniques relevant to laboratory and industrial applications.
The course will run from noon-to-noon across two days, featuring seven detailed lectures interspersed with Q&A sessions and a mixer event on the first evening. Registration is open until May 24, 2024, with fees varying for industry professionals, academia members, and students. The event will take place in the “6 West South” building at the University of Bath, and participants are advised to arrange their own accommodation, with several hotel suggestions provided near the venue.
Link: Fundamentals of ALD course – 6-7 June 2024, University of Bath, UK – ALDAcademy
ASM a revenue of €639 million Q12024 - driven significantly by sales in Atomic Layer Deposition (ALD) and Epitaxy (Epi) technologies.
The company reported a revenue of €639 million, at the upper end of their guidance, driven significantly by sales in Atomic Layer Deposition (ALD) and Epitaxy (Epi) technologies.
- Gross margin increased to 52.9%, largely due to strong sales performance in the Chinese market.
- New orders reached €698 million, marking a 10% increase from the previous year, mainly driven by the foundry sector. The company expects continued demand for gate-all-around technology, with significant orders anticipated in the second half of the year.
- Despite a slowdown in certain segments like power/analog/wafer, ASM International maintains a strong financial position with a cash reserve of €720 million at the end of the quarter. Sales in China are expected to remain robust.
Wednesday, April 24, 2024
Samsung Sets New Industry Standard with 290-Layer V9 NAND employing mutli stack etch - Plans for 430-Layer Chips
Samsung Electronics has initiated mass production of its 9th-generation 1Tb TLC vertical NAND (V-NAND), marking a significant advancement in memory technology. This new generation features the smallest cell size yet, improving bit density by approximately 50% over the previous generation. Innovations like cell interference avoidance and life extension techniques have been introduced to enhance reliability and product quality. By eliminating dummy channel holes, Samsung has also effectively reduced the memory cells' planar area, further emphasizing their commitment to leading the high-density, high-performance solid-state drive (SSD) market, particularly for AI applications.
One standout feature of the 9th-generation V-NAND is Samsung's advanced "channel hole etching" technology. This process involves stacking mold layers and simultaneously drilling through them, allowing for the creation of electron pathways through the industry's highest cell layer count in a double-stack structure. As the number of layers increases, so does the complexity of the etching process, necessitating more sophisticated techniques to efficiently pierce through these higher numbers. This technology not only showcases Samsung's process capabilities but also maximizes fabrication productivity, cementing its position as a leader in the SSD market.
According to Golem, Samsung's latest QLC-V9 memory chip outpaces its competitors in the NAND flash market with a groundbreaking 280-layer configuration that enhances SSD capacity, cost-efficiency, and speed. With a storage density of 28.5 GBit/mm², Samsung surpasses major rivals like YMTC and Micron, who report densities of 20.63 and 19.5 GBit/mm² respectively, and even outperforms Intel's upcoming 192-layer PLC-NAND. This technical superiority not only sets a new benchmark for memory chip performance but also enables Samsung to potentially introduce the first 8 TB single-sided M.2 SSDs, a significant advancement over current double-sided designs. The increase in interface speed to 3.2 GBit/s from the previous 2.4 GBit/s promises enhanced read speeds close to those of high-end SSDs, although improvements in write speed are yet to be detailed.
Market share, Q4 2023 (TrendForce)
Samsung Electronics is set to escalate its lead in the NAND flash memory market by starting mass production of its 290-layer ninth-generation (V9) vertical NAND chips, which promise enhanced performance for enterprise servers and AI and cloud devices. Building on its dominance since 2002, Samsung is also planning to introduce even more advanced 430-layer NAND chips next year to meet the growing demand for high-performance and large storage solutions in the AI era. This move is part of a broader competitive landscape where major chipmakers like SK Hynix and YMTC are also pushing forward with high-density NAND products, with SK Hynix planning to start producing 321-layer NAND chips early next year and YMTC set to unveil 300-layer chips later this year. Samsung's aggressive investment in NAND technology aims to develop chips with over 1,000 layers by 2030, highlighting the intensifying race among global chipmakers to innovate in chip stacking technology to cut costs and improve performance.
Sources:
Rekord bei Speicherdichte: Samsungs QLC-V9-Speicherchip schlägt alle Konkurrenten - Golem.de
Samsung to produce 290-layer V9 NAND to win chip stacking war - KED Global
Monday, April 22, 2024
Linköping University Researchers Pioneer the Synthesis of 'Goldene - a Monolayer Gold Material
Researchers form Linköping University, Sweden, publish a novel method for synthesizing "goldene," a monolayer of gold, achieved by etching away Ti3C2 from a nanolaminated Ti3AuC2 structure using a hydrofluoric acid-free process. The Ti3AuC2 was initially formed by substituting Si in Ti3SiC2 with Au, utilizing a unique aspect of MAX phases—materials characterized by their layered structures and the ability to etch away specific layers. This process not only highlights a new avenue in the synthesis of 2D materials but also overcomes the limitations of previous methods that often required more complex and less environmentally friendly chemicals. The resulting goldene exhibits a lattice contraction of about 9% compared to bulk gold, confirmed via electron microscopy, with further characterization showing an increase in the Au 4f binding energy by 0.88 eV, suggesting altered electronic properties.
The practical implications of goldene extend to various advanced technological applications. Its high surface-area-to-volume ratio, a characteristic of two-dimensional materials, could significantly enhance its catalytic and electronic properties. Applications in fields such as electronics, catalysis, and medicine are discussed, with potential uses ranging from improved catalytic converters to novel approaches in cancer treatment through photothermal therapies. The intrinsic stability of goldene, supported by ab initio molecular dynamics simulations, suggests that despite some physical challenges like curling and agglomeration, the material holds substantial promise for the development of next-generation devices and systems.
The production of atomically thin gold layers in the past typically involved methods that produce few atoms in thickness rather than true monolayers and often required complex supporting substrates or matrices to stabilize the gold layer. The method of exfoliating gold from a nanolaminated MAX phase as described in the publication is a novel approach, potentially opening new pathways for the production and application of gold in nanotechnology and materials science.
Schematic illustration of the preparation of goldene. (From: Synthesis of goldene comprising single-atom layer gold),
The production process of goldene is scalable and could potentially be adapted for the synthesis of other non-van der Waals 2D materials. The study outlines further research avenues, including the exploration of different etching schemes and surfactants to enhance the stability and yield of the synthesized layers. The success in manipulating the atomic structure of gold at such a fundamental level not only paves the way for innovative applications but also deepens our understanding of material science at the atomic scale, opening doors to new research in 2D material science.
Source: Synthesis of goldene comprising single-atom layer gold | Nature Synthesis
Friday, April 19, 2024
Intel's Strategic Leap with 14A Node and DSA: Pioneering Next-Gen Semiconductor Manufacturing
Semi Analysis recently published a deeper dive into of Directed Self Assembly (DSA) and prospects of Intel using it at their 14A node (Link below). Intel's latest efforts in semiconductor manufacturing have brought considerable attention to its 18A node, yet it's the 14A node that is most important according to the analysis for the success of Intel Foundry's IDM 2.0 strategy. While the industry watches the ongoing discussions around the merits of TSMC's N2 and Intel’s 18A technologies, Intel is quietly setting a foundational stage with its 14A node, aiming to solidify customer trust and secure critical, high-value chip projects for the future. A key element in Intel's strategy may be the adoption of DSA that could significantly reduce lithography costs. DSA utilizes the self-organizing properties of block copolymers (BCPs) that assemble into predetermined patterns when guided by an underlying template. This approach promises to lower the doses required in extreme ultraviolet (EUV) lithography, allowing for more efficient patterning at reduced costs.
It is well known that Intel plans to be the first major company to implement ASML’s high-NA EUV lithography scanners in high volume, despite the higher costs associated with single exposure high-NA systems compared to low-NA double patterning. It was also recently reported on X and other places that ASML is delivering a High-NA System to another player. SemiAnalysis argues that, the economic challenge posed by high-NA technology is addressed through the integration of DSA, which can improve the final pattern quality and dramatically reduce the necessary dose, thus potentially making high-NA economically more viable.
The benefits of DSA are significant:
- The ability to produce finer features with lower line edge roughness and increased throughput, thanks to its ability to heal discrepancies in the EUV guide patterns.
- Substantial cost savings and improved yield, especially for layers critical to the performance of advanced logic chips (bigger dies like AI accelerators).
However, DSA's integration into a commercial manufacturing environment is not without risks. The risks associated with Intel's adoption of DSA include:
- The primary risk with any new patterning technology is defectivity, for DSA it is linked to the chemical purity of the block copolymers (BCP). Synthesizing BCP to extremely high purities is challenging, and any inhomogeneity directly impacts the critical dimension (CD), leading to defects. Trace metals need to be below 10 parts-per-trillion, and filtering out organic impurities is difficult, impacting the viability of DSA for mass production. My assessment - Expect this to come from a MERCK or a Japanese chemical vendor.
- DSA is inherently limited to producing 1D line/space patterns or contact hole arrays, restricted to a single pitch per layer. This complicates the integration with other process technologies that might require more diverse patterning capabilities. However, these issues have potential solutions similar to those used in multi-patterning schemes.
- Despite the theoretical benefits and recent advances in DSA, it remains largely untested in high-volume, leading-edge manufacturing. Intel is pioneering the use in high-NA scenarios, but the broader adoption across the industry, including by competitors like TSMC who are also developing DSA, remains uncertain.
Source: Intel’s 14A Magic Bullet: Directed Self-Assembly (DSA) (semianalysis.com)
So let´s do the Patbase Test - how does this hold out if we dig into historical and current patent filing by the suspects!
Yes indeed, we have seen much increased filing the past decade or so representing a typical hype cycle. The hype cycle is a model developed by Gartner that describes the progression of a technology from inception to widespread adoption and maturity. It typically consists of five phases: the Technology Trigger, Peak of Inflated Expectations, Trough of Disillusionment, Slope of Enlightenment, and Plateau of Productivity. So for DSA in semiconductor manufacturing, the technology first garnered attention when its potential applications in advanced lithography were identified (2000-2010), marking the Technology Trigger. Interest surged about 2011, leading to a Peak of Inflated Expectations around 2016/2017, evidenced by a spike in patent filings as companies raced to capitalize on the emerging technology. However, as practical and economic challenges such as defectivity and integration complexities became evident, the enthusiasm waned, and DSA entered the Trough of Disillusionment. During this phase, the technology's limitations led to a decline in interest as initial expectations were not met. Over time, as more sustainable applications and improvements are developed, DSA may progress into the Slope of Enlightenment, where understanding and optimization occur as described in the assessment by SemiAnalysis, before finally reaching the Plateau of Productivity in the years to come, where it becomes a standard part of semiconductor manufacturing processes. This progression through the hype cycle reflects the typical maturation path of innovative technologies in the industry. Please note that there is a delay in patent filing data of up to 18 months so 2022, 2023 and 2024 are not complete yet.
Patent filing since 2000 in DSA (Patbase, 2024-04-19)
2. Yes, Intel is actively filing DSA patents and in the lead, and so is TSMC, along with other key players in the ecosystem. Over the past decade, the pattern of DSA patent filings has been quite revealing. Initially, GlobalFoundries and IBM in Upstate New York were early filers. GlobalFoundries ceased their filings around the time they decided not to pursue 7 nm and nodes below. IBM also stopped filing after completing their 2 nm demonstration on 300 mm wafers in 2021. Main contenders Intel and TSMC have been consistently filing DSA patents throughout the hype cycle and have continued to do so. Notably, there has been a clear acceleration in Intel's patent filings since 2019, although there was a slight drop during the COVID-19 lockdowns. Looking at chemical suppliers, Merck has taken the lead, with increased filings beginning in parallel with Intel from 2019 onwards, and accelerating until today. Other suppliers such as JSR, Shin-Etsu, and Brewer Science are also active in the DSA space. In the segment of wafer equipment OEMs, Tokyo Electron and SCREEN have been dominant. However, SCREEN appears to have recently exited the game.
In Summary - good assessment by SemiAnalysis and i passes the Patbase Test!
Monday, April 15, 2024
Ahead of the 50 Years of ALD celebration in Helsinki, learn about the origins, growth and future of the AVS ALD Conference with Greg Parsons and Steve George

A New Zr Precursor Enhances Wafer-Scale Zirconium Dioxide Films
A new class of Zirconium (Zr) precursor, featuring boratabenzene ligand, has been developed by a team led by Mohd Zahid Ansari at Yeungnam University, enabling the production of highly conformal ZrO2 thin films via Atomic Layer Deposition (ALD). This innovation, detailed in a recent study published in Science Advances, uses tris(dimethylamido)dimethylamidoboratabenzene zirconium and oxygen as reactants to achieve amorphous ZrO2 films at temperatures ranging from 150–350 °C on SiO2/Si substrates.
The new approach decouples the conventional ALD process, enhancing the deposition temperature window and achieving a growth per cycle of 0.87 Å, which surpasses previous methods using different Zr precursors. The films exhibit extreme conformality with complete step coverage, even on substrates with complex topographies, marking a significant advancement in semiconductor fabrication.
SK hynix to Lead in Advanced DRAM Production, Overtaking Samsung with Earlier Start
Korean SK hynix is set to initiate mass production of its advanced 6th generation 10nm class DRAM (node 1c) in the third quarter of this year, ahead of its competitor Samsung Electronics. The move positions SK hynix to potentially lead in the DDR5 server memory market, which is needed for data centers operated by major tech companies. SK hynix has outlined a strategic internal roadmap that includes achieving necessary customer certifications in anticipation of a surge in demand, especially following compatibility approval with Intel's server platforms. This certification is crucial as Intel holds a dominant share in the global server CPU market.
The DDR5 DRAM from SK hynix is designed to be compatible with Intel CPUs, a significant advantage given Intel’s extensive market presence. Meanwhile, Samsung plans to start its mass production of similar DRAM by the end of the year, having shared its development roadmap at the recent MemCon 2024 conference. Both companies are using leading-edge Extreme Ultraviolet (EUV) lithography in their processes, which enhances chip yield and power efficiency over previous generations.
SK hynix's new M16 DRAM plant in Icheon, Gyeonggi Province / Courtesy of SK hynix
Sunday, April 14, 2024
Hanwha to supply ALD Equipment for Molybdenum Deposition for Memory Applications
According to Korean media, Hanwha Precision Machinery is developing a new type of thermal atomic layer deposition (ALD) equipment for depositing molybdenum, which is emerging as a superior material for metal gates in next-generation semiconductors due to its lower resistivity and lack of fluoride residue. The new technology, still in the prototype stage and expected to take three years to commercialize, uses molybdenum dichloride dioxide (MoO2Cl2) as a precursor. This initiative marks Hanwha's expansion into the semiconductor fabrication equipment market, collaborating with industry giants like SK Hynix on future projects, including the development of hybrid bonding equipment for high bandwidth memory production.
At two recent conferences, EFDS ALD For Industry and CMC 2024 this week in Phoenix, Air Liquide presented HVM ready solution for MoO2Cl2 sub fab delivery. They also confirmed that it is already in HVM. Other sources claim that Mo is also in HVM for DRAM. However, no reverse engineering is publicly available as of to day.
Apple Partners with Taiwanese Largan to Advance iPhone Camera Plastic Lenses Using ALD Technology - Updated
Apple has been replacing the glass lenses in future iPhone cameras with advanced plastic lenses that have successfully passed customer testing. Two years prior, Apple's supplier Largan invested heavily in ALD (Atomic Layer Deposition) deposition machines specifically for this purpose, costing over $13.9 million each. This investment paid off with significant business from the coating of lenses for the iPhone 15 series, which introduced a periscope lens in its Pro model—a first for iPhones.
Looking ahead, there's anticipation that these new plastic lenses might feature in the iPhone 16 or 17. Largan's chairman, Lin Enping, confirmed the successful testing of a new plastic film, though it remains uncertain if it will be ready for the next iPhone release. This transition to plastic could potentially enhance camera durability, particularly by reducing lens flare and protecting the lenses from damage in case of a fall.
Speculation abounds that Apple might be the customer Lin referred to, although he did not specify. Market analysts highlight that a move to plastic lenses would not only signify a significant technological shift but also align with Apple's ongoing innovation in camera technology.
Update: Apple has used plastic lenses up to and including the iPhone 15 line-up – with one exception. The tetraprism lens used in the iPhone 15 Pro Max is a glass-plastic hybrid known as 1G3P – that is, one glass element, three plastic. This is a compromise designed to bring some of the quality gain from a glass element, without the disadvantages of an all-glass design. Many of the elements in a lens are there purely to correct for various types of distortion. Using at least one glass element eliminates some of those distortions, allowing for fewer elements. Apple's Glass And Plastic Hybrid Lens In The iPhone 15 Pro Max Will Spark A Trend For The Competition To Follow (wccftech.com)
The iPhone 16 Pro is tipped to receive the 5x optical zoom tetraprism lens currently available only on the largest iPhone 15 Pro Max model. This lens will bring Apple’s current most powerful zoom capabilities to the smaller of the two Pro models. However, according to another rumor from last year, the iPhone 16 Pro Max may pull ahead again with an even stronger “ultra-long” telephoto camera. New Apple Leak Reveals Major iPhone 16 Pro Camera Upgrade (forbes.com)
Largan Precision Co., Ltd., based in Taiwan, is a leading manufacturer of optical lens modules, primarily for smartphones and cameras. Renowned for supplying high-quality camera lenses for Apple's iPhone, Largan specializes in high-end lens modules. The company has invested heavily in advanced technologies such as atomic layer deposition (ALD) to enhance lens durability and image quality. Largan's significant production capacity and commitment to innovation make it a key player in the optics industry, pivotal in advancing smartphone camera technology. This role is critical for meeting the high demands of major smartphone manufacturers like Apple.
Kokusai Electric Showcased Batch ALD Technology for 40-28nm Nodes at SEMICON China 2024
At SEMICON China 2024, Kokusai Electric Corporation emphasized its strengths in atomic layer deposition (ALD) technology. The company showcased its batch-type ALD systems, which are particularly adept at achieving high-quality, uniform film deposition on multiple wafers simultaneously. This technology ensures excellent film thickness control and good step coverage, crucial for advanced semiconductor manufacturing. As the Chinese market increasingly transitions from chemical vapor deposition (CVD) to ALD due to its precision, Kokusai is poised to meet this rising demand, especially in fields like 3D stacking and miniaturization.
Kokusai highlighted its ALD technology specifically for mature semiconductor technology nodes in the 40 to 28nm range at SEMICON China 2024. This focus addresses the growing demand for precise film quality in these specific nodes within the Chinese market.