Decoupling from Dependence: The Global Semiconductor Industry Races to Diversify Amid Geopolitical Risks

The semiconductor industry is at a critical juncture, driven by the dual pressures of rising demand for advanced chips in artificial intelligence (AI) and the urgent need to mitigate geopolitical vulnerabilities. With Taiwan’s fabs, particularly TSMC, supplying over 90% of the world’s cutting-edge semiconductors, nations are rapidly investing in new fabs to reduce reliance on both Taiwan and China. While TSMC, Samsung, and Intel lead efforts to expand capacity in regions like the US, Europe, and Japan, these initiatives fall short of replacing Taiwan’s unparalleled output of 2 nm and below chips by 2030. Simultaneously, China’s struggle to compete at leading-edge nodes, compounded by export restrictions on critical tools, further underscores the fragility of the global semiconductor supply chain. These dynamics signal a transformative era as the free world works to establish more resilient and geographically diversified semiconductor ecosystems.

According to a recent article by FT (Source), the primary drivers for 2 nm technology development are the surging demand for custom and specialized chips, particularly in artificial intelligence (AI), and the need to create competitive alternatives to current large-scale semiconductor manufacturers. Rapidus, for instance, is targeting a niche in the AI market by producing bespoke chips that prioritize efficiency and can outperform more generic chips, such as those produced by Nvidia, in specific applications.

The motivation also includes addressing capacity limitations from dominant players like TSMC, which prioritizes large orders. Rapidus sees an opportunity to capture smaller customers who are willing to pay a premium for speed and customization. Additionally, geopolitical factors are influencing the push for advanced technology, with Japan aiming to reduce reliance on Taiwan's semiconductor manufacturing expertise and establish its own ecosystem for leading-edge production. 

This is why the semiconductor industry is advancing rapidly toward 3 nm and 2 nm process nodes, with leading players outlining production timelines and capacity expansions over the next five years. Below is a detailed overview of these developments, including plans from TSMC, Samsung, Intel, and Rapidus.

The forecast predicts a 540% growth in the global AI semiconductor market between 2020 and 2030, driven by increasing adoption across key segments such as servers, networking, edge devices, and PCs/smartphones. Servers are projected to dominate the market, reflecting the growing demand for AI in data centers and cloud computing, while networking and edge computing are expected to see rapid expansion, driven by real-time processing needs in IoT and automotive applications. Moderate growth is anticipated in the PCs/smartphone segment as AI integration in consumer electronics continues. Tokyo’s recent $65 billion investment in AI and semiconductor industries underscores the importance of this market, which is expected to exceed $400 billion by 2030, highlighting the transformative role of semiconductors in powering AI advancements across industries.

TSMC

Taiwan Semiconductor Manufacturing Company (TSMC) is enhancing its semiconductor fabrication capabilities globally, focusing on 3 nm and 2 nm and below nodes.

• 3 nm Production (Taiwan): TSMC began volume production of its 3 nm process technology in December 2022 at Fab 18, located in the Southern Taiwan Science Park (STSP). Fab 18 consists of eight phases, each featuring a cleanroom area of 58,000 square meters, roughly double the size of a standard logic fab. TSMC has invested over NT$1.86 trillion in Fab 18, creating more than 11,300 high-tech jobs.
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• 2 nm Development (Taiwan): TSMC’s 2 nm process is scheduled for risk production in late 2024 and mass production in 2025. A new facility in Hsinchu Science Park is under construction, with equipment installation set for April 2024.
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• 2 nm (Arizona, USA): TSMC is building a second fab in Arizona to produce 2 nm nodes, with production expected to begin in 2028. A third fab, focused on cutting-edge technologies, is planned for later this decade. This is part of a $40 billion investment, the largest foreign investment in Arizona's history.
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Samsung

Samsung Electronics is expanding its semiconductor manufacturing capabilities in South Korea and the United States, focusing on 3 nm and 2 nm nodes.

• 3 nm Production (South Korea): Samsung began mass production of its first-generation 3 nm chips in the second half of 2022, using its proprietary Multi-Bridge Channel Field-Effect Transistor (MBCFET) technology, a Gate-All-Around (GAA) architecture. Second-generation 3 nm production began in 2023, offering improved energy efficiency and performance.
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• 2 nm Development (South Korea): Samsung plans to start 2 nm production in 2025 for mobile devices, followed by high-performance computing in 2026 and automotive semiconductors by 2027. The 2 nm (SF2) process is expected to deliver a 12% performance increase, 25% power efficiency improvement, and 5% area reduction compared to 3 nm.
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• Taylor Fab (Texas, USA): Samsung is constructing a $17 billion fab in Taylor, Texas. Initially planned for 4 nm production in late 2024, the fab may start directly with 2 nm technology in 2026 to align with Samsung’s broader roadmap.
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Intel

Intel Corporation is investing in global semiconductor manufacturing, focusing on advanced nodes like Intel 3, Intel 20A, and Intel 18A.

• United States: Intel’s Fab 42 in Arizona produces 10 nm chips and is transitioning to Intel 7 and Intel 4 nodes. In Ohio, Intel is building two fabs with a $20 billion investment to produce Intel 18A by the decade's end.
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• Europe: Intel’s Fab 34 in Ireland will produce Intel 4 technology using EUV lithography. In Germany, Intel delayed its is investing €17 billion to construct two fabs in Magdeburg, focusing on advanced nodes.
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• Israel: Intel’s Fab 28 in Kiryat Gat, Israel, is transitioning from 10 nm to Intel 7 and Intel 4 processes. Intel has committed $10 billion to expand this facility.
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Rapidus

Rapidus, a Japanese semiconductor start-up, aims to produce 2 nm chips, positioning itself as a significant player in the advanced semiconductor market.

• 2 nm Development: Rapidus plans to start trial production of 2 nm chips in April 2025, with mass production by 2027. The company is collaborating with IBM to integrate cutting-edge technology, including Extreme Ultraviolet (EUV) lithography.
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• Manufacturing Facilities: Rapidus is building its IIM-1 fab in Chitose City, Hokkaido, Japan. The first EUV machine from ASML is expected to arrive in mid-December 2024.
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• Strategic Approach: Rapidus is rethinking traditional manufacturing models by emphasizing smaller batch production with faster cycle times, aiming for greater efficiency and adaptability.
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SMIC

China’s stake in leading-edge semiconductor manufacturing and AI is hindered by significant technological and geopolitical challenges. While domestic efforts, such as those by SMIC, have made strides in producing 7 nm chips, China remains far behind global leaders like TSMC, Samsung, and Intel, who are advancing toward 2 nm production. Critical dependencies on foreign equipment, such as ASML's EUV lithography machines, and U.S.-led export restrictions on advanced semiconductor tools and high-performance GPUs have further constrained its progress. Although China has invested heavily in AI development, its capabilities remain primarily focused on practical applications like surveillance and automation rather than leading innovation in foundational AI technologies. To conclude, China has an uphill battle to compete in the global semiconductor and AI industries.

Is the free world Decoupling from China and future risk of relying on Taiwan Fabs?

The global semiconductor industry is undergoing significant restructuring as it increasingly decouples from China and prepares for potential decoupling from Taiwan’s fabs. Geopolitical tensions, driven by concerns over China's ambitions toward Taiwan and its own restricted access to advanced chip-making technologies, have accelerated efforts by the US, Europe, and their allies to diversify supply chains and reduce dependency on both regions. Export controls targeting China, including restrictions on advanced chips and manufacturing tools, have prompted heavy investments in domestic semiconductor manufacturing in the US, Japan, South Korea, and Europe. Simultaneously, Taiwan’s pivotal role in leading-edge semiconductor production, dominated by TSMC, has highlighted vulnerabilities, spurring new fabs outside the island, such as TSMC’s facilities in Arizona and Samsung’s in Texas. These shifts reflect a broader trend toward creating more resilient, geographically dispersed semiconductor ecosystems that mitigate risks associated with reliance on any single region for critical technologies.

Current global plans for semiconductor manufacturing expansion aim to reduce dependency on Taiwan but fall short of ensuring sufficient non-Taiwan capacity for 2 nm and below nodes in the near term. Taiwan, led by TSMC, still dominates leading-edge semiconductor production, supplying over 90% of the world’s advanced chips. While significant investments are underway—such as TSMC's Arizona fabs, Samsung’s expansions in South Korea and Texas, and Intel's facilities in the US, Europe, and Israel—these efforts are unlikely to match Taiwan’s scale and technological leadership at 2 nm and below by 2027-2030.

For example, TSMC’s planned Arizona fab is projected to produce 2 nm chips by 2028, but its capacity will be a fraction of TSMC's output in Taiwan. Similarly, Samsung and Intel are progressing toward advanced nodes, but both face challenges in matching TSMC’s efficiency and yield at these cutting-edge technologies. Additionally, the complexity of EUV lithography and the industry's high R&D costs further limit the pace at which non-Taiwan fabs can scale to competitive capacities.

Adisyn Acquires 2D Generation: Pioneering Low-Temperature Graphene for Next-Gen Semiconductors

Israeli-based 2D Generation (2DG), which specializes in graphene-based solutions for semiconductors, has been acquired by ASX-listed Adisyn (ASX:AI1), a provider of tech services for SMEs in the Australian defense sector that has expanded its focus to the semiconductor industry through this acquisition.

Israeli-based 2D Generation (2DG), a pioneer in graphene-based solutions for semiconductors, has been acquired by ASX-listed Adisyn (ASX:AI1), an Australian defense tech services provider now expanding into the semiconductor industry. Adisyn, a founder of the Connecting Chips European Union Joint Undertaking alongside NVIDIA, Valeo, and Applied Materials, gains access to 2DG’s patented low-temperature graphene production technology. Unlike traditional methods requiring temperatures of around 1,000°C—unsuitable for delicate semiconductor chips—2DG’s process uses Atomic Layer Deposition (ALD) to grow graphene below 300°C, ensuring compatibility with chip manufacturing. This breakthrough addresses a critical industry challenge: as transistors shrink, heat generation in interconnects limits performance and reliability. Graphene’s superior conductivity and heat resistance make it a transformative material for interconnects, potentially unlocking faster, more efficient chips. 2DG’s CEO Arye Kohavi emphasizes the technology's importance for overcoming bottlenecks in chip design, with discussions already underway with industry giants like TSMC and Nvidia. As 2DG scales its ALD capabilities, it aims to integrate graphene into next-generation chips, potentially revolutionizing applications from EVs to AI systems and positioning the company as a key player in the semiconductor sector.

Adisyn Ltd (ASX: AI1) has announced the acquisition of a state-of-the-art Atomic Layer Deposition (ALD) machine from Beneq, a leader in deposition technology, to advance its subsidiary 2D Generation Ltd’s innovative semiconductor solutions. The ALD system will enable precise, ultra-thin graphene layering on semiconductor interconnects, addressing critical bottlenecks in chip manufacturing and paving the way for transformative advancements in high-performance computing, including generative AI, data centers, and defense applications. Scheduled for installation within the next 5-6 months, this equipment represents a crucial step in scaling production of graphene-coated interconnects to enhance speed, energy efficiency, and scalability in semiconductor technology.

Recently, 2D Generation has also partnered with M&T Semiconductor, a leading specialty semiconductor advisory firm founded by industry veterans Dr. Itzhak Edrei and Zmira Shterenfeld Lavie, to accelerate the development and commercialization of its groundbreaking graphene technology. This collaboration aims to secure strategic partnerships with semiconductor fabricators, fabless chipmakers, and equipment vendors while prioritizing licensing opportunities and potential buyouts. M&T brings decades of expertise from Tower Semiconductor, leveraging deep industry connections to advance 2DG’s patented sub-300°C graphene coating process, which addresses critical challenges in interconnect performance and scalability. With this partnership, 2DG is positioned to reshape semiconductor manufacturing and drive next-generation chip innovation.

M&T Semiconductor, founded in 2019, is a specialized advisory firm offering strategic consulting, mergers and acquisitions (M&A) services, and research and development (R&D) expertise in the semiconductor industry. Led by industry veterans Dr. Itzhak Edrei, former President of Tower Semiconductor, and Zmira Shterenfeld Lavie, former General Manager at Tower Semiconductor, M&T leverages over three decades of experience to assist clients in refining objectives, scouting technologies, and implementing processes.Their services encompass strategic consulting, M&A facilitation, technology scouting, and implementation, aiming to deliver tangible outcomes and foster partnerships within the semiconductor sector.

Sources:

2DG secures semiconductor advisor to develop initiatives - Adisyn Ltd (ASX:AI1) - Listcorp.

2DG a part of Adisyn to build new graphene for chip mfg

Kalpana Systems Unveils Roll-to-Roll Spatial ALD Tools for Solar, Batteries, and Packaging

Kalpana Systems, a Dutch thin film equipment manufacturer, has launched roll-to-roll spatial atomic layer deposition (sALD) tools, targeting industries such as solar PV, organic light-emitting diodes, batteries, and packaging. The technology focuses on depositing high-quality functional thin layers with atomic precision without causing sputter damage, with initial applications in barrier layer deposition. Since its founding in 2021, the company has developed its first operational machine, raising €3.5 million to transition from prototype to commercial production. The sALD technology supports high throughput industrial processes, enabling deposition of multiple layers with web speeds up to 10 m/min and is designed for integration with other deposition techniques. Two models, the K300 and K600, cater to different market needs, with specifications optimized for flexible electronics, solar cells, and high-speed applications like batteries and packaging.

The sALD equipment addresses stability and durability challenges faced by producers of perovskite and organic solar cells, offering cost-effective encapsulation methods. Both K300 and K600 models can process flexible substrates and are programmable for various operational parameters, making them versatile across roll-to-roll production processes. With lead times of 9–12 months, Kalpana Systems offers customizable customer onboarding support. Backed by investors such as Fairtree Elevant Ventures and SIG InnoVentures, the company emphasizes the uniqueness of its roll-to-roll technology in delivering high volume, rapid production, and wide market adoption. These innovations position Kalpana Systems as a competitive player in thin film deposition, advancing the development of efficient and scalable manufacturing solutions.

Kalpana Systems, founded in 2021 and headquartered in Delft, Netherlands, specializes in high-throughput spatial Atomic Layer Deposition (sALD) technology for thin film coatings on flexible substrates.Their innovative Superspatial ALD technology enables cost-effective production of thin films, facilitating the transition from technological promise to commercial application. The company's solutions are designed to advance sectors such as solid-state batteries, environmentally friendly packaging, and perovskite solar cells.

In July 2024, Kalpana Systems secured €3.5 million in a Series A funding round led by Fairtree Elevant Ventures, SIG InnoVentures, and the Energy Transition Fund Rotterdam.This investment aims to accelerate the development and commercialization of their sALD technology, positioning the company to meet the growing demand for advanced thin film deposition solutions across various industries.

China’s Semiconductor Growth Slows Amid Sanctions, Legacy Chips Drive Output While Advanced Tech Struggle - what about ALD?

China's semiconductor industry is at a crossroads, navigating both growth opportunities and significant challenges. As US sanctions restrict access to critical technologies like EUV lithography, China's ambitions in advanced chip manufacturing are stifled, particularly in areas like AI and next-generation devices. While the country remains a strong player in legacy chip production, driven by robust demand from multinational corporations and its booming EV sector, the lack of advanced capabilities limits its ability to compete globally in cutting-edge technologies. At the same time, Atomic Layer Deposition (ALD), a cornerstone for technologies like GAAFET, DRAM, and 3D NAND, is seeing robust growth globally, with leading OEMs like ASMI, TEL, Applied Materials, and Lam Research emphasizing its pivotal role in scaling advanced architectures. However, China’s ALD market is expected to pivot towards supporting legacy nodes, as geopolitical constraints and domestic manufacturing dynamics shape its future. This evolving landscape underscores a shift in focus, with global players capitalizing on innovation while China's market transitions towards domestic and legacy-driven demand.

China’s semiconductor industry experienced slowing growth in October, reflecting the impact of looming US sanctions on advanced chip manufacturing. While legacy chip production and the EV sector drove industrial growth, advanced semiconductor capabilities remain constrained by restrictions on critical lithography equipment, such as ASML's EUV tools. This has stifled China’s ambitions in leading-edge technologies used in smartphones and AI. Despite producing 353 billion IC units from January to October, a 24.8% year-on-year increase, most of this growth was in legacy chips, heavily demanded by multinational corporations and export markets. Advanced production, meanwhile, lags behind as companies like TSMC and Samsung tighten services to Chinese firms, reflecting a broader global effort to limit China's technological advancement. These restrictions have heightened China's dependence on imported chips, which reached $315 billion in the first 10 months of 2024.

This chart shows the production output of integrated circuits (in hundred million units). China's IC production reflects the semiconductor cycle. The Chinese government sees semiconductors as an important focus for domestic production based on its Made in China 2025 plan. Note: Data for February are the cumulative total of January and February combined.

In Applied Materials' Q4 2024 earnings call, CEO Gary Dickerson highlighted the company's advancements in ALD technology. He emphasized that ALD is crucial for enabling next-generation semiconductor architectures, particularly in the development of gate-all-around transistors and advanced packaging solutions. Dickerson noted that Applied Materials' leadership in ALD positions the company to meet the increasing demand for energy-efficient computing and artificial intelligence applications. Applied Materials reported strong Q4 2024 earnings, highlighting the significant role of China despite challenges from US restrictions. China contributed approximately 30% of revenue, normalized after elevated demand for DRAM and NAND earlier in the year. The company's revenue from ICAPS (IoT, communications, automotive, power, and sensors) nodes remains strong in China, though potential slowing in automotive and industrial sectors may impact future growth. Applied is focusing on advanced materials engineering for cutting-edge technologies like gate-all-around transistors and high-bandwidth memory, areas critical for AI and energy-efficient computing. While China remains a key market for legacy technologies, restrictions on leading-edge technology sales are reshaping Applied’s growth trajectory, emphasizing global collaboration and innovation outside China. Looking ahead, Applied anticipates steady ICAPS demand and continued contributions from China at current levels.

Is the China market gloomy in ALD Equipment demand - hwat does the Tier 1 OMEs report on future ALD demand?

ALD is increasingly vital in semiconductor manufacturing, particularly for Gate-All-Around Field-Effect Transistors (GAAFET), DRAM, and 3D NAND technologies. Leading equipment manufacturers—ASM International (ASMI), Tokyo Electron (TEL), Applied Materials (AMAT), and Lam Research (LAM)—have highlighted ALD's significance in these areas.

ASM International:

ASMI has reported strong demand for its ALD equipment, driven by applications in advanced semiconductor nodes. The company noted that artificial intelligence (AI) and high-performance computing are propelling the need for GAAFET structures, where ALD processes are essential for precise material deposition. ASMI's recent financial results reflect this trend, with increased bookings attributed to robust demand in these sectors. 

Tokyo Electron:

TEL has been focusing on developing ALD technologies to enhance its position in the 3D NAND market. The company announced advancements aimed at improving 3D NAND flash memory production, positioning itself as a competitor to Lam Research in this domain. TEL's efforts underscore the growing importance of ALD in fabricating complex 3D structures required for high-density memory applications. 

Applied Materials:

AMAT has emphasized its leadership in materials engineering, including ALD, to support next-generation semiconductor architectures like GAAFETs. The company highlighted that ALD is crucial for developing advanced transistors and packaging solutions, which are essential for energy-efficient computing and AI applications. AMAT's focus on ALD aligns with the industry's shift towards more complex device structures. 

Lam Research:

LAM has been at the forefront of ALD technology, particularly for memory applications. The company introduced the ALTUS® Max E Series, featuring an all-ALD low-fluorine tungsten fill process, addressing challenges in scaling 3D NAND and DRAM devices. This innovation enables the production of higher aspect ratio structures with improved performance, demonstrating ALD's critical role in advancing memory technologies. 

In summary, leading OEMs recognize ALD as a pivotal technology for advancing semiconductor manufacturing, especially in GAAFET, DRAM, and 3D NAND applications. The continuous development and adoption of ALD processes are essential to meet the industry's evolving demands for higher performance and greater efficiency. 

China's demand for ALD equipment reflects a mixed outlook, influenced by geopolitical restrictions and market dynamics. Advanced semiconductor manufacturing in China faces constraints due to limited access to critical tools like EUV lithography, stifling progress in leading-edge applications like AI and smartphones. However, the market for legacy chip production remains robust, with strong output driven by demand from multinational corporations and export markets. Leading OEMs like Applied Materials and Lam Research report sustained engagement in the Chinese market, particularly in legacy nodes and AI-driven technologies, though future growth may slow due to challenges in automotive and industrial sectors. Despite these hurdles, Tier 1 OEMs, including ASML, have seen better-than-expected sales in China, highlighting its continued relevance in the global semiconductor landscape. Given that ALD is expected to have double digit growth for GAAFET, DRAM and NAND in leading edge nodes and memory going 3D the China market may be less important looking ahead and will transform to a legacy market for domestic and possibly Korean ALD OEMs.

Sources:

Applied Materials, Inc. (AMAT) Q4 2024 Earnings Call Transcript | Seeking Alpha

https://www.techedt.com/chinas-chip-production-slows-in-october-as-us-sanctions-loom

https://en.macromicro.me/collections/4345/mm-semiconductor/316/cn-china-output-of-integrated-circuit

ASML's 2024 Investor Day Highlights EUV-Driven Revenue Projections of €44-60 Billion by 2030 Amid AI, DRAM Scaling, and Advanced Semiconductor Growth

At its 2024 Investor Day, ASML projected annual revenue of €44 billion to €60 billion with gross margins of 56% to 60% by 2030, driven by double-digit growth in EUV lithography spending for Logic and DRAM, AI-driven semiconductor demand, and scalable EUV technology enabling cost-effective solutions for advanced nodes.

(Full video available here: Investor Day 2024)

DRAM scaling is undergoing a transformation fueled by the adoption of EUV lithography and the architectural shift to 3D DRAM, spearheaded by industry leaders Samsung, SK Hynix, and Micron. EUV lithography extends traditional DRAM scaling, enabling smaller cell sizes and higher densities. Micron plans to integrate EUV into DRAM production by 2025, marking a significant step toward cost-effective scaling. Samsung and SK Hynix are pioneering 3D DRAM architectures, which stack memory cells vertically to enhance density, performance, and energy efficiency. Samsung aims to commercialize 3D DRAM by 2030, while SK Hynix is targeting 2027-2028 for the introduction of vertical channel transistors (VCTs) with compact 4F² cell designs. These advancements represent a leap forward, with EUV lithography ensuring 2D scaling and 3D DRAM addressing physical and economic scaling limitations, paving the way for higher capacities and improved performance.

The progress and benefits of High-NA EUV lithography, with over 10,000 wafers exposed, including 1,300 DRAM and foundry customer wafers, and a target of 2,000 wafers by the end of 2024. Leading semiconductor companies like Micron, Intel, Samsung, SK Hynix, TSMC, and IBM are leveraging High-NA systems to enhance precision and scaling. Mark Philips from Intel highlights the readiness of High-NA EUV with robust tool availability and ecosystem support, enabling advancements like RibbonFETs, PowerVia, and "6x12" masks, which offer 23-50% productivity improvements over previous platforms. These developments underscore the role of High-NA EUV in enabling cost-effective scaling for DRAM and logic manufacturing.

ASML is pivotal in advancing EUV lithography for DRAM manufacturing. By 2024, memory manufacturers such as Samsung and SK Hynix had begun integrating EUV into production to enhance patterning precision and enable further scaling. ASML’s High-NA EUV systems, like the TWINSCAN EXE:5000, are expected to be production-ready by 2025, meeting stringent requirements for higher density and performance in memory technologies. Collaborations like the High-NA EUV Lithography Lab with imec have successfully demonstrated patterning for DRAM and logic structures, showcasing readiness for high-volume manufacturing by 2025-2026.

EUV lithography spending for DRAM is projected to grow at a CAGR of 15-25% through 2030. This growth is driven by the adoption of EUV for enhancing patterning precision and enabling further scaling in DRAM manufacturing. Key advancements include the integration of High-NA EUV systems, like ASML’s TWINSCAN EXE:5000, which is expected to be production-ready by 2025. These technologies support the development of 2D scaling and the transition to 3D DRAM architectures, addressing the physical and economic scaling challenges. Industry leaders Samsung, SK Hynix, and Micron are at the forefront of these efforts, incorporating EUV to achieve smaller cell sizes, higher densities, and improved energy efficiency.

Obviously, advanced logic drives EUV adoption. Spending in this sector is expected to grow at a CAGR of 10-20% through 2030, with High-NA systems playing a critical role in scaling logic nodes. Meanwhile, NAND benefits from advanced lithography solutions addressing the complexity of 3D NAND structures. Though it relies heavily on deposition and etch technologies, advanced DUV and EUV systems provide critical support for these applications.

The global semiconductor market is expected to grow significantly, driven by factors such as AI, high-performance computing, and 5G, which are fueling demand for advanced chips. Semiconductor sales are projected to reach $1 trillion by 2030, supported by the rapid adoption of AI technologies, growing automotive semiconductor needs for electric and autonomous vehicles, and the expansion of 5G networks and connected devices. Additionally, exponential growth in data generation is driving demand for robust data storage solutions, while continuous innovations in manufacturing, such as EUV lithography, enable smaller and more efficient chips. 

The global semiconductor market is expected to grow significantly, driven by AI, high-performance computing, and 5G. Sales are projected to reach $1 trillion by 2030, with wafer demand growing by 780,000 wafer starts per month annually. Strategic considerations, including geopolitical factors, are adding 5-8% extra wafer capacity by 2030. China’s role in the semiconductor industry remains vital, as the country invests heavily in advanced technologies to strengthen its manufacturing capabilities. However, due to export restrictions, China does not have access to ASML's EUV lithography tools. Instead, Chinese manufacturers focus on DUV technology and other innovative approaches to enhance their capabilities in advanced logic and DRAM production. Despite these limitations, China’s expanding wafer capacity contributes significantly to global growth projections, ensuring its relevance in the industry. The region’s efforts to integrate cutting-edge technologies, supported by partnerships with global leaders, highlight its ambitions to remain competitive and innovative in the semiconductor market.

ASML’s holistic lithography approach integrates computational models, metrology, and scanner optimization to maximize accuracy and yield. Innovations target reducing Edge Placement Errors (EPE) and enhancing defect inspections for 2D and 3D structures. The holistic lithography market is expected to grow at a CAGR exceeding 15% through 2030. Holistic lithography also plays a critical role in supporting front-end 3D integration by ensuring overlay control throughout pre-bonding, bonding, and post-bonding processes. Pre-bonding achieves <5 nm overlay error using scanner and offline metrology for correction and control, while bonding addresses large wafer deformation with extensive metrology (50-100 nm overlay error with over 5000 measurements per wafer). Post-bonding refines overlay error to <5 nm with over 2000 measurements per wafer, leveraging scanner actuators and lithography adjustments to bring errors within specifications.

ASML’s holistic lithography approach integrates computational models, metrology, and scanner optimization to maximize accuracy and yield. Innovations target reducing Edge Placement Errors (EPE) and enhancing defect inspections for 2D and 3D structures. The holistic lithography market is expected to grow at a CAGR exceeding 15% through 2030.

In conclusion, ASML’s strategy leverages its installed base, drives EUV and DUV advancements, and capitalizes on AI-driven demand. With projected annual revenue of €44-60 billion by 2030 and gross margins between 56% and 60%, ASML remains at the forefront of semiconductor innovation, enabling transformative progress in DRAM, logic, and NAND technologies.

Sources:

Investor Day 2024

Polar Light Technologies Redefines MicroLED Innovation with Pyramidal LEDs for Next-Generation Displays

Polar Light Technologies, a Swedish start-up, is revolutionizing microLED technology with its innovative pyramidal microLEDs, grown on patterned SiC substrates using MOCVD. Unlike conventional microLEDs, which suffer efficiency losses due to etching-induced imperfections, these pyramidal LEDs avoid etching altogether, enhancing their performance even at nanoscale dimensions. This unique design boosts light extraction efficiency and reduces internal electric fields, enabling high-quality emission in blue, green, and potentially red wavelengths. While the SiC substrate increases costs, its advantages in light utilization and scalability outweigh this penalty. The initial target market for these microLEDs is augmented-reality headsets, where submicron pixel sizes are crucial, with additional applications anticipated in automotive displays and smartwatches.

Pyramidal microLEDs on patterned SiC deliver a great performance, even when their dimensions approach the nanoscale.

Since its founding in 2014, Polar Light Technologies has focused on research, patent development, and forming a robust venture capital network in Sweden and the Nordic region. Recently, the company has been shifting from development to production, leveraging in-house capabilities such as cold bonding of gallium nitride LEDs with silicon CMOS for display integration. The company plans to expand through collaborations and larger funding rounds in the near future. This strategic shift, combined with its cutting-edge technology, positions Polar Light Technologies as a key player in advancing microLED applications across various industries.

The company has also secured investments from entities such as Almi Invest, Butterfly Ventures, and Stockholms Affärsänglar (STOAF) to accelerate its microLED development. These investments are aimed at advancing the company's technology and bringing it to the consumer market.

Sources:

MicroLEDs: Eliminating etching - News

News – Polar Light Technologies

Skytech Inc. Poised for Record Growth with Advanced ALD and Etching Innovation

Skytech Inc., a leading Taiwanese semiconductor equipment manufacturer, is forecasting a milestone year in 2025, with anticipated revenue growth exceeding 20% year-on-year. The surge is driven by robust demand for advanced chip manufacturing and packaging solutions, including atomic layer deposition (ALD) equipment and chip-on-wafer-on-substrate technologies. Skytech's innovative offerings, such as its highly customizable ALD systems and newly introduced etching solutions like Descum and Plasma Polish, are solidifying its position in the global semiconductor industry. With expanded clean room facilities and a strong product portfolio, Skytech continues to lead in cutting-edge semiconductor technologies while navigating geopolitical challenges with resilience.

Skytech Inc, a Taiwanese semiconductor equipment manufacturer, forecasts at least 20% year-on-year revenue growth in 2025, driven by strong demand for advanced chip manufacturing and new advanced packaging equipment. The company is expanding its clean room facilities in Hsinchu County to meet customer demand and has secured significant orders for atomic layer deposition equipment and tools used in advanced packaging technology, including chip-on-wafer-on-substrate solutions. In the first 10 months of 2024, Skytech’s revenue grew 18.33% to NT$1.69 billion, with net profit rising 64.15% year-on-year to NT$261 million. Semiconductor equipment contributes 50% of Skytech's revenue, while components and parts supply make up the remainder. With a 30% exposure to the Chinese market, Skytech is monitoring geopolitical tensions but remains unaffected by export restrictions.

Skytech develops and manufactures Atomic Layer Deposition (ALD) equipment. In 2019, the company designed its first ALD machine, named Atomila, marking its entry into the ALD equipment market.  Skytech's ALD systems are equipped with six chamber positions and are highly integrated with Equipment Front End Module systems. These systems offer customizable chamber configurations based on customer requirements and include options for pre-treatment or post-treatment of ALD depositions. Depending on temperature and plasma damage concerns, customers can choose between Thermal-ALD or Plasma-Enhanced ALD (PE-ALD) processes. The equipment features a patented gas inlet design and showerhead system to ensure excellent uniformity. Additionally, an optional automatic pick-and-place tool enables coating of different wafer sizes on a 12-inch platform, supporting fab automation.  In 2021, Skytech's ALD equipment was verified and adopted by Epistar, contributing to the commercialization of LED technologies.  

Skytech's ALD systems feature six chamber positions and are highly integrated with Equipment Front End Module (EFEM) for advanced automation. The systems offer customizable chamber configurations tailored to customer requirements and include optional treatment chambers for effective pre-treatment or post-treatment of ALD depositions. Users can choose between Thermal-ALD or Plasma-Enhanced ALD (PE-ALD) processes, depending on temperature and plasma damage concerns. The equipment is equipped with SECS/GEM protocols for seamless fab automation and incorporates a patented gas inlet design and showerhead system to ensure excellent uniformity. Additionally, an optional automatic pick-and-place tool enables coating of different wafer sizes on a 12-inch platform, further enhancing its suitability for automated semiconductor manufacturing.

Skytech's Powder ALD Tool is designed to extend the lifespan and enhance the stability of quantum dots (QDs) by applying Al₂O₃ passivation to protect against oxygen, moisture, and heat. Leveraging Atomic Layer Deposition (ALD), the tool provides sub-nanometer precision and highly conformal coatings under gentle conditions, making it ideal for QD thin films. The tool features an optional ozone generator for diverse oxidation sources, a specialized flow field design for improved powder coating, a uniform chamber temperature maintained by a unique heater design, and support for three sets of precursor/co-precursor pipelines. It is specifically tailored for effective powder coating, ensuring optimal protection for QDs.

In 2023, the company introduced etching systems such as Descum and Plasma Polish, expanding its product line to meet market demands.  These etching solutions are designed to support various semiconductor manufacturing processes, enhancing Skytech's capabilities in the semiconductor equipment industry. 

Sources:

Skytech expects revenue to increase to all-time high - Taipei Times

Adisyn Ltd Invests in ALD Technology from Beneq Graphene Device Manufacturing

Adisyn Ltd has taken a significant step toward advancing semiconductor technology with its recent investment in an Atomic Layer Deposition (ALD) machine from Beneq. On November 10, 2024, the company announced that its subsidiary, 2D Generation Ltd, ordered the specialized equipment to enhance graphene-coated interconnect technology, a breakthrough innovation in next-generation chip development. This strategic acquisition underscores Adisyn's commitment to driving innovation in critical markets such as defense, data centers, and cybersecurity. Through the collaboration between Adisyn and 2D Generation, alongside Beneq's cutting-edge ALD expertise, the partnership is set to address key challenges in semiconductor manufacturing, paving the way for faster, energy-efficient, and more reliable computing solutions.

Adisyn Ltd has invested in an Atomic Layer Deposition (ALD) machine from Beneq. On November 10, 2024, Adisyn announced that its subsidiary, 2D Generation Ltd, ordered a specialized ALD machine from Beneq to advance their semiconductor technologies, including graphene-coated interconnects. This acquisition aims to accelerate the development of next-generation chip technology, benefiting Adisyn's target markets such as defense applications, data centers, and cybersecurity.

2D Generation Ltd is an Israeli high-tech company specializing in graphene-based solutions for the semiconductor industry. Founded by entrepreneur and innovator Arye Kohavi, the company focuses on overcoming current technological limitations by developing faster, more energy-efficient computer processing solutions. 

A significant advancement by 2D Generation is their patented method for depositing graphene coatings at temperatures below 300 degrees Celsius. This breakthrough enables the next generation of semiconductors to achieve further miniaturization, reduced power consumption, less heat generation, and greater computational power. 

One of 2D Generation Ltd patent applications (US2024301554 AA) outlines a method employing ALD to apply graphene as a diffusion barrier or interfacial layer on non-metallic surfaces, such as dielectric or semiconductor layers. ALD is used to achieve precise, uniform deposition of graphene molecular precursor layers, enabling atomic-level control and ensuring high-quality graphene with minimal defects. The process operates at low temperatures (below 350°C), making it compatible with sensitive semiconductor manufacturing. The graphene is covalently bonded to the substrate using customized precursors containing tethering groups tailored for strong chemical interactions. These precursors, such as aromatic hydrocarbons with functional groups like trichlorosilyl or carboxylic acids, are designed to react with the substrate to form stable graphene layers. Precursor deposition methods include vacuum techniques like sublimation or evaporation, and the process may involve sequential cycles of different precursors to optimize uniformity, fill factor, and defect ratio. This approach addresses critical challenges in semiconductor interconnect scaling by providing a high-conductivity, robust diffusion barrier that prevents metal atom migration, enhances reliability, and supports higher current densities in advanced integrated circuits.

In July 2024, 2D Generation entered into a binding collaboration agreement with Adisyn Ltd, an Australian technology company, to develop high-performance, energy-efficient semiconductor solutions for AI and data centers. This partnership aims to leverage 2D Generation's semiconductor innovations alongside Adisyn's expertise in data center management and cybersecurity. 

Furthering their collaboration, in November 2024, Adisyn Ltd announced a binding agreement to acquire 100% of 2D Generation Ltd's issued share capital. This acquisition is expected to enhance Adisyn's capabilities in developing advanced semiconductor technologies, particularly in defense applications, data centers, and cybersecurity. 

Additionally, 2D Generation is a partner in the European Union's Connecting Chips Joint Undertaking, which includes research and innovation partners such as NVIDIA, IMEC, Valeo, Applied Materials, NXP, and Unity. This initiative focuses on accelerating the development of next-generation semiconductor chips to meet the growing demands of generative AI and other advanced technologies.  

Beneq, founded in 1984 and headquartered in Espoo, Finland, is a global leader in Atomic Layer Deposition (ALD) technology, offering equipment and research services for semiconductor fabrication, batch production, research, and spatial ALD applications. Acquired in 2018 by Qingdao Sifang SRI Intellectual Technology Co. Ltd., Beneq focuses on industrial ALD thin film solutions and transparent displays. Its product portfolio includes automated ALD systems for high-capacity wafer production, batch production tools for diverse substrates, flexible research equipment, and roll-to-roll ALD systems. Beneq also provides coating, R&D, spare parts, and system upgrades, with offices in the US, China, and Japan. Qingdao Sifang SRI Intellectual Technology Co., Ltd., established in 2018 and headquartered in Qingdao, China, specializes in the development and manufacturing of advanced semiconductor process equipment. Supported by significant investments, including a Series B funding round in 2024 involving SAIC Motor Corporation, the company has achieved key milestones, such as developing China's first domestic high-energy ion implanter. 

Sources:

Patbase

www.beneq.com

Presentation - Adisyn Ltd (ASX:AI1) - Listcorp.

New Generation Atomic Layer Deposition Machine Procured | INN

New Method for Precision Doping in 2D Semiconductors Enables Next-Gen CMOS Integration

Researchers have achieved a breakthrough in doping two-dimensional (2D) semiconductors, paving the way for monolithic integration of p-type and n-type semiconductor channels on a single chip. This development holds promise for advancing complementary CMOS technology, allowing further transistor scaling and efficient interlayer connections.

The study focuses on 2H-MoTe2, a van der Waals material, and employs a precise substitutional doping technique. Unlike conventional methods such as ion implantation—which do not work well with 2D materials—this approach allows the targeted introduction of niobium (Nb) for p-type doping and rhenium (Re) for n-type doping, using a magnetron co-sputtering method followed by chemical vapor deposition (CVD). By precisely adjusting the concentration of these dopants, researchers produced wafer-scale films with consistent carrier properties, even enabling spatial control of the doped regions. This advance allows for the patterning of p-type and n-type channels on the same wafer in a single growth process, which is essential for CMOS device fabrication.

Using this novel technique, the team created a large-scale 2D CMOS inverter array that achieved impressive performance metrics. For instance, a typical inverter from this array demonstrated a voltage gain of 38.2 and low static power consumption, key parameters for efficient CMOS operation. The new doping method also exhibits high uniformity and reliability, essential for scaling up 2D materials in commercial semiconductor applications.

This innovation in 2D semiconductor doping introduces a promising pathway for integrating materials like 2H-MoTe2 into very-large-scale integration (VLSI) technology, further driving forward Moore's Law and the miniaturization of semiconductor devices.

Figure 1 from paper, Pan, Y., Jian, T., Gu, P. et al. Precise p-type and n-type doping of two-dimensional semiconductors for monolithic integrated circuits. Nat Commun 15, 9631 (2024). https://doi.org/10.1038/s41467-024-54050-2

Experimental

In the study, co-sputtering and CVD is used to create large-scale, precisely doped 2D 2H-MoTe2 films by transforming a molybdenum film doped with niobium or rhenium into 2H-MoTe2 through a process called tellurization. Here’s a breakdown of how this process works:

Preparation of the Mo Film: Initially, thin Mo films are deposited on a silicon/silicon dioxide (Si/SiO2) substrate using magnetron co-sputtering. During this step, controlled amounts of Nb (for p-type doping) or Re (for n-type doping) are co-sputtered with the Mo film, resulting in a doped Mo layer.

Tellurization Process in the CVD Reactor: The Mo film, now doped with Nb or Re, is placed in a CVD furnace along with solid tellurium (Te) lumps. Under a controlled flow of carrier gases (argon and hydrogen), the CVD chamber is heated to high temperatures (around 650°C). The Te vapor reacts with the Mo, leading to the formation of 1T'-MoTe2.

Phase Transformation to 2H-MoTe2: At the elevated temperatures within the CVD system, the 1T'-MoTe2 structure undergoes a phase transformation into the more stable 2H phase, producing the final doped 2H-MoTe2 film. This phase is crucial because 2H-MoTe2 has semiconducting properties suitable for integrated circuits.

Doping Incorporation: During the CVD tellurization, Nb and Re atoms from the initial Mo film become substitutionally incorporated into the MoTe2 lattice. This incorporation determines the semiconductor type (p-type or n-type) and carrier concentration of the resulting 2H-MoTe2 film.

Large-Scale Uniformity: By controlling the initial dopant concentration and maintaining consistent conditions in the CVD process, the researchers achieved uniform doping across large-scale wafers, crucial for creating reliable semiconductor devices.

Source: Precise p-type and n-type doping of two-dimensional semiconductors for monolithic integrated circuits | Nature Communications

Chipmetrics Secures €1 Million from Business Finland to Drive Global Expansion in Semiconductor Metrology

Helsinki, Finland – 6 November 2024 – Chipmetrics Oy, a pioneering leader in 3D thin film semiconductor metrology, announces that it has been awarded 1 million euro from Business Finland’s Young Innovative Company (YIC) funding programi. The fund’s purpose is to support promising Finnish startups that demonstrate potential for substantial global growth and innovation, with funding from it awarded exclusively to startups of less than five years of age with outstanding business potential. The funding represents state-level recognition of Chipmetrics’ progress and level of maturity as it steps up its efforts to enable the semiconductor industry to transition to 3D chips. It will primarily be used to amplify the company’s business development activities and support rapid international expansion. 

Chipmetrics' core range of advanced semiconductor metrology solutions already enjoy strong support in markets such as Japan and Korea, with the next business goal being expansion beyond these markets globally. "This is a pivotal moment for Chipmetrics. With Business Finland’s support, we can enhance our product offerings and scale our operations to meet the growing demands of the semiconductor industry,” said Mikko Utriainen, CEO of Chipmetrics at Chipmetrics about the new opportunities the additional support will enable. “Our goal is to drive innovation that will not only benefit our clients but also contribute to the technological advancements in 3D thin-film deposition through better metrology solutions." “When considering who to fund with the Young Innovative Company funding, we require that the company is innovative, it has scalable business model, strong international business plans for rapid growth and they are already able to demonstrate some international sales. We believe Chipmetrics ticks all these boxes very well.” said Marko Kotonen, Senior Advisor at Business Finland.  

The Young Innovative Company funding program is a phased support system intended to accelerate the global growth of promising Finnish companies. The average company that received funding in 2024 was 4 years old with 13 employees, a 420,000+ EUR turnover from a scalable business and strong internationally experience management. Chipmetrics’ selection for this funding underscores its strong commitment to innovation, superior technology development, and its potential to impact the global semiconductor industry. Chipmetrics specializes in ALD, a segment of the semiconductor industry that itself is set to eclipse a trillion euroii by the end of the 2020s.  

About Chipmetrics Chipmetrics Oy develops and delivers metrology solutions for manufacturing processes for the semiconductor industry, focusing on innovative metrology chips and ALD measurement services. Its main product is the PillarHall® metrology chip for near-instantaneous thin film process conformality measurement. Founded in 2019, its head office is in Joensuu, Finland, with employees and sales partners in Japan, South Korea, USA, and Germany. For more information, visit www.chipmetrics.com. 

Press contact: Jonas Klar jonas.klar@chipmetrics.com pr@chipmetrics.com Chipmetrics Oy 

Applied Materials Delivers Advanced ALD 200 mm Batch Technology to United Monolithic Semiconductors (UMS) for RF and Power Device Manufacturing

Applied Materials (prev. Picosun Oy) announce that they have delivered ALD technology to United Monolithic Semiconductors (UMS) for RF and power devices manufacturing. UMS is a compound semiconductor foundry and device manufacturer located in Ulm, Germany and Villebon, France. UMS produces RF devices, such as amplifiers, detectors, high-electron-mobility transistors and complete transceiver systems.

"We see the investment in the ALD technology as a key step forward. ALD is everyday technology in silicon-based IC and memory components and there are real benefits also for the compound semiconductor devices. We want to be the forerunner in our specific application fields, so including ALD in our process portfolio is one important step in staying ahead of the competition.​" - Dr. Klaus Zieger, Manager Process & Tools, UMS

United Monolithic Semiconductors (UMS) is a leading European company specializing in the design, manufacture, and marketing of radio frequency (RF) and millimeter-wave integrated circuits (MMICs. Established in 1996 as a joint venture between Thales and Airbus Defence and Space, UMS has become a strategic supplier to the European defense and space industries.

UMS offers a comprehensive range of products and services, including amplifiers, attenuators, core chips, detectors, converters, transistors, mixers, multipliers, oscillators, phase shifters, power divider combiners, RF front-ends, and switches.These products cater to various applications across defense, security, space, telecommunications, automotive, industrial, medical, and instrumentation sectors.

The company's technological foundation is built on in-house Gallium Arsenide (GaAs) and Gallium Nitride (GaN) processes, enabling the development of state-of-the-art products and providing a robust platform for their foundry services. UMS is committed to continuous innovation, collaborating with major research and development centers and universities throughout Europe to advance technologies and products for future markets.

Applied™ Morpher™ Batch ALD

Applied™ Morpher™ Batch ALD product platform is designed to disrupt thermal batch ALD for the up to 200 mm wafer industries in IoT, Communications, Automotive, Power, and Sensors (ICAPS) markets. It enables fast, fully automatic, high throughput production of MEMS, sensors, LEDs, lasers, power electronics, optics, and 5G components with the leading process quality, reliability, and operational agility.

Applied Morpher Batch ALD adapts to the changing needs of your industry and the requirements of your customers, on all business verticals from advanced R&D to production and foundry manufacturing. The leading versatility in substrate materials, substrate and batch size, and the wide process range make Morpher truly a transformable, all-inclusive ALD tool to keep you spearheading your industry.

Applied Morpher Batch ALD is designed for fully automated handling of wafer batches in combination with a single wafer vacuum cluster platform. Revolutionary, wafer batch flipping mechanism enables integration of the system with semiconductor manufacturing lines where most of the processing takes place in horizontal geometry. It can be combined with Applied™ Picosun™ Morpher™ P, plasma PEALD single wafer process module, or the Applied™ Picosun™ Morpher™ T, thermal ALD single wafer process module.

With our dual-chamber, hot-wall reactor design with fully separated precursor conduits and inlets, we create the highest quality ALD films with excellent yield, low particle levels, and superior electrical and optical performance. The compact, ergonomic design with easy and fast maintenance ensures minimum system downtime and low cost-of-ownership.

Solid-State Batteries Move Closer to Mass Production as Global Manufacturers Ramp Up Pilot Production

Solid-state batteries (SSBs) are rapidly advancing toward commercialization, with major companies like Toyota, Nissan, and Samsung SDI beginning pilot production and targeting GWh-level output by 2027. These batteries promise enhanced safety and higher energy density, yet face significant challenges related to high production costs and complex manufacturing processes. Despite these hurdles, manufacturers are progressing towards cost reductions through scaling, with TrendForce projecting costs to fall to USD 0.084–0.098 per Wh by 2035. Japanese companies, led by Toyota, are pushing for early mass production by 2026, while Chinese and South Korean firms follow closely, seeking to meet domestic demand for electric vehicles and energy storage.

Read more (https://www.trendforce.com/presscenter/news/20241031-12346.html)

SSBs are advancing towards commercialization as companies like Toyota, Nissan, and Samsung SDI begin pilot production, aiming to achieve GWh-level output by 2027. SSBs promise higher safety and energy density but face hurdles in production cost, complex manufacturing, and supply chain immaturity. Currently, semi-solid-state batteries, which have achieved GWh-scale deployment in EVs, cost over CNY 1/Wh (≈ USD 0.14/Wh), but TrendForce expects costs to drop below CNY 0.4/Wh (≈ USD 0.056/Wh) by 2035 with production advancements. All-solid-state batteries (ASSBs), progressing from prototypes to engineering-scale production, may see prices fall to CNY 0.6–0.7/Wh (≈ USD 0.084–0.098/Wh) by 2035 if demand scales above 10 GWh. Sulfide-based SSBs are particularly promising due to their high ionic conductivity, attracting major manufacturers despite challenges with cost and moisture sensitivity. Though current SSBs are not yet competitive with liquid lithium-ion batteries, TrendForce predicts cost reductions through scaling and strong government and capital support.

Among the leading manufacturers of all-solid-state batteries (ASSBs), several companies are targeting mass production (MP) status by the late 2020s. Toyota from Japan is poised to be one of the earliest, planning to reach mass production by 2026, setting a rapid pace in the industry. Samsung SDI and SK On from South Korea are also aiming for mass production by 2027, along with Chinese companies like CATL and BYD, who are likewise on track for MP status around the same period. This timeline highlights a competitive landscape where Japanese and South Korean firms are pushing for an earlier rollout, while Chinese companies are closely following, aiming to capitalize on their domestic market’s significant demand for electric vehicles and energy storage. Japan’s early push, led by Toyota, suggests a strategic approach to secure a leadership position in advanced battery technology.

Atomic Layer Deposition (ALD) has become crucial for advancing solid-state batteries due to its ability to create uniform, pinhole-free, and conformal thin films on complex structures. For solid-state electrolytes (SSEs), ALD enables the deposition of materials like lithium phosphorus oxynitride (LiPON) with high ionic conductivity, which enhances overall battery performance by forming thin, conformal electrolyte layers. This technology also plays a significant role in interface engineering by modifying the interfaces between electrodes and electrolytes. ALD-deposited interlayers improve chemical compatibility, reduce interfacial resistance, and suppress unwanted reactions, thereby improving the durability and efficiency of solid-state batteries.

ALD is especially beneficial for the development of 3D battery architectures, where its conformal coating capability enables uniform deposition on high-aspect-ratio structures, increasing surface area and enhancing energy and power densities. In addition, ALD is used to apply protective coatings to electrode materials, which prevents degradation and enhances battery stability. Examples include ALD-grown lithium silicate films that serve as solid-state electrolytes with reliable ionic conductivity. Recent research highlights ALD’s essential role in producing high-performance ASSBs and SSBs, focusing on thin-film deposition precision and interface engineering to overcome challenges related to solid-state battery design and performance.

Key applications of ALD in sulfur-based SSBs include protective coatings on sulfur cathodes, enhancing solid electrolytes, and interface engineering. ALD can apply ultra-thin, conformal coatings on sulfur cathodes, which help to mitigate polysulfide dissolution—a common issue in sulfur-based systems that leads to capacity fading. By creating a barrier layer, ALD coatings help to prevent polysulfides from migrating, thereby enhancing cycle life and reducing degradation. For example, materials like Al2O3 and TiO2 deposited via ALD have been used to form stable interfacial layers that suppress undesirable reactions.

ALD is also utilized to improve the ionic conductivity of sulfide-based solid electrolytes, such as Li2S-P2S5, which are promising due to their high ionic conductivity and similarity to liquid electrolytes. ALD can deposit thin films of stabilizing materials on these electrolytes to prevent reactions with lithium and improve stability. Additionally, ALD helps create protective layers around sulfide electrolytes, which are highly sensitive to moisture and oxygen, reducing the need for stringent environmental controls.

Interface engineering is another important application of ALD, with the precision of ALD enabling the deposition of thin interlayers at the electrode-electrolyte interfaces, addressing the issue of poor contact and high interfacial resistance in sulfur-based SSBs. These interlayers help to form a stable “solid-solid” contact, minimizing interfacial impedance and enhancing ion transfer across the interface. Materials such as lithium phosphorous oxynitride (LiPON) or lithium silicate are often used in ALD processes to create these interlayers, leading to improved overall battery performance and stability.

Refernces:

https://www.frontiersin.org/journals/energy-research/articles/10.3389/fenrg.2018.00010/full

https://pubs.rsc.org/en/content/articlelanding/2021/na/d0na01072c

https://www.frontiersin.org/journals/energy-research/articles/10.3389/fenrg.2018.00010/full

https://www.eng.uwo.ca/nanoenergy/publications/2017/PDFs/Atomic-Layer-Deposited-Lithium-Silicates-as-Solid-State-Electrolytes-for-All-Solid-State-Batteries.pdf

Atomic Level Processing of Gold: Advances in Atomic Layer Deposition (ALD) and Atomic Layer Etching (ALE)

Atomic layer processing methods, including Atomic Layer Deposition (ALD) and Atomic Layer Etching (ALE), have advanced the precision with which metals like gold can be manipulated at the atomic scale. Traditionally, gold has been challenging to process due to its low reactivity, but recent developments have made it possible to deposit and etch gold with atomic-scale control. While Professor Seán Barry’s work has focused on pioneering methods for gold deposition using ALD, Professor Steven M. George and his team have recently demonstrated a successful thermal ALE technique for gold. Together, these breakthroughs represent a new frontier in gold processing, enabling nanoscale applications in electronics, nanotechnology, and catalysis.

Advances in Atomic Layer Deposition (ALD) of Gold: Professor Seán Barry’s Work

Atomic Layer Deposition (ALD) relies on self-limiting surface reactions to grow thin films with atomic precision, and it is ideal for materials where control over layer thickness and uniformity is essential. However, gold presents unique challenges in ALD due to its inertness and lack of reactive sites. Despite this, Professor Seán Barry and his team have developed a plasma-enhanced ALD (PEALD) approach that overcomes these hurdles by using a specialized gold precursor and plasma activation.

Plasma-Enhanced ALD (PEALD) Method

Barry’s team utilized a trimethylphosphine-supported gold(III) precursor, specifically Me₃AuPMe₃, in combination with oxygen plasma to deposit gold layers. The plasma serves to activate the precursor and facilitate the deposition reaction, which would otherwise be hindered by gold’s low reactivity.

Low-Temperature Deposition

The process is achievable at temperatures around 120–130°C, considerably lower than traditional thermal ALD processes. This temperature range minimizes the risk of precursor decomposition, allowing the deposition of smooth and uniform gold films without unwanted by-products.

Deposition Rate and Film Quality

The deposition process achieved a growth rate of approximately 0.5 Å per cycle, providing exceptional control over film thickness. Barry’s PEALD method allows for uniform, conformal gold coatings that are valuable in microelectronics, sensing devices, and other applications where thin films of noble metals are required.

University of Helsinki Unveils Thermal ALD Process for Gold Coating in 3D Applications

The University of Helsinki has developed a groundbreaking thermal Atomic Layer Deposition (ALD) process for gold using the precursor Me₂Au(S₂CNEt₂) with a broad process window (120–250°C), achieving uniform and highly conductive films. This innovation addresses the limitations of plasma-enhanced ALD, which can struggle with coating complex 3D structures. By utilizing ozone as a co-reactant, the researchers achieved continuous gold films with a growth rate of 0.9 Å/cycle at 180°C and low resistivity, ideal for advanced applications requiring precise, conductive coatings. This follows an earlier Helsinki breakthrough in Ruthenium ALD, marking another step forward in atomic-level metal deposition techniques.

Breakthrough in Atomic Layer Etching (ALE) of Gold: Professor Steven M. George’s Method

Building on the advances in ALD for gold, Professor Steven M. George’s recent work on thermal ALE offers a complementary technique to precisely remove gold layers. Published in May 2024, George’s ALE method for gold uses a novel two-step thermal process involving chlorination and ligand addition. This approach bypasses the need for plasma, instead relying on a purely thermal cycle to achieve atomic-level etching of gold.

The study demonstrates a thermal atomic layer etching (ALE) process for gold using sequential reactions: chlorination with sulfuryl chloride (SO₂Cl₂) to form gold chloride, followed by ligand addition with triethylphosphine (PEt₃) to produce a volatile etch product, AuClPEt₃. This method achieved consistent etching at 0.44 ± 0.16 Å per cycle at 150°C on gold films. Mass spectrometry confirmed AuClPEt₃ as the main etch product, while analysis showed that ALE maintained nanoparticle smoothness without surface roughening. The approach was also effective on copper and nickel, offering a versatile ALE pathway for metals through controlled chlorination and ligand-addition reactions. LINK: https://pubs.acs.org/doi/10.1021/acs.chemmater.4c00485

Two-Step Thermal ALE Process

Chlorination: The gold surface is initially chlorinated using sulfuryl chloride (SO₂Cl₂), which forms gold chloride (AuCl) on the surface. This step primes the gold for the ligand addition reaction.

Ligand Addition with Triethylphosphine (PEt₃): After chlorination, triethylphosphine (PEt₃) is introduced to bind with the gold chloride, creating a volatile product, AuClPEt₃, which desorbs from the surface, effectively removing one atomic layer of gold.

Etch Rate and Temperature Control

The ALE process operates in a temperature range of 75 to 175°C, with the optimal and most consistent etch rate of 0.44 ± 0.16 Å per cycle occurring at 150°C. This repeatable, self-limiting reaction cycle ensures precise control over the etching process, which is critical for applications demanding high accuracy.

Experimental Observations and Mass Spectrometry

Quartz crystal microbalance (QCM) measurements tracked mass changes during each ALE cycle, while in situ quadrupole mass spectrometry (QMS) on gold nanopowder confirmed that AuClPEt₃ was the primary volatile product. The intensity of the AuClPEt₃+ ion peaked early in each PEt₃ dose, indicative of a self-limiting reaction where gold is etched in controlled increments.

Structural Integrity of Gold Nanoparticles

Analysis using X-ray photoelectron spectroscopy (XPS) and transmission electron microscopy (TEM) showed that the ALE process did not roughen the surface of gold nanoparticles. This smoothness is crucial for applications in electronics and photonics, where surface quality affects device performance. Additionally, powder X-ray diffraction (XRD) revealed slight broadening of diffraction peaks post-ALE, indicating sintering and suggesting that gold redistribution could contribute to the formation of larger nanoparticles.

Combined Implications of ALD and ALE for Gold

The complementary nature of Barry’s PEALD for gold deposition and George’s thermal ALE for gold etching offers an unprecedented level of control over gold at the atomic level. Together, these methods enable:

High-Precision Patterning: Combined ALD and ALE allow for nanoscale patterning of gold films with atomic precision, benefiting fields such as semiconductor manufacturing and nanotechnology.

Surface Engineering: The smoothness and control over film morphology achieved through these processes make it possible to engineer gold surfaces with specific properties, crucial for sensors, catalysis, and plasmonic devices.

Enhanced Flexibility in Fabrication: The ability to alternate between deposition and etching at the atomic scale provides unparalleled flexibility, especially for creating multilayer structures or complex geometries in microelectronics and MEMS devices.

Sources:

https://pubs.acs.org/doi/10.1021/acs.chemmater.4c00485

Previous Articles on Gold ALD:

BALD Engineering - Born in Finland, Born to ALD: Thermal Atomic Layer Deposition of Gold

BALD Engineering - Born in Finland, Born to ALD: Thermal Atomic Layer Deposition of Gold: Mechanistic Insights, Nucleation, and Epitaxy

BALD Engineering - Born in Finland, Born to ALD: University of Helsinki present a thermal ALD gold process

BALD Engineering - Born in Finland, Born to ALD: Picosun and Carleton Strike Gold with ALD