Showing posts with label ALE - Atomic Layer Etching. Show all posts
Showing posts with label ALE - Atomic Layer Etching. Show all posts

Monday, February 26, 2024

PRiME 2024: A Global Convergence on Atomic Layer Processing Set for Honolulu This October

The PRiME Joint International Meeting, organized by the Electrochemical Society and sister societies from Japan and Korea, will take place from October 6-11, 2024, in Honolulu, Hawaii. Anticipating over 4000 participants, the conference will focus on solid-state science, technology, and electrochemistry. Symposium G01 invites submissions on Atomic Layer Deposition and Etching, covering topics from semiconductor applications to energy storage. The deadline for abstract submission is April 12, 2024. Last year's event saw 78 presentations, indicating a strong interest in the field. For visa, travel information, and participation letters, contact ECS representatives.



Every four years, the PRiME Joint International Meeting is held under the auspices of the Electrochemical Society (ECS), joint with its sister Societies of Japan and Korea.

This fall, PRIME 2024 will be held on Oct. 6-11, 2024 in Honolulu, Hawaii, and is expected to gather over 4000 participants and 40 exhibitors from both academia and industry.

The conference has a strong focus on emerging technology and applications in both solid-state science & technology and electrochemistry.

General information and the Meeting Program can be found here: CALL FOR PAPERS.

The organizers of symposium G01 on “Atomic Layer Deposition & Etching Applications, 20” encourage you to submit your abstract(s) on topics, comprising but not limited to:

1. Semiconductor CMOS applications: development and integration of ALD high-k oxides and metal electrodes with conventional and high-mobility channel materials;

2. Volatile and non-volatile memory applications: extendibility, Flash, MIM, MIS, RF capacitors, etc.;

3. Interconnects and contacts: integration of ALD films with Cu and low-k materials;

4. Fundamentals of ALD processing: reaction mechanisms, in-situ measurement, modeling, theory;

5. New precursors and delivery systems;

6. Optical, photonic and quantum applications; applications aiming at Machine Learning, Artificial Intelligence

7. Coating of nanoporous materials by ALD;

8. Molecular Layer Deposition (MLD) and hybrid ALD/MLD;

9. ALD for energy conversion applications such as fuel cells, photovoltaics, etc.;

10. ALD for energy storage applications;

11. Productivity enhancement, scale-up and commercialization of ALD equipment and processes for rigid and flexible substrates, including roll-to-roll deposition;

12. Area-selective ALD;

13. Atomic Layer Etching (‘reverse ALD’) and related topics aiming at self-limited etching, such as atomic layer cleaning, etc.

FYI: Last year in Gothenburg, our symposium G01 on ALD & ALE Applications 19 attracted a record number of 78 presentations, composing a full 4-day schedule of 66 oral (of which 18 invited), plus 12 poster presentations.

We will traditionally attract more attendants from Far East and expect to be as successful this fall in Hawaii.

Abstract submission

Meeting abstracts should be submitted not later than the deadline of April 12, 2024 via the ECS website: Submission Instructions

Invited speakers

A list of confirmed invited speakers (from North America, Asia and Europe) will soon be available.

Visa and travel

For more information, see: VISA AND TRAVEL INFORMATION

In addition, Mrs. Francesca Spagnuolo at the ECS (Francesca.Spagnuolo@electrochem.org) can provide you with an official participation letter issued by the Electrochemical Society.

For (limited) general travel grant questions, please contact travelgrant@electrochem.org.

We are looking forward to meeting you all at our symposium G01 on ALD & ALE Applications 20, in Honolulu | Oct. 6-12, 2024 !

Symposium organizers:

F. Roozeboom, (lead), University of Twente; e-mail: f.roozeboom@utwente.nl,
S. De Gendt, IMEC & Catholic University Leuven,
J. Dendooven, Ghent University,
J. W. Elam, Argonne National Laboratory,
O. van der Straten, IBM Research,
A. Illiberi, ASM Europe,
G. Sundaram, Veeco,
R. Chen, Huazhong University of Science and Technology,
O. Leonte, Berkeley Polymer Technology,
T. Lill, Clarycon Nanotechnology Research,
M. Young, University of Missouri,
A. Kozen, University of Vermont.

Saturday, January 27, 2024

AlixLabs Celebrates Gold Sponsorship at ALD/ALE 2024 in Helsinki: Honoring Dr. Tuomo Suntola and Embracing Advances in Atomic Layer Etching

 We are proud to be Gold Sponsors of ALD/ALE 2024 in Helsinki, Finland . We look forward to contribute to the conference program and meet you in the exhibition. We especially look forward to join the celebration 50 Years of ALD and honor the inventor and Millennium Prize Winner 2018 Dr. Tuomo Suntola.


It is also a prime event for Atomic Layer Etching this year since our CTO Dr. Dmitry Suyatin and our Advisory Board Member Prof. Fred Roozeboom are co-chairing the ALE Conference!

Please visit The Conference Page for full details: https://ald2024.avs.org/





Friday, December 1, 2023

ASD2024: Uniting the World of Area Selective Deposition in Historic Old Montreal

Announcement for ASD2024 Workshop

Dates: April 15-16, 2024

Location: Old Montreal, Canada

Welcome and bienvenue to the exciting Area Selective Deposition (ASD) workshop to be held in the picturesque Old Montreal. This two-day event, scheduled for April 15 and 16, offers an enriching platform for both academic and industry professionals to exchange groundbreaking ideas in the field of ASD.


Special Sessions:

1. Pre-Workshop Tutorial: A comprehensive half-day tutorial on April 14 (Sunday afternoon). Note: This session requires an additional fee.

2. Atomic Layer Processing Showcase: A half-day event on April 17 (Wednesday morning), highlighting Canada's advancements in atomic layer processing. This session is included in the conference fee.



Conference Venues:

- Hotel Place d'Armes (55 Rue Saint-Jacques): Main sessions and lunches on Monday and Tuesday will be hosted here. This 4-star hotel is conveniently located near a metro stop.

- Hotel Nelligan (106 Saint-Paul St W): A 4-star boutique hotel, the venue for the opening mixer on Sunday evening and the poster session on Monday evening.

Workshop Highlights:

- Single session format over two days featuring invited and contributed talks.

- A panel discussion focusing on the industrial and academic communication of ASD.

- Networking opportunities with leading experts and peers.

Explore Montreal:

Participants are encouraged to experience the charm of Old Montreal, known for its vibrant restaurants, bars, shopping venues, and historical sites like the Notre Dame Basilica and the port. For sports enthusiasts, the Circuit Gilles Villeneuve offers a unique opportunity for running and cycling.

Organizers:

- Prof. Sean Barry, Carleton University

- Prof. Paul Ragogna, Western University


Scientific Committee:

- Adrie Mackus, Eindhoven University of Technology

- Anjana Devi, Ruhr University Bochum

- Annelies Delabie, IMEC

- Anuja DaSilva, Lam Research

- Dennis Hausmann, Lam Research

- Erwin Kessels, Eindhoven University of Technology

- Gregory Parsons, North Carolina State University

- Han-Bo-Ram Lee, Incheon National University

- Ishwar Singh, IBM

- Keyvan Kashefi, Applied Materials

- Kristen Colwell, Intel

- Mark Saly, Applied Materials

- Marko Tuominen, ASM

- Ralf Tonner-Zech, Wilhelm-Ostwald-Institute für Physikalische und Theoretische Chemie

- Ravi Kanjolia, EMD Electronics

- Robert Clark, TEL

- Sang Hoon Ahn, Samsung Electronics

- Seung Wook Ryu, SK hynix

- Stacey F. Bent, Stanford University

Contact Information:

asd2024.ca

Friday, November 24, 2023

Oxford Instruments Secures Major Orders for GaN ALE & ALD Systems from Leading Japanese Power Electronics and RF fabs

Oxford Instruments has received significant orders for its GaN ALE (Atomic Layer Etch) and ALD (Atomic Layer Deposition) systems from major Japanese foundries specializing in power electronics and RF (Radio Frequency). These systems are essential for producing GaN (Gallium Nitride) HEMT (High Electron Mobility Transistor) devices, catering to rapidly growing markets such as consumer fast-charging, data centers, and 5G/6G communications.


Oxford Instruments Plasma Technology staff at ALD2018/ALE2018 in Korea (Looking Back on ALD/ALE 2018 - Oxford Instruments (oxinst.com))

The company's ALD technology is known for its high throughput and low damage plasma processing, enhancing film and interface quality. It is widely used by leading GaN HEMT device manufacturers globally. The ALE solution, particularly for p-GaN HEMTs, is production-qualified and offers precise etching with minimal damage, featuring Etchpoint®, a unique endpoint detection technology developed in collaboration with LayTec AG.



Atomic Scale Processing

Etchpoint® allows for automated transition from standard high-rate etching to low damage ALE, improving device reliability. It enables precise AlGaN recess etches, crucial for the next generation GaN MISHEMT E-mode devices, with an accuracy of ±0.5 nm. These technologies can be integrated into an automated handler for multi-chamber processing without breaking vacuum, enhancing device performance and yield at a lower cost.



Gallium Nitride (GaN) provides higher breakdown strength, faster switching speed, and higher thermal conductivity for power electronics and RF applications. To support the high-volume manufacture of reliable GaN HEMT devices, Oxford Instruments in collaboration with LayTec have developed and optimised a new etch-depth monitoring solution to reliably fabricate GaN HEMT device structures. PlasmaPro 100 ALE with Etchpoint® system provides low damage etching with surface smoothing with unparalleled accuracy in target etch depth for devices such as p-GaN HEMTs and recessed gate MISHEMTs. Etchpoint is fully integrated with both the hardware and software of the PlasmaPro 100 ALE system, offering unrivalled accuracy of etch layer depth for GaN and AlGaN.

Dr. Aileen O'Mahony, GaN Product Manager at Oxford Instruments Plasma Technology, highlighted the significance of these orders from Japan, emphasizing the optimization of their ALD solution for GaN-surface plasma pre-treatment and the implementation of ALE with Etchpoint®. These developments are crucial in addressing complex challenges in device manufacturing while ensuring high throughput, reliability, and uptime in production.


Tuesday, November 21, 2023

Revolutionizing Power Technology: Intel's Integrated CMOS Driver-GaN (DrGaN) Power Switch for Enhanced Efficiency and Density in Data Centers and Networks

Intel researchers have developed an integrated CMOS Driver-GaN (DrGaN) power switch, combining gallium nitride (GaN) and silicon CMOS technologies on a 300mm GaN-on-Si platform. This innovation is designed to meet the increasing power density and efficiency needs of data centers and networking platforms. The new device, termed DrGaN, features an e-mode HEMT and an integrated 3D monolithic Si PMOS. It's capable of addressing the power requirements of future CPUs and GPUs, showing excellent resistance and leakage performance. A key advancement is the development of a new gate-last process flow for 3D monolithic integration of GaN and Si CMOS through layer transfer. 


Intel researchers have developed an integrated CMOS Driver-GaN (DrGaN) power switch, combining gallium nitride (GaN) and silicon CMOS technologies on a 300mm GaN-on-Si platform.

This process involves completing the high-temperature activation steps for the Si CMOS transistors before depositing the GaN transistor's gate dielectric, solving a major challenge in integrating these two technologies. This method also allows GaN and Si CMOS transistors to share the same backend interconnect stack, which reduces resistance and mask count. The new technology demonstrates great promise for scaling, evidenced by a figure of merit of 0.59 (mΩ-nC)-1 for a 30nm gate-length GaN MOSHEMT. The paper includes images of the new process flow, the 3D monolithic integration, and the layout of a DrGaN unit cell, illustrating the advanced integration and circuitry of this novel power device.

Monday, October 23, 2023

TSMC To Report Breakthrough in NMOS Nanosheets Using Ultra-Thin MoS2 Channels at IEDM 2023

A TSMC-led research team, in collaboration with National Yang Ming Chiao Tung University and National Applied Research Laboratories, has unveiled promising results for using ultra-thin transition metal dichalcogenides (TMDs), specifically MoS2, as the channel material in NMOS nanosheets. Their innovative approach deviates from the conventional method of thinning Si channels. The team's devices exhibited impressive performance metrics: a positive threshold voltage (VTH) of ~1.0 V, a high on-current of ~370 µA/µm at VDS = 1 V, a large on/off ratio of 1E8, and a low contact resistance ranging between 0.37-0.58 kΩ-µm. These outcomes were primarily attributed to the introduction of a novel C-shaped wrap-around contact, which enhances contact area, and an optimized gate stack. While the devices demonstrated satisfactory mechanical stability, a challenge remains in addressing defect creation within the MoS2 channels. This groundbreaking study, titled "Monolayer-MoS2 Stacked Nanosheet Channel with C-type Metal Contact" by Y-Y Chung et al., is a pivotal step forward in nanosheet scaling using TMDs.


ALD is a the technique for the precise and uniform synthesis of MoS₂, especially for semiconductor applications on large-scale wafers. The choice of precursors plays a crucial role in achieving optimal deposition characteristics. Mo (CO) 6 and H2S have been identified as the primary precursors for depositing molybdenum and sulfur components, respectively. These precursors have demonstrated the capacity for self-limiting growth behavior within a specific ALD temperature window, leading to uniform MoS₂ layers. Notably, this process has been successfully scaled up to achieve highly uniform film growth on large 300 mm SiO2/Si wafers, marking its potential for industry-level manufacturing. The ability to maintain uniformity and thickness control on such wafers emphasizes the potential of ALD in integrating MoS₂ into next-generation electronic devices and further underscores the significance of selecting appropriate precursors for optimal deposition outcomes. Other precursors have been investigated. MoCl₅ and MoF₆ serve as alternative molybdenum sources. For the sulfur component, H₂S is commonly paired with molybdenum precursors, but (CH₃)₂S has also been explored. The choice of these precursors directly impacts the properties of the resulting MoS₂ film in the ALD process and therefore precursor development for 2D MoS2 is a hot field of ongoing research.

While deposition methods are abundant, etching processes are comparatively scarce. Recent research by Elton Graugnard et al also introduces a thermal Atomic Layer Etching (ALE) technique for MoS2, leveraging MoF6 for fluorination, alternated with H2O exposures, to etch both crystalline and amorphous MoS2 films. This process has been characterized using various analytical techniques like QCM, FTIR, and QMS. The etching is temperature-dependent, with a significant increase in mass change per cycle as temperature rises. The mechanism involves two-stage oxidation of Mo, producing volatile byproducts. The resultant etch rates were established for different films, and post-etch annealing rendered crystalline MoS2 films. The thermal MoS2 ALE introduces a promising low-temperature method for embedding MoS2 films in large-scale device manufacturing.



Saturday, September 9, 2023

Unlock the Future of Materials and Products: Join the MERCK ALD and ALE Innovation Webinar!

Join us for an exciting event on October 18, 2023: "Revolutionizing Materials and Products: Innovations in Atomic Layer Deposition (ALD) and Atomic Layer Etch (ALE)." Presented by Sergei Ivanov, Senior R&D Manager at Merck KGaA, and Martin McBriarty, Senior Scientist, this webinar promises groundbreaking insights into the world of materials and product innovation.

Event Details:

Date: October 18, 2023

Time: 4:00 pm - 5:00 pm CET

Host: Laith Altimime, President of SEMI Europe

Agenda:

- 4:00 pm CET - Welcome remarks by Laith Altimime, President, SEMI Europe.

- 4:05 pm CET - "Revolutionizing Materials and Products: Innovations in Atomic Layer Deposition (ALD) and Atomic Layer Etch (ALE)" by Sergei Ivanov & Martin McBriarty.

- 4:45 pm CET - Q&A session moderated by Laith Altimime, followed by conclusions from all speakers.

About the Speakers:

Sergei Ivanov: Sergei is the Senior R&D Manager in the Organometallics division of Thin Films Business. He leads a research program focused on developing novel precursors for the deposition of metal, metal nitride, and metal oxide films. Sergei holds a PhD in Inorganic Chemistry from Kurnakov Institute of Russian Academy of Sciences and a B.S. in Chemical Engineering from Mendeleev University of Chemical Technology.

Martin McBriarty: Martin is a Senior Scientist leading the development of atomic layer etch and other vapor-phase etch methods. He earned his B.S. in Materials Science & Engineering at the University of Florida and his Ph.D. in the same field at Northwestern University. Martin joined Intermolecular in 2018 after completing postdoctoral research at Pacific Northwest National Laboratory.



Wednesday, August 30, 2023

Announcement Symposium G01 on “ALD & ALE Applications, #19” at the 244th ECS Meeting in Gothenburg, Sweden, Oct. 8-12, 2023

Announcement Symposium G01 on “ALD & ALE Applications, #19

at the 244th ECS Meeting in Gothenburg, Sweden, Oct. 8-12, 2023

See for detailed information about the 48 symposia, late manuscript submission requirements, and financial assistance: https://www.electrochem.org/244/.


Early (pre-)registration deadline is September 11, 2023.



In the ONLINE PROGRAM you can find symposium G01 on “ALD & ALE Applications, #19” which runs from Monday through Thursday Oct. 9-12 with a total of 77 presentations, incl. 1 keynote and 17 invited speakers. 


Sponsors of Symposium G01 on “ALD & ALE Applications, #19”





Monday, August 28, 2023

The Future of Nanoimprint Lithography: Exploring Possibilities and Challenges for High-Volume Production

Nanoimprint lithography (NIL) has emerged as a promising technique for the replication of intricate nano-scale features, offering higher resolution and uniformity compared to traditional photolithography methods. As semiconductor technology advances towards smaller and more complex structures, NIL holds the potential to revolutionize high-volume production processes. In this blog post, we'll delve into the current status of nanoimprint lithography and the possibilities it presents for future high-volume productions, as well as the main issues and concerns that need to be addressed.

NIL utilizes a process where a patterned mask is brought into contact with a resist-coated substrate. The resist fills the relief patterns in the mask through capillary action, creating precise nano-scale features. With a focus on simplicity and cost-effectiveness, NIL doesn't require the complex optics found in traditional photolithography, making it an attractive option for semiconductor memory applications.

Early work on combining NIL and Atomic Layer Etching by AlixLabs Founders

AlixLabs (www.alixlabs.com)  founders and Lund Nano Lab (Lund University, Sweden) collaborated 2018 to exploit Atomic Layer Etching (ALE) for improved NIL quality and resolution. ALE involved Cl2 monoatomic layer adsorption on silicon, followed by controlled Cl2-modified silicon layer removal using argon bombardment. This precision process allowed diverse nanopatterns to be etched onto silicon wafers with electron beam lithography. The treated wafers served as robust nanoimprint stamps in a thermal process, transferring features as small as 30 nm into a poly(methyl methacrylate) layer. ALE's potential for ultrahigh-resolution nanoimprint stamp fabrication advances nanofabrication techniques significantly.

Most Recent Achievements:

Recent study by TEL and Canon have demonstrated NIL's resolution capabilities of better than 10 nm, positioning the technology as a candidate for printing multiple generations of critical memory levels using a single mask. The potential to eliminate material waste by applying resist only where necessary adds to its appeal. Moreover, the simplicity and compactness of NIL equipment allow for clustered setups, enhancing productivity.

NIL Addressing Challenges in DRAM Scaling:

Dynamic Random Access Memory (DRAM) memory faces the challenge of continued scaling, with roadmap targets aiming at half pitches of 14 nm and beyond. The complexities of achieving tighter overlays, greater precision in critical dimensions, and edge placement errors demand innovative solutions. In DRAM fabrication, overlay requirements are even more stringent than in NAND Flash, with an error budget of 15-20% of the minimum half pitch.

Edge Placement Error (EPE):

EPE, the difference between intended and printed features, poses a significant challenge in modern semiconductor manufacturing. The intricacies of multiple patterning schemes and intricate device layouts contribute to EPE's complexity. Ensuring accurate placement of features is critical for maintaining device yield and performance.

The Quasi-Atomic Layer Etch (Quasi-ALE) process

The process is a specialized etching technique employed in advanced semiconductor manufacturing, particularly in processes like Nanoimprint Lithography (NIL). Quasi-ALE combines elements of Atomic Layer Etching (ALE) and conventional etching methods to achieve precise and controlled material removal. In the context of Nanoimprint Lithography, Quasi-ALE is used to etch materials with exceptional precision, targeting nanoscale features while minimizing damage to the surrounding areas. It involves a cyclic process where alternating etching and passivation steps are applied to the substrate. Each cycle removes a controlled layer of material, ensuring highly uniform etching and minimal lateral etch. One can discribe Quasi-ALE as a more productive way of performing ALE.

The key steps of the Quasi-ALE process typically involve:

1. Etch Step: During this step, a reactive gas is introduced into the etch chamber, which chemically reacts with the material to be removed. This reaction results in the selective removal of the material layer.

2. Passivation Step: In this step, a passivating species is introduced, forming a protective layer on the substrate surface. This layer prevents further etching and preserves the material beneath.

3. Purge and Repeat: The chamber is purged to remove any excess gases, and the process is repeated in a cyclical manner. Each cycle removes a controlled atomic layer of material.

Quasi-ALE is particularly advantageous for applications requiring high precision and control, such as in Nanoimprint Lithography, where maintaining accurate pattern dimensions and minimizing damage is critical. By combining the benefits of both ALE and traditional etching, Quasi-ALE enables advanced semiconductor manufacturing processes to achieve unprecedented levels of accuracy and uniformity.



Addressing EPE with Nanoimprint Lithography:

Researchers are actively exploring techniques to mitigate edge placement errors in nanoimprint lithography. This includes focusing on overlay accuracy, critical dimension uniformity (CDU), and local CDU. Compensatory methods such as dose control and reverse tone pattern transfer are being investigated to improve CDU and minimize errors.

The Role of Dose Control:

Varying the exposure dose offers a means of achieving small shifts in critical dimensions. Initial studies suggest that dose variations could lead to CD shifts of one to 2 nm. This strategy holds promise for enhancing CDU in the imprint process.

Reverse Tone Pattern Transfer:

Reverse tone processes, involving spin-on hard mask (SOHM) application and etch-back, offer an alternative approach to pattern transfer. While this method provides advantages such as reduced resist erosion and improved wall angles, trade-offs between CDU and line width roughness (LWR) need to be addressed.

Looking Ahead: The Possibilities and Challenges:

While NIL exhibits impressive potential, there are key challenges to overcome before it can be effectively integrated into high-volume semiconductor manufacturing. Ensuring precise overlay accuracy, managing complex CDU requirements, and effectively addressing edge placement errors remain pivotal. As the industry strives to achieve the roadmap's aggressive scaling targets, the evolution of nanoimprint lithography will undoubtedly play a crucial role.

Nanoimprint lithography is poised to reshape the semiconductor manufacturing landscape, offering higher resolution and cost-efficiency compared to traditional methods. With ongoing research and development, addressing challenges such as overlay accuracy, CDU, and EPE, the path to successful high-volume production through NIL seems promising. As technology continues to advance, the journey towards perfecting nanoimprint lithography is an exciting one, holding the potential to shape the future of chip fabrication.

Tokyo Electron (TEL): 

TEL specializes in Nanoimprint Lithography (NIL) technology, offering precision equipment, advanced etching solutions, and expertise in process control. They excel in alignment, overlay correction, CDU management, and etching technology.

TEL has previously demonstrated that for sub 7  nm CMOS technology, ALE and ALD integration improves SAC and patterning processes, achieving precise CD shrinking and enhanced selectivity.

Canon: 

Canon contributes to Nanoimprint Lithography (NIL) advancement by leveraging TEL's strengths in alignment, overlay correction, CDU management, and advanced etching solutions. They integrate these capabilities with the Reverse Tone Pattern Transfer, ensuring precise pattern replication and fidelity. Canon's focus on innovation drives high-resolution, cost-effective solutions for semiconductor manufacturing.

Canon has introduced a groundbreaking solution in the field of semiconductor technology with the development of the world's first mass-production equipment called the "FPA-1200NZ2C." This innovative tool utilizes nanoimprint lithography, a cutting-edge technique that involves imprinting nanometer-scale mask patterns onto substrates. By adopting this novel approach, Canon aims to overcome the limitations of conventional miniaturization methods. The FPA-1200NZ2C is already in use by Toshiba Memory, a prominent semiconductor memory manufacturer. This advancement marks a significant step forward in semiconductor manufacturing, enabling the creation of more intricate and advanced circuit patterns.

Sources:

High-Definition Nanoimprint Stamp Fabrication by Atomic Layer Etching — Lund University

Nanoimprint post processing techniques to address edge placement error (spiedigitallibrary.org)

Nanoimprint Lithography | Canon Global

FPD Lithography Equipment | Canon Global

Benefits of atomic-level processing by quasi-ALE and ALD technique - IOPscience

www.alixlabs.com

Acknowledgement :

Thanks for sharing the SPIE article on LinkedIn and giving insights Frederick Chen!


Tuesday, August 22, 2023

Immersive Collaboration: Imitera and AlixLabs Join Forces to Transform Semiconductor Manufacturing

In a groundbreaking partnership, Extended Reality (XR) technology leader Imitera and semiconductor innovator AlixLabs are set to reshape the way industries collaborate and innovate. The collaboration aims to leverage the power of XR to enhance visualization and communication within AlixLabs' semiconductor manufacturing process.

Revolutionizing Collaboration with XR

Imitera's cutting-edge XR platform is poised to unlock a new era of collaboration for AlixLabs. By creating a virtual environment where teams can interact with atomic and molecular structures, XR technology enables live testing and seamless sharing of information. This revolutionary approach empowers teams to make decisions collaboratively, irrespective of geographical barriers.


From Virtual Atoms to Real Insights

Dr. Jonas Sundqvist, CEO of AlixLabs, expressed his amazement at the insights gained through the XR atomic level world. He likened the experience to being immersed in an IKEA ball bath as he and his team explored atomic-level structures virtually. The technology not only sparks imagination but also provides real-world benefits for dispersed teams, like AlixLabs', to engage as if they were physically present.

XR Paving the Way for Industry Innovation

The collaboration between Imitera and AlixLabs exemplifies the transformative potential of XR technology. By addressing the demand for immersive, cost-effective, and user-friendly experiences, Imitera's XR solutions have the power to drive innovation across various industries. AlixLabs' groundbreaking semiconductor manufacturing technique coupled with Imitera's XR platform showcases a new way forward for industries to connect, visualize, and innovate.

Looking Ahead

The partnership between Imitera and AlixLabs isn't just about merging technologies; it's about merging minds. With XR technology as the bridge, teams can transcend traditional barriers and engage in a shared space that fosters creativity and informed decision-making. This collaboration marks a significant step toward revolutionizing industries and shaping the future of collaboration.

In a world where physical distances are no longer limitations, the synergy between XR and semiconductor innovation is a testament to human ingenuity. As these two worlds converge, the possibilities for cross-industry collaboration and discovery are boundless.

Imitera and AlixLabs Collaborate Using Cutting-Edge XR Solution to Revolutionize the Visualization of Atomic Level Semiconductor Manufacturing - AlixLabs AB (cision.com)

Monday, June 12, 2023

Merck Showcases Expertise in Thin Film Deposition and Atomic Layer Etching at AVS ALD 2023 Conference

Leading scientists and engineers from MERCK present papers on advanced materials and semiconductor processing techniques at AVS ALD/ALE 2023.

Merck, a global science and technology company, is set to participate as a sponsor in the 23rd International Conference on Atomic Layer (ALD/ALE) 2023 organized by the Association for Science and Technology of Materials, Interfaces & Processing (AVS). The conference focuses on the science and technology of atomic layer-controlled deposition of thin films and related topics such as atomic layer etching.

Merck's leading engineers and experts will present their research papers at the conference, covering a wide range of cutting-edge topics. Thong Ngo, a Senior Process Engineer, will discuss the synthesis of 2D MoSe2 by atomic layer deposition on a wafer scale. Randall Higuchi, a Process Engineer, will present an evaluation of Zr and Hf precursors with higher thermal stability for atomic layer deposition of ZrO2 and HfO2 films.

Ravi Kanjolia, a Technology Fellow at Merck, will explore the reverse templating effects of low-resistivity Ru Ald on sputtered Ru, while Haripin Chandra, a Senior R&D Manager, will discuss the properties of VHF PEALD silicon nitride film deposited by precursors with different amino ligands. Martin McBriarty, a Materials Scientist, will present on thermal ALE reactants for semiconductor processing, and Ravi Kanjolia will also discuss crystalline gallium nitride deposition on SiO2/Si by RF-biased atomic layer annealing.


Furthermore, Haripin Chandra will participate in the Emerging Materials Session, focusing on EUV lithography materials. Merck's experts will offer valuable insights and share their expertise with the conference attendees, contributing to the advancement of thin film deposition and atomic layer-controlled processes.


Merck's presence at AVS ALD 2023 demonstrates the company's commitment to advancing technology and providing innovative materials solutions. Attendees will have the opportunity to connect with Merck's experts on-site for personalized advice and support. The conference, being held from July 23 to July 26, 2023, in Bellevue, Washington, promises to facilitate knowledge exchange and foster collaborations among scientists and industry professionals in the field of atomic layer-controlled deposition.

Source: The 23rd International Conference on Atomic Layer (ALD/ALE) 2023 | Merck (merckgroup.com)

Wednesday, May 3, 2023

AVS ALD2023 & ALE2023 Late News Abstracts Due May 5 - May The 4th Be With You!

 

 

 

Technical Program

Late News Abstracts Due May 5

 

 

Hotel Deadline:

June 29

 

 

Early Registration:

June 1

 

 

The AVS 23rd International Conference on Atomic Layer Deposition (ALD 2023) featuring the 10th International Atomic Layer Etching Workshop (ALE 2023) will be a three-day meeting dedicated to the science and technology of atomic layer controlled deposition of thin films and atomic layer etching. Since 2001, the ALD conference has been held alternately in the United States, Europe and Asia, allowing fruitful exchange of ideas, know-how and practices between scientists.

 

The conference will take place Sunday, July 23-Wednesday, July 26, 2023, at the Hyatt Regency Bellevue in Bellevue, Washington (East Seattle). As in past conferences, the meeting will be preceded (Sunday, July 23) by one day of tutorials and a welcome reception. Sessions will take place (Monday-Wednesday, July 24-26) along with an industry tradeshow. All presentations will be audio-recorded and provided to attendees following the conference (posters will be included as PDFs). Anticipated attendance is 800+.

Late News Abstracts

Due May 5, 2023

Presenters are limited to one oral and one poster presentation. One submission must be to an oral session and one to a poster session. It must be two different abstracts, not the same abstract submitted as both an oral and a poster.

 

 

 

Key Deadlines:

Late Abstract Deadline:

May 5, 2023

Early Registration Deadline: June 1, 2023

Hotel Reservation Deadline: June 29, 2023

Manuscript Deadline: November 1, 2023

 

 

 

ALD Plenary Speaker

Markku Leskelä

(University of Helsinki, Finland)

 

ALE Plenary Speaker

Tristan Tronic

(Intel, USA)

 

 

ALD Program Chairs

 

Program Chair:

Seán Barry

(Carleton University, Canada)

 

Program Co-Chair:

Scott Clendenning

(Intel, USA)

ALE Program Chairs

 

Program Chair:

Jane Chang

(University of California,

Los Angeles, USA)

 

Program Co-Chair:

Steve George

(University of Colorado at Boulder, USA)

 

Program Co-Chair:

Thorsten Lill

(Lam Research, USA)