Sunday, November 5, 2023
Global Semiconductor Sales See Mixed Trends: Monthly Rise Amid Annual Decline
Thursday, November 2, 2023
Atlas Copco to Bolster Semiconductor Portfolio with Acquisition of South Korean Vacuum Valve Company, Presys Co., Ltd.
- Atlas Copco set to acquire South Korean vacuum valve producer, Presys Co., Ltd.
- Presys reported a revenue of MKRW 35,000 in 2022 and has a workforce of 134.
- The deal, pending regulatory approval, is anticipated to close in Q1 2024.
Monday, October 23, 2023
TSMC To Report Breakthrough in NMOS Nanosheets Using Ultra-Thin MoS2 Channels at IEDM 2023
Sunday, October 22, 2023
Hamas' Brutal Attacks on Israel Could Disrupt Global Tech Supply Chain and Intel's Expansion Plans
New US Roadmap Identifies Critical Semiconductor Research Priorities
Source: SIA, Erik Hadland, Director of Technology Policy New Roadmap Identifies Critical Semiconductor Research Priorities - Semiconductor Industry Association (semiconductors.org)
Friday, October 20, 2023
The Semiconductor Showdown: TSMC's GAA FETs vs. Intel's RibbonFET
As the semiconductor race intensifies, both companies are heavily invested in outpacing each other, with TSMC focusing on technology maturity and cost-effectiveness, and Intel aiming to regain its technology leadership. The dynamics between these tech giants will shape the semiconductor industry's future.
Comparison of Advanced Semiconductor Technology Nodes: TSMC N3P & N2 vs. Intel 20A & 18A, highlighting the competitive landscape of the semiconductor industry for the years 2024-2026 based on Toms Hardware article below.
Sources:
TSMC: Our 3nm Node Comparable to Intel's 1.8nm Tech | Tom's Hardware (tomshardware.com)
Intel and TSMC company web pages
Thursday, September 28, 2023
Semiconductor Supply Chain Problems Running Rampant?
Solutions to mitigate future materials supply vulnerabilities

Friday, September 15, 2023
Tokyo Electron Integrated Report/Annual Report 2023 available for download
For anyone involved in the semiconductor industry or those eager to gain fresh perspectives in this dynamic field, this report is a must-read. It not only showcases TEL's history and strategies but also sheds light on industry trends, sustainability practices, and the exciting developments shaping the future of semiconductor technology. Dive into this comprehensive report and unlock valuable knowledge about TEL's journey and the semiconductor industry at large.
Wednesday, September 13, 2023
Global Fab Equipment Spending to Rebound in 2024 After 2023 Slowdown, Predicts SEMI Report
Monday, September 11, 2023
Exploring SMIC's 7nm Semiconductor Advancements: Technology, Dimensions, and Future Prospects
The recent introduction of Huawei's Mate 60 Pro smartphone, featuring a 7 nm chip from Semiconductor Manufacturing International Corp. (SMIC), has raised questions about the authenticity of SMIC's technological strides and their implications. This summary dives into the heart of SMIC's 7 nm technology, shedding light on its dimensions, technological intricacies, challenges, and the outlook for the future.
However, it has been known for some time that SMIC has been developing at putting out 7 nm chips, and an early 2022 assessment published at Seeking Alpha can be found here: Applied Materials: SMIC Move To 7nm Node Capability Another Headwind (NASDAQ:AMAT) | Seeking Alpha
The SMIC 7 nm Technology Debate
Central to the debate surrounding SMIC's technology is the classification of whether it genuinely qualifies as 7 nm. Parameters such as Fin Pitch (FP), Contacted Poly Pitch (CPP), and Metal 2 Pitch (M2P) are scrutinized. While SMIC's FP pitches are larger than TSMC's 10 nm, its CPP and M2P dimensions match TSMC's 10 nm, creating a complex classification.
SMIC appears to have a serviceable first generation 7nm process now with a reasonable prospect to get to second generation 7nm/6nm in the near futures. 5nm and 3nm while theoretically possible would be highly constrained and expensive process versions if pursued due to the lack of EUV. - Scotten Jones, SemiWiki (LINK)
Design Technology Co-Optimization (DTCO) Features
SMIC's 7 nm process introduces Design Technology Co-Optimization (DTCO) features uncommon in traditional 10 nm processes. Notably, SMIC's track height is smaller than TSMC and Samsung's 10 nm processes, approaching 7 nm-class characteristics. These features add to the nuanced evaluation of SMIC's technological position.
Cell Density and Cut Masks
SMIC's high-density logic cell boasts an impressive 89 million transistors per millimeter squared, akin to Samsung and TSMC's first-generation 7 nm processes. This suggests that SMIC's technology aligns with the 7 nm category, though the debate on its dimensions continues. Notably, SMIC's process introduces larger Contacted Poly Pitch (CPP) dimensions, hinting at potential performance challenges that necessitated this adjustment.
The EUV Challenge and Future Prospects and Alternative Technologies
SMIC's journey toward further technological advancements faces significant hurdles due to the unavailability of extreme ultraviolet lithography (EUV) systems in China. EUV technology plays a pivotal role in pushing semiconductor boundaries. However, ongoing US restrictions on EUV system shipments to China constrain SMIC's options for achieving cutting-edge technology.
Self aligned multi patterning (SAMP) in Advanced Logic Semiconductor Manufacturing
In advanced logic semiconductor manufacturing, addressing the challenges posed by sub-5 nm nodes and dense metal layers is essential. SMIC can consider alternative technologies like Atomic Layer Deposition (ALD) and Directed Self-Assembly (DSA) to overcome these hurdles.
ALD stands out for its precision in depositing thin films, allowing for the creation of ultra-thin etch masks, spacers, and precise control over critical dimensions. On the other hand, DSA leverages materials' self-assembly properties to form predefined patterns, effectively dividing pitch sizes and simplifying lithography masks.
Incorporating ALD and DSA into semiconductor manufacturing processes has the potential to enhance the capabilities of immersion lithography, enabling smaller nodes without the need for EUV lithography. While these technologies require further research and development, they offer promise in helping semiconductor manufacturers advance their technology and remain competitive, particularly in the absence of EUV lithography equipment.
Together with self-aligned multi-patterning (SAMP) techniques like self-aligned double patterning (SADP), self-aligned quadruple patterning (SAQP), and self-aligned litho-etch-litho-etch (SALELE), these alternative approaches provide SMIC with a range of options to navigate the complexities of advanced semiconductor manufacturing, ultimately shaping the future of Chinese advanced chip fabrication.
The Future of Nanoimprint Lithography: High-Volume Production Possibilities
Nanoimprint lithography (NIL) offers potential for high-volume production with sub-10 nm resolution, revolutionizing semiconductor manufacturing. TEL and Canon have showcased NIL's sub-10 nm capabilities, making it suitable for multiple memory generations using a single mask. Challenges like edge placement errors (EPE) are addressed through precision techniques like Quasi-Atomic Layer Etch (Quasi-ALE). To achieve aggressive scaling targets, overlay accuracy and critical dimension uniformity (CDU) management are vital. NIL's simplicity and cost-effectiveness make it a promising contender, with ongoing development poised to refine its integration into semiconductor fabrication.Future Outlook for SMIC and China
193i Lithography Takes Center Stage...Again (semiengineering.com)
Does SMIC have 7nm and if so, what does it mean - SemiWiki
Look Inside Huawei Mate 60 Pro Phone Powered by Made-in-China Chip - Bloomberg
Applied Materials: SMIC Move To 7nm Node Capability Another Headwind (NASDAQ:AMAT) | Seeking Alpha
Thursday, August 31, 2023
Metal Plating Chemicals Revenues to Boost into 2024
Growth driven by developments in leading-edge logic and memory
“Increased usage of advanced packaging, redistribution layers, and copper pillar structures are all factors contributing to the growth of the metal chemicals market segment,” states Dr. Karey Holland, Chief Strategist at TECHCET.
Sunday, August 27, 2023
The Industiral Ecosystem of Si Chips and Atomic Layer Deposition - Webinar
Saturday, August 26, 2023
Global Semiconductor Industry Poised for 2024 Recovery Amidst Near-Term Challenges, SEMI Reports
In a recent report by SEMI, in collaboration with TechInsights, the global semiconductor industry shows signs of emerging from its downcycle, with a projected recovery expected in 2024. The report highlights that the third quarter of 2023 is anticipated to witness a healthy 10% quarter-on-quarter growth in electronics sales, while memory IC sales are set to achieve double-digit growth for the first time since the downturn began in 2022. Although headwinds persist in the semiconductor manufacturing sector during the latter half of 2023, a rebound is on the horizon.
Inventory drawdowns at integrated device manufacturer (IDM) and fabless companies are forecasted to keep fab utilization rates lower than those seen in the first half of 2023. Despite this, positive trends are noted in capital equipment billings and silicon shipments, stemming from government incentives and robust equipment sales backlogs.
Market indicators suggest the semiconductor industry reached its nadir by mid-2023, commencing a path to recovery, setting the stage for growth in 2024. All segments are predicted to witness year-over-year increases in 2024, with electronics sales projected to surpass their 2022 peak.
Clark Tseng, Senior Director of Market Intelligence at SEMI, pointed out that the gradual demand recovery might extend the timeline for inventory normalization until the end of 2023, leading to temporary reductions in fab utilization rates. Nevertheless, semiconductor manufacturing is expected to hit its bottom in Q1 2024.
Boris Metodiev, Director of Market Analysis at TechInsights, highlighted the resilience of equipment sales and fab construction despite the broader downturn. He attributed this trend to government incentives driving new fab projects and strong backlogs supporting equipment sales.
Original Source: SEMI https://www.semi.org/en/news-resources/press-releases/2023/08/global-semiconductor-industry-on-track-for-2024-recovery-but-near-term-headwinds-remain-semi-reports
Friday, August 25, 2023
AI Chip Market Poised to Soar: Gartner Predicts Revenue to Reach $53 Billion in 2023, Double by 2027
Thursday, August 24, 2023
TSMC Marks Major Milestone: First EUV Machine Installed in Arizona Fab, Job Opportunities Open
Taiwan Semiconductor Manufacturing Co. (TSMC) has achieved a significant milestone in its Arizona manufacturing venture by installing its inaugural extreme ultraviolet lithography (EUV) machine. This advanced machine, procured from Dutch semiconductor equipment leader ASML Holding NV, is a pivotal asset for TSMC's future high-end chip production endeavors.
EUV technology is a critical aspect of semiconductor fabrication, facilitating the printing of intricate designs on microchips significantly smaller than a human hair. TSMC's achievement underscores its commitment to innovation and technological leadership.
While the installation of the EUV machine marks a remarkable accomplishment, TSMC acknowledges that the setup of the new fab in Arizona involves numerous additional tasks. The company emphasized the need for approximately 2,000 skilled workers to handle the installation of various equipment pieces and services in the complex. This requirement stems from TSMC's unique tool configurations and specifications.
TSMC, recognized as the world's largest contract chip manufacturer, is channeling substantial investments amounting to $40 billion into constructing two wafer fabs in Phoenix. The first facility will employ the advanced 4-nanometer process, while the second, already under construction, will utilize the more sophisticated 3-nanometer process. This latter technology has already entered mass production in Taiwan.
The presence of skilled workers has been a contentious topic linked to the Arizona project. TSMC Chairman Mark Liu explained that a deficiency in experts capable of properly installing equipment at the Arizona site has led to a delay in mass production, now projected for 2025 rather than late 2024.
However, TSMC's approach to addressing this shortfall has sparked debates. The company's bid to bring in around 500 Taiwanese workers on temporary E-2 visas has faced resistance from local unions, who assert that prioritizing American jobs is paramount, especially considering the significant subsidies TSMC seeks under the CHIPS and Science Act. This legislation, signed by President Joe Biden, encourages semiconductor investments in the United States.
US Senator Mark Kelly of Arizona emphasized that the visa applications will be evaluated in accordance with established laws and procedures. As TSMC navigates these challenges, its progress in Arizona remains a focal point in the semiconductor industry's dynamic landscape.
TSMC installs first EUV machine in U.S.; job opening ads posted - Focus Taiwan
An Update on Directed Self-Assembly (DSA) for Advancing Micro and Nano Fabrication
DSA has emerged as a groundbreaking technique for mass-producing micro to nano devices and materials with precision and efficiency. This method harnesses the inherent properties of materials to assemble them into intricate structures, revolutionizing manufacturing processes across various industries.
DSA leverages block co-polymer morphology to create patterns, enhancing feature control and shape accuracy. This involves guiding the assembly of micro and nano particles to achieve desired structures, made possible by the precise control of surface interactions and polymer thermodynamics. The key advantage of DSA is its ability to create structures at remarkably small scales, enabling advancements in diverse fields.
In the semiconductor industry, DSA offers a new perspective on lithography challenges. Despite initial setbacks, DSA is being revisited to address critical issues such as stochastic defects in extreme ultraviolet (EUV) lithography. These defects, which can contribute significantly to patterning errors, have led semiconductor manufacturers to explore DSA as a solution to rectify these problems. Notably, DSA is not replacing traditional methods but rather enhancing them. It is being integrated with existing manufacturing processes to enable increased resolution and precision, all while reducing costs.
However, challenges persist in integrating DSA into high-volume manufacturing. Defect control remains a primary concern, as the technology strives to meet industry standards of minimal defectivity. Common defects include line bridging, collapse, bubbles, and dislocations. Efforts are ongoing to optimize annealing temperature, etching methods, and film thickness to reduce these defects. Another challenge is the complexity of pattern inspection, which demands accurate metrology methods. Researchers are exploring machine learning-based approaches to automate the inspection process and achieve higher throughput.
Despite these challenges, DSA is being applied to various applications beyond semiconductors. Tissue engineering benefits from the precision of directed assembly, enabling the controlled organization of cells into desired micro-structures. In nanotechnology, DSA facilitates the creation of precise nanostructures, leading to advancements in areas such as graphene nanoribbon arrays and thin-film quantum materials.
Revolutionizing EUV Lithography with Directed Self-Assembly (DSA)
EUV lithography has revolutionized semiconductor manufacturing but comes with its share of challenges, particularly in addressing line roughness and stochastic defects. DSA has now gained attention as a potential game-changer to tackle these issues in EUV lithography.
Recent research from Imec sheds light on the promising synergy between EUV and DSA in overcoming lithography challenges. In the study titled "EUV Lithography Line Space Pattern Rectification Using Block Copolymer Directed Self-Assembly: A Roughness and Defectivity Study," led by Julie Van Bel and team, the researchers explored the combination of DSA with EUV. Their findings indicate that this integration surpasses DSA processes based on Immersion lithography, offering lower line width roughness and freedom from dislocation defects.
Another study, "Mitigating Stochastics in EUV Lithography by Directed Self-Assembly," led by Lander Verstraete and collaborators, delved into the application of DSA to mitigate stochastic defects in EUV processing.
For contact arrays, the combination of EUV and DSA demonstrates improved Local Critical Dimension Uniformity (LCDU) and Pattern Placement Error. This advancement also enables the use of a lower dose, contributing to enhanced precision and efficiency in semiconductor manufacturing.
Imec's research underscores the potential of DSA to revolutionize EUV lithography by addressing line roughness and stochastic defects. The successful integration of EUV and DSA holds the promise of enhancing semiconductor manufacturing processes, achieving higher precision, and enabling the production of advanced devices with improved quality. As researchers continue to refine these methods, the collaboration between EUV and DSA is set to shape the future of lithography and microfabrication.
In conclusion, DSA is revitalizing micro and nano fabrication by offering accurate and efficient methods for mass production. While challenges like defect control and metrology persist, DSA's potential to shape the future of industries such as semiconductors, biomedicine, and nanotechnology is undeniable. As research continues to refine DSA processes and overcome hurdles, its role in advancing technology and innovation is set to expand further.
Directed Self-Assembly Finds Its Footing (semiengineering.com)