Monday, August 31, 2015

Extreme high apspect ratio nanotubes in polymer membranes produced by catalytic ALD

German scientists from Darmstadt and Hamburg has shown that the combination of ion-track technology and ALD provides unique opportunities for highly homogeneous and conformal coatings of extremely long nanochannels. The results clearly demonstrate successful conformal coating of cylindrical 30 μm long nanochannels with initial diameter between 55 and 18 nm by three different inorganic materials (TiO2, SiO2, and Al2O3). The ALD process was carefully adjusted to temperatures low enough to avoid damage to the ion-track etched polymer membranes.

 
(a) Flexible SiO2 nanotubes exhibiting an outer diameter of ~50 nm and a wall thickness of ~20 nm. (b) Al2O3 nanotubes (outer diameter ~50 nm, wall thickness ~15 nm), which are broken due to their rather high brittleness. They are attached to the flat Al2O3-film deposited on the polycarbonate surface. (c) TiO2 nanotubes (outer diameter ~100 nm due to 240 s of etching time, wall thickness ~10 nm) with a length corresponding to the template thickness.
Interestingly they have used the pyridine catalyzed process for H2O low temperature SiO2 (SiCl4) and for TiO2 (titanium isopropoxide). I have never seen it used for other than SiCl4 and HCDS for growing SiO2. This got me curious to know if there is any work done with other metal chlorides - you know the usual suspects - Zr, Hf, Ta, ...

Check out all the details and the experimental part especially in the OPEN ACCESS paper below!

TiO2, SiO2, and Al2O3 coated nanopores and nanotubes produced by ALD in etched ion-track membranes for transport measurements [OPEN ACCESS]

Anne Spende, Nicolas Sobel, Manuela Lukas, Robert Zierold, Jesse C Riedl, Leonard Gura, Ina Schubert, Josep M Montero Moreno, Kornelius Nielsch, Bernd Stühn, Christian Hess, Christina Trautmann and Maria E Toimil-Molares

Published 30 July 2015 • © 2015 IOP Publishing Ltd, Nanotechnology, Volume 26, Number 33


Scheme of fabrication of TiO2, SiO2, and Al2O3 coated track-etched membranes. (a) Polycarbonate foils are irradiated with high-energy heavy ions; each projectile creates an individual ion track; (b) chemical etching converts ion tracks into cylindrical nanochannels of well-defined diameter; (c) ALD of TiO2, SiO2, and Al2O3 produces conformal homogeneous coatings.
Low-temperature atomic layer deposition (ALD) of TiO2, SiO2, and Al2O3 was applied to modify the surface and to tailor the diameter of nanochannels in etched ion-track polycarbonate membranes. The homogeneity, conformity, and composition of the coating inside the nanochannels are investigated for different channel diameters (18–55 nm) and film thicknesses (5–22 nm). Small angle x-ray scattering before and after ALD demonstrates conformal coating along the full channel length. X-ray photoelectron spectroscopy and energy dispersive x-ray spectroscopy provide evidence of nearly stoichiometric composition of the different coatings. By wet-chemical methods, the ALD-deposited film is released from the supporting polymer templates providing 30 μm long self-supporting nanotubes with walls as thin as 5 nm. Electrolytic ion-conductivity measurements provide proof-of-concept that combining ALD coating with ion-track nanotechnology offers promising perspectives for single-pore applications by controlled shrinking of an oversized pore to a preferred smaller diameter and fine-tuning of the chemical and physical nature of the inner channel surface.

GEMStar-CAT Dual™ Dual Reactor ALD and Catalyst Synthesis System by Arradiance

US ALD company Arradiance has released a new version of their GEMStar series of ALD tools -The GEMStar-CAT Dual™ Dual Reactor ALD and Catalyst Synthesis System. The custom GEMStar-DUAL CatalystTM System developed in partnership with the Chemical Sciences and Engineering Division of Argonne National Laboratory has unique capabilities. Arradiance used its skill combining Atomic Layer Deposition, System Design and Controls to produce a system that is unparalleled for Catalyst synthesis research
 
 
 Full specs and details can be downloaded in here and a publication is given below:

Catalyst synthesis and evaluation using an integrated atomic layer deposition synthesis–catalysis testing tool

Jeffrey Camacho-Bunquin, Heng Shou, Payoli Aich, David R. Beaulieu, Helmut Klotzsch, Stephen Bachman, Christopher L. Marshall, Adam Hock, and Peter Stair

(Received 24 June 2015; accepted 4 August 2015; published online 24 August 2015)

An integrated atomic layer deposition synthesis-catalysis (I-ALD-CAT) tool was developed. It combines an ALD manifold in-line with a plug-flow reactor system for the synthesis of supported catalytic materials by ALD and immediate evaluation of catalyst reactivity using gas-phase probe reactions. The I-ALD-CAT delivery system consists of 12 different metal ALD precursor channels, 4 oxidizing or reducing agents, and 4 catalytic reaction feeds to either of the two plug-flow reactors. The system can employ reactor pressures and temperatures in the range of 10−3 to 1 bar and 300–1000 K, respectively. The instrument is also equipped with a gas chromatograph and a mass spectrometer unit for the detection and quantification of volatile species from ALD and catalytic reactions. In this report, we demonstrate the use of the I-ALD-CAT tool for the synthesis of platinum active sites and Al2O3 overcoats, and evaluation of catalyst propylene hydrogenation activity. © 2015 AIP Publishing LLC. [http://dx.doi.org/10.1063/1.4928614]

Japanese researchers provide record low Dit in ALD Al2O3/La2O3/InGaAs gate stacks

InGaAs is one of the most promising III/V semiconductor materials for n-channel MOSFETs because of its extremely high electron mobility of ∼13 800 cm2/V s. However, there  is a major issue with InGaAs not having a high quality native oxide like Silicon resulting in a high interface state density at InGaAs MOS interfaces degrades the MOSFET performance because of Ga dangling bonds and/or As-As dimers created during the oxidation process at InGaAs surfaces. It has been reported that the passivation of trivalent oxides such as Gd2O3 or Al2O3 with InGaAs surfaces can eliminate such dangling bonds and dimers because of the abrupt and chemical-bond-well-arranged interface between the trivalent oxides and InGaAs.


TEM image of Au/AlO (3.5 nm)/LaO (0.4 nm)/InGaAs gate stacks. Citation: J. Appl. Phys. 118, 085309 (2015); http://dx.doi.org/10.1063/1.4929650

ALD HfO2 has already been introduced at 45 nm CMOS and is still the dominating high-k material in high performance CMOS including recent Si FinFET technologies. Therefore, many have chosen to combine HfO with the AlO/InGaAs structure by continuously ALD has been employed for CET scaling. Thin CET of ∼1.08 nm and low of ∼5 × 1012 cm−2 eV−1 have been realized in the HfO/AlO/InGaAs gate stacks.

Another high-k that has commonly been used and is used e.g. as a dopant in the IBM Alliance 28 nm planar CMOS technology is LaO, which is also trivalent oxide. It has been shown on InGaAs that La2O3 can further improve the MOS interface quality by the formation of Ga-O-La and In-O-La bonds. [ref]

In a very good study presented below by University of Tokyo, JST-CREST and Sumitomo Chemicals a high quality LaO films were deposited on InGaAs by ALD. It was found that the LaO/InGaAs interfaces provide recorded-low of ∼3 × 1011 cm−2 eV−1 as the InGaAs MOS interfaces, which is attributable probably to the intermixing reaction between LaO and InGaAs. It is concluded, as a result, that the AlO/LaO/InGaAs gate stacks can realize lower than in the conventional AlO/InGaAs MOS interfaces with maintaining small hysteresis and low gate leakage by optimizing the thickness of AlO and LaO.

For me now some questions remains - why not combine the best of the best in one stack, i.e., HfO2/La2O3/InGaAs? Perhaps with only a slight touch of blend with Al2O3. Another question that worries me when reading HKMG InGaAs papers is the very low thermal budget that has to be used.  The first high-k layer is deposited at 150 deg. C not destroy the super sensitive InGaAs interface. Most high-k materials needs to be deposited in the ranger 250 to 300 deg.C in order to perform at its best in addition PDAs or PMAs will bring out even more out of the material. Here and in other studies that I have seen a PMA of only 300 deg. C is used. Just imagine bringing this stack on to a silicon based channel material and it will not perform too much better than old poly/SiON with respect to CET / Leakage performance. I guess in the end it is all about the higher mobility given by a III/V channel. It just hurts every time seeing all these smart guys using a relatively low performing high-k.

Please find the OPEN ACCESS publication below!

Impact of La2O3 interfacial layers on InGaAs metal-oxide-semiconductor interface properties in Al2O3/La2O3/InGaAs gate stacks deposited by atomic-layer-deposition [OPEN ACCESS]

C.-Y. Chang, O. Ichikawa, T. Osada, M. Hata, H. Yamada, M. Takenaka and S. Takagi 
J. Appl. Phys. 118, 085309 (2015); http://dx.doi.org/10.1063/1.4929650
 





(a) of the AlO (3.5 nm)/LaO/InGaAs gate stacks as a parameter of the LaO ALD cycle numbers, and (b) the LaO ALD cycle number dependence of of AlO (3.5 nm)/LaO/InGaAs at the surface energy of 0.1 eV from midgap ( ). Citation: J. Appl. Phys. 118, 085309 (2015); http://dx.doi.org/10.1063/1.4929650



We examine the electrical properties of atomic layer deposition (ALD) LaO/InGaAs and AlO/LaO/InGaAs metal-oxide-semiconductor (MOS) capacitors. It is found that the thick ALD LaO/InGaAs interface provides low interface state density ( ) with the minimum value of ∼3 × 1011 cm−2 eV−1, which is attributable to the excellent LaO passivation effect for InGaAs surfaces. It is observed, on the other hand, that there are a large amount of slow traps and border traps in LaO. In order to simultaneously satisfy low and small hysteresis, the effectiveness of AlO/LaO/InGaAs gate stacks with ultrathin LaO interfacial layers is in addition evaluated. The reduction of the LaO thickness to 0.4 nm in AlO/LaO/InGaAs gate stacks leads to the decrease in hysteresis. On the other hand, of the AlO/LaO/InGaAs interfaces becomes higher than that of the LaO/InGaAs ones, attributable to the diffusion of AlO through LaO into InGaAs and resulting modification of the LaO/InGaAs interface structure. As a result of the effective passivation effect of LaO on InGaAs, however, the AlO/10 cycle (0.4 nm) LaO/InGaAs gate stacks can realize still lower with maintaining small hysteresis and low leakage current than the conventional AlO/InGaAs MOS interfaces.

Sunday, August 30, 2015

BTBAS Silicon nitride PEALD by TU Eindhoven, Oxford Instruments and ASM Microchemistry

Silicon nitride is one of the fastest growing single ALD layer applications in advanced CMOS (hard mask, liner, spacers, multi-patterning, ...). Here is a very good fundamental investigation of PEALD using a rather well known silicon precursor BTBAS in an ICP remote plasma ALD system from Oxford instruments.This is a joint publication between Oxford Instruments and ASM Microchemistry and University partners at Eindhoven University of Technology and Queen Mary University of London

Atomic Layer Deposition of Silicon Nitride from Bis(tert-butylamino)silane and N2 Plasma

Harm C. M. Knoops, Eline M. J. Braeken, Koen de Peuter, Stephen E. Potts, Suvi Haukka, Viljami Pore, and Wilhelmus M. M. Kessels

ACS Appl. Mater. Interfaces, Article ASAP
DOI: 10.1021/acsami.5b06833 
 

Atomic layer deposition (ALD) of silicon nitride (SiNx) is deemed essential for a variety of applications in nanoelectronics, such as gate spacer layers in transistors. In this work an ALD process using bis(tert-butylamino)silane (BTBAS) and N2 plasma was developed and studied. The process exhibited a wide temperature window starting from room temperature up to 500 °C. The material properties and wet-etch rates were investigated as a function of plasma exposure time, plasma pressure, and substrate table temperature. Table temperatures of 300–500 °C yielded a high material quality and a composition close to Si3N4 was obtained at 500 °C (N/Si = 1.4 ± 0.1, mass density = 2.9 ± 0.1 g/cm3, refractive index = 1.96 ± 0.03). Low wet-etch rates of ∼1 nm/min were obtained for films deposited at table temperatures of 400 °C and higher, similar to that achieved in the literature using low-pressure chemical vapor deposition of SiNx at >700 °C. For novel applications requiring significantly lower temperatures, the temperature window from room temperature to 200 °C can be a solution, where relatively high material quality was obtained when operating at low plasma pressures or long plasma exposure times.

Researchers at Case Western Reserve University directly photo-charged lithium batteries with 7.8 percent efficiency

As reported bu Phys.org : Researchers at Case Western Reserve University, however, have wired four perovskite solar cells (PSC) in series to enhance the voltage and directly photo-charged lithium batteries (LIB) with 7.8 percent efficiency—the most efficient reported to date, the researchers believe.

The research, published in the Aug. 27 issue of Nature Communications, holds promise for cleaner transportation, home power sources and more.

Efficiently photo-charging lithium-ion battery by perovskite solar cell [Open Access]

Jiantie Xu, Yonghua Chen & Liming Dai Nature Communications 6, Article number:8103 doi:10.1038/ncomms9103

 Schematic diagram of the fabricated system of PSC–LIB. (Nature Communications 6, Article number:8103)

Abstract:  Electric vehicles using lithium-ion battery pack(s) for propulsion have recently attracted a great deal of interest. The large-scale practical application of battery electric vehicles may not be realized unless lithium-ion batteries with self-charging suppliers will be developed. Solar cells offer an attractive option for directly photo-charging lithium-ion batteries. Here we demonstrate the use of perovskite solar cell packs with four single CH3NH3PbI3 based solar cells connected in series for directly photo-charging lithium-ion batteries assembled with a LiFePO4 cathode and a Li4Ti5O12 anode. Our device shows a high overall photo-electric conversion and storage efficiency of 7.80% and excellent cycling stability, which outperforms other reported lithium-ion batteries, lithium–air batteries, flow batteries and super-capacitors integrated with a photo-charging component. The newly developed self-chargeable units based on integrated perovskite solar cells and lithium-ion batteries hold promise for various potential applications.


The structure and the preparation procedures of CH3NH3PbI3 perovskite films (Supplementary information)

Friday, August 28, 2015

ЗАО «НПО СЕРНИЯ» приглашает посетить международный семинар «Atomic Layer Deposition Russia 2015 (ALD Russia 2015)»

[JSC "NPO sulfuric" invites you to visit the international seminar «Atomic Layer Deposition Russia 2015 (ALD Russia in 2015)"]
Вам интересны передовые разработки в области ALD? ЗАО «НПО СЕРНИЯ» приглашает посетить международный семинар «Atomic Layer Deposition Russia 2015 (ALD Russia 2015)», который пройдет в городе Долгопрудном 21-23 сентября, МФТИ.

Атомно-слоевое осаждение (ALD) представляет собой метод нанесения пленочных покрытий. Это мощный инструмент для изготовления ультратонких, высокооднородных и конформных слоев для применения в полупроводниковой промышленности для производства интегральных микросхем, датчиков, микро/наноэлектромеханических систем (MЭMS / НЭМС), для производства оптики, оптоэлектроники, солнечных батарей, биосовместимых покрытий для медицинских устройств, и т.д. Подробнее о применении метода ALD>>
Хотя российские (советские) ученые сыграли значительную роль в развитии научных принципов данного метода в 1960-е годы, до недавнего времени технология ALD не в полной мере применялась в России. Таким образом, целью Международного семинара ALD-2015 является консолидация быстро растущего ALD-сообщества в России и ознакомление российских исследователей с новыми разработками ведущих международных экспертов в этой области. Подробнее о конференции ALD Russia 2015>>

HERALD website with member profiles is going live www.european-ald.net

Check out the new HERALD website with member profiles just went live www.european-ald.net

HERALD promotes European research activity in Atomic Layer Deposition (ALD)

HERALD (COST action MP1402) aims to structure and integrate European research activity in atomic layer deposition (ALD), bringing together existing groups, promoting young scientists and reaching out to industry and the public. ALD is a unique technique for growing ultra-thin films that is enabling new developments in high-tech manufacturing sectors such as electronics, energy and coatings. With interest growing worldwide, the time is right to coordinate European activity in this field. HERALD supports collaboration through lab visits, workshops and training schools.


Wednesday, August 26, 2015

Low temperatture ALD of Copper by Peking University

Low-Temperature Atomic Layer Deposition of High Purity, Smooth, Low Resistivity Copper Films by Using Amidinate Precursor and Hydrogen Plasma

Zheng Guo, Hao Li, Qiang Chen, Lijun Sang, Lizhen Yang, Zhongwei Liu, and Xinwei Wang

Chem. Mater., Article ASAP
DOI: 10.1021/acs.chemmater.5b02137
 
Abstract Image


Agglomeration is a critical issue for depositing copper (Cu) thin films, and therefore, the deposition should be preferably performed below 100 °C. This work explores an atomic layer deposition (ALD) process for copper thin films deposited at temperature as low as 50 °C. The process employs copper(I)-N,N′-diisopropylacetamidinate precursor and H2 plasma, which are both highly reactive at low temperature. The deposition process below 100 °C follows an ideal self-limiting ALD fashion with a saturated growth rate of 0.071 nm/cycle. Benefitting from the low process temperature, the agglomeration of Cu thin films is largely suppressed, and the Cu films deposited at 50 °C are pure, continuous, smooth, and highly conformal, with the resistivity comparable to PVD Cu films. In-situ reaction mechanism studies by using quartz crystal microbalance and optical emission spectroscopy are followed, and the results confirm the high reactivity of the Cu amidinate precursor at low temperature. To the best of our knowledge, this is the first successful implementation of metal amidinate precursors for low-temperature (∼50 °C) ALD process. The strategy of using metal amidinate precursors in combination with highly reactive H2 plasma is believed to be extendable for the depositions of other pure metals at low temperature.

JVSTA Issue on ALD Deadline Extended to: Septemeber 5, 2015


Special Issue on Atomic Layer Deposition

JVST A is Soliciting Research Articles for Publication in a Special January/February 2016 Issue on Atomic Layer Deposition
Submission Deadline Extended to: Septemeber 5, 2015
This special issue is planned in collaboration with the 15th International Conference on Atomic Layer Deposition (ALD 2015) to be held in Portland, Oregon during June 28-July 1, 2015. The Special Issue will be dedicated to the science and technology of atomic layer controlled deposition of thin films. While a significant fraction of the articles are expected to be based on material presented at ALD 2015, research articles that are on ALD but were not presented at this conference are also welcome: the special issue will be open to all articles on the science and technology of ALD.

Papers will be reviewed using the same criteria as regular JVST articles and must meet JVST standards for both technical content and written English. To be published in JVST, the manuscript must:  

(1)   present original findings, conclusions or analysis that have not been published previously
(2)   be free of errors and ambiguities,
(3)   support conclusions with data and analysis,
(4)   written clearly, and
(5)   have high impact in its field.


Manuscript Deadline: September 5 , 2015     Click Here to Submit   

Article Guidelines & Templates
In preparing your article, you should follow the online instructions for contributors.

Authors are encouraged to use the JVST templates. The easiest way to prepare your manuscript is to use the available JVST Article Template to delete and replace text as necessary.  This file and the template used to create it are available at the site above.  Online, you will have an opportunity to tell us that your paper is a part of the special issue by choosing "ALD Special Issue."

Acceptable manuscript file types are MSWord, LaTeX, and PDF. For the initial submission/review process, a single PDF or MSWord file including the figures is sufficient. However, once a paper is accepted, MSWord or TeX file of the text, any tables and the list of figure captions along with the separate figure files will be required for final production. Use of color in Figures is encouraged. Your FIGURES CAN APPEAR ONLINE IN COLOR FOR FREE. Prepare illustrations in the final published size, not oversized or undersized.

For any other details about manuscript preparation, please refer to the JVST A online instructions.

 

Monday, August 24, 2015

ALD Lab Dresden sends away Varun Sharma to Helsinki, Finland




ALD Lab Dresden, Institut für Halbleiter- ind Mikrosystemtechnik at TU Dresden takes farewell and sends away Varun Sharma to Helsinki, Finland to learn from the masters how to ALD. Please take good care of Varun for us because he too was born to ALD. (Varun Sharma, Christoph Hossbach, Jonas Sundqvist, Martin Knaut)


ALD and VTT in Finland mentioned in report on the Global Packaging Coatings Market, 2015

Crazy day first a call on non-semi applications with a dear old friend and then multiple reports popping up on the same topic. Yeah I know I once owned a Citroen and since then I see them all the time. Anyhow, here is another non-semi ALD future where ALD and VTT in Finland mentioned in report on the Global Packaging Coatings Market, 2015. However a CAGR of 4.2% is not that much to hang in the christmas tree as we say in Sweden compared to many reports saying ALD growth is above CAGR 30%. But then again ALD can for sure grow at high speed within a large market!



Research and Markets (http://www.researchandmarkets.com/research/qk7q2n/global_packaging) has announced the addition of the "Global Packaging Coatings Market 2015-2019" report to their offering.

The increase in consumer preference for eco-friendly products is an important trend being witnessed in the global packaging coatings market. The manufacturers of packaging coatings, which include beverage packaging and food packaging, and are developing new and eco-friendly coatings to comply with regulations and to meet the increasing demand for sustainable products that do not harm the ecosystem. 

This in turn is expected to propel the growth of the market during the forecast period. The VTT technical research center has developed technology for recyclable and eco-friendly packaging coatings solutions. These coatings help in the manufacture of thin, lightweight, fully recyclable, and air-tight packaging materials. They use the atomic layer deposition (ALD) method, which are helpful in food and pharmaceutical packaging as they have a good gas permeation resistance. Moreover, these recyclable coatings do not use barrier materials such as aluminum film, thereby using less raw materials compared to traditional packaging coatings materials.

According to the report, the global packaging coatings market to grow at a CAGR of 4.2% over the period 2014-2019. The growth of the global packaging industry is a major driving factor in the growth of the global packaging coatings market. The packaging industry is expected to grow by 2018. The growth will be characterized by the growing demand for packaging coatings from the packaging industry because of the increased demand for plastic packaging from the food and beverage industry.

Suppliers of raw materials determine the prices of raw materials, which in turn has a negative impact on the growth of the packaging market, thereby increasing the price of packaging coatings.

Here is an rather old press release form VTT on the topic :

The ALD thin coating considerably reduces the need for aluminium in packaging solutions


VTT Technical Research Centre of Finland has developed an environmentally-friendly packaging coating solution. Especially suitable for food and pharmaceutical packaging, the coating offers a new method for manufacturing fully recyclable, thin, light and air-tight packaging materials.

ALD Encapsulation technologies for flexible electronics

Here is an overview on encapsulation technologies for flexible electronics covering the main technologies and players. So just scroll down to the interesting part about ALD sating the main OEMs:
  • BENEQ
  • Lotus
  • Encapsulix
  • Synos (Veeco)
From a market perspective tehr is a forecast from IDTechEx Barrier Layers for Flexible Electronics 2015-2025: Technologies, Markets, ForecastsRead more at: http://www.idtechex.com/research/reports/barrier-layers-for-flexible-electronics-2015-2025-technologies-markets-forecasts-000409.asp



Barrier layer market forecasts in US$ million


Status of flexible encapsulation to enable flexible electronics


In 2020, flexible barrier manufacturing for flexible electronic devices such as displays will be a market worth more than US$184 million, according to IDTechEx Research. That equates to 3.8 million square meters of flexible barrier films for electronics.


Although multilayer approaches – usually organic and inorganic layers – have been the most popular solution for flexible encapsulation so far, there is significant development work with solutions based on single layer approaches such as flexible glass or atomic layer deposition (ALD) which could, in later years, capture part of the market. The table below, compiled by IDTechEx analysts shows some of the characteristics of flexible glass and ALD films as developers are looking to bring them to market.

[...]

Atomic layer deposition (ALD) present and future outlook/market share 

ALD is another flexible encapsulation technology receiving a lot of attention with several players currently developing solutions based on it. It seems like it is not a short-term solution, if it will ever be one as a stand-alone layer but ALD may be a solution in a multi-layer stack in combination with a sputtered or PECVD layer if it would be possible to find a good cost structure. Regarding the intrinsic properties of the material, ALD film deposited at low temperature (T<80 C) have a superior quality when tested at room temperature. A single ALD layer less-than 50 nm thick can perform better than thicker layers deposited by sputtering or PECVD.

However, the inherent stability of the films at higher temperature/humidity (e.g. 85C/85%RH) is a problem. If PE-CVD is used, ALD film stability improves, as well as for mixed oxides, but it is still an issue. A second problem comes with particles and substrates non-uniformity. Any defect may lead at an initial non-uniform nucleation that propagates into the growing film. Furthermore, loose particles on substrates may be partially covered, but because of the extreme thinness, the thin film does not have the mechanical strength to keep them in place under mechanical stress. Any mechanical stress leads to film fracture with consequent creation of an ingress path for moisture. That is why multilayer structures are necessary.

Deposition tools are in development from Lotus, Beneq, Encapsulix and others. Exploration at Samsung SDC with ALD films for TFE was very much advertised by Synos, but resulted in failure and any further evaluation was halted. ALD for barrier on foil has better results although there are doubts and hurdles in scaling up and reaching the deposition speed required for a cost effective process.




Thursday, August 20, 2015

ALD of single atom Pd on grapheme using a Arradiance Benchtop reactor


Here is an interesting report on the fabrication of single-atom Pd catalyst on graphene using ALD by researchers in Hefei, China. Pd ALD was carried out on a GEMSTAR-6TM Benchtop ALD from Arradiance at 150 °C using palladium hexafluoroacetylacetate (Pd(hfac)2) and formalin (37% HCHO and 15% CH3OH in aqueous solution).

Single-Atom Pd1/Graphene Catalyst Achieved by Atomic Layer Deposition: Remarkable Performance in Selective Hydrogenation of 1,3-Butadiene

Huan Yan, Hao Cheng, Hong Yi, Yue Lin, Tao Yao, Chunlei Wang, Junjie Li, Shiqiang Wei, and Junling Lu
Journal of the American Chemical Society
DOI: 10.1021/jacs.5b06485



We reported that atomically dispersed Pd on graphene can be fabricated using the atomic layer deposition technique. Aberration-corrected high-angle annular dark-field scanning transmission electron microscopy and X-ray absorption fine structure spectroscopy both confirmed that isolated Pd single atoms dominantly existed on the graphene support. In selective hydrogenation of 1,3-butadiene, the single-atom Pd1/graphene catalyst showed about 100% butenes selectivity at 95% conversion at a mild reaction condition of about 50 °C, which is likely due to the changes of 1,3-butadiene adsorption mode and enhanced steric effect on the isolated Pd atoms. More importantly, excellent durability against deactivation via either aggregation of metal atoms or carbonaceous deposits during a total 100 h of reaction time on stream was achieved. Therefore, the single-atom catalysts may open up more opportunities to optimize the activity, selectivity, and durability in selective hydrogenation reactions.

New precursors for Atomic Layer Deposition presented at AVS ALD 2015 Portland

Here is a very good review from AVS ALD 2015 in Portland with respect to some of the new ALD precursor chemistries presented and discussed during the meeting by the ALD leading research labs and ALD industry like Intel, Adeka, BASF anad others.

New Reagents For Atomic Layer Deposition

Tailored ALD precursors form atomically thin layers of metals, dielectrics, and other compounds

By Mitch Jacoby
Chemical & Engineering News, Volume 93 Issue 32 | pp. 54-55, Issue Date: August 17, 2015
One way to shrink the nanosized wires (cross sections shown here) that interconnect electronic circuit components is to replace the “thick” tantalum nitride-like film used today to encapsulate the copper core (left) with a thinner manganese silicate film made via ALD.

Depositing thin films of copper is one thing. Making the metal stay put is quite another. “Copper has a nasty habit of diffusing if it’s not encapsulated with a protective barrier,” Gordon said. Running electric current through the tiny wires that interconnect transistors and other circuitry causes copper atoms to start migrating out of the wires, which eventually can lead to chip failure.

Gordon thinks ALD can help solve this problem. His group has developed an ALD process for making manganese silicate, a material that prevents copper diffusion at a film thickness of less than 2 nm. The chemistry is based on a reaction between a manganese amidinate compound and a silanol with tert-butoxy groups or other organic ligands. Gordon noted that there are other non-ALD ways to make manganese silicate films. But the Harvard group’s ALD method offers greater control over deposition and higher uniformity in chemical composition.




Shinjita Acharya reported on a proprietary barium pyrrole compound developed by BASF that is compatible with low-temperature ALD. Acharya is a postdoctoral researcher working with Stanford University mechanical engineer Friedrich B. Prinz, whose group is collaborating with BASF.


Tuesday, August 18, 2015

Picosun see increased sale for PICOPLATFORM™ cluster tools for high volume ALD manufacturing

According to a recent press release from Picosun Oy, leading supplier of Atomic Layer Deposition (ALD) thin film coating solutions for industrial production, delivers several new PICOPLATFORM™ cluster tools for high volume ALD manufacturing in semiconductor industries.



The PICOPLATFORM™ cluster systems have quickly become a favorite of Picosun's production customers. The systems, designed to accommodate wafers up to 300 mm size, comprise Picosun's state-of-the-art technological solutions and unparalleled ALD knowhow with the most extensive selection of vacuum loading solutions for single wafer and batch processing. This makes the PICOPLATFORM™ cluster tools ideal for e.g. III-V semiconductor, LED, and MEMS device manufacturing. The now sold PICOPLATFORM™ cluster tools will be installed in the production facilities of leading, multi-billion semiconductor device manufacturers in USA and Asia.



"The PICOPLATFORM™ product family is one of the strongholds of our industrial ALD technology. The repeat sales of these systems to our core markets such as microelectronic component and sensor manufacturing prove again the unmatched level of our ALD equipment design and our excellence in hardware integration, software, and process development. Combined with our leading selection of automated batch handling systems designed to fulfill the strictest requirements of the semiconductor industries, the PICOPLATFORM™ cluster systems offer the most comprehensive turn-key solutions to fast, productive, and cost-efficient ALD manufacturing," states Mr. Juhana Kostamo, Managing Director of Picosun.


Mr. Juhana Kostamo, Managing Director of Picosun.

Sunday, August 16, 2015

HERALD Workshop - ALD for Batteries, Gent, Belgium September 15-16

Workshop - ALD for Batteries

Co-organiser 

 cost logoHerald

Program

Tuesday, September 15, 2015 - Het Pand
09:30   Registration
10:00   Philippe Vereecken, IMECInvited Talk - Conformal deposition for 3D thin-film batteries: requirements and opportunities
10:45   Sebastien Moitzheim, IMECSpatial ALD of TiO2 for 3D thin-film batteries
11:15   Felix Mattelaer, Ghent University
ALD of Manganese oxides
11:45   Mikko Ritala, University of HelsinkiPreparation of lithium containing ternary oxides by solid state reaction of atomic layer deposited thin films
12:15   Lunch
13:30   Maarit Karppinen, Aalto University
Invited Talk 
14:15   Kevin van de Kerckhove, Ghent University
Molecular Layer Deposition of Titanicone
14:45   Miia Mäntymäki, University of Helsinki
15:15   Break
15:45   Adriana Creatore, TU Eindhoven
Invited Talk - Plasma ALD of Li-based materials
16:30   Thomas Dobbelaere, Ghent University
ALD of phosphates
17:00   Closing remarks

Wednesday, September 16, 2015 - Dept. Solid State Sciences

09:00   Ola Nilsen, University of Oslo
Invited Talk - ALD of Li-containing compounds
09:45   Amund Ruud, University of Oslo
High rate iron phosphates by ALD
10:15   Break
10:45   Ruud Van Ommen, TU Delft
ALD on battery particles
11:30   Geert Rampelberg, Ghent University
Thermal and plasma enhanced ALD on powders
12:00   Lunch
13:30   Tour of the Lab 

Registration

Participation is free of charge (limited number of places):https://webapps.ugent.be/eventManager/events/cocoonworkshopbatteries
Registration will be possible from 1 July 2015. Please register before 1 September 2015. 

Location

The workshop takes place at Het Pand (on Tuesday) and the department of Solid State Sciences (on Wednesday).

Tuesday, September 15, 2015

Het Pand, Ghent University
Onderbergen 1
9000 Gent, Belgium
By public transport:
  • From station Gent Sint-Pieters:Tram 1 (every 6 minutes) or tram 24 (every 20 minutes). Exit at Korenmarkt.
  • From Gent ZuidTram 4 (every 6 minutes), tram 24 (every 20 minutes) or bus 17 (every 30 minutes). Exit at Korenmarkt.
By Car:
  • Follow the parking signage to parking P7 Sint-Michiels. The parking is located at 50 meter from Het Pand. Take the exit Onderbergen and you come out in the wilderoosstraat, opposite Het Pand.
  • An alternative parking is P8 Ramen. From here it's about 5 minutes on foot to Het Pand.

Wednesday, September 16, 2015

Department of Solid State Sciences, Ghent University
Krijgslaan 281 - Building S1
9000 Gent, Belgium

Contact

Department of Solid State Sciences, Ghent University
Krijgslaan 281 - Building S1
9000 Gent, Belgium
Phone: +32 (0)9 264 43 54
Fax: +32 (0)9 264 49 96

Flyer

Sponsors

 iwt logo
FWO



Saturday, August 15, 2015

Nantero closes additional funding this summer for NRAM and adds ex TSMC Executive to the Board

I have noticed that Carbon Nanotube integration into semiconductor processing as an active device or sensor material has moved into a more mature phase lately. One example is the company Nantero who earlier this summer announced closing a $31.5 million Series E financing round from new and existing investors now adds Previous TSMC Executive Dr. Shang-Yi Chiang to its Advisory Board




According to the press relase Dr. Chiang was previously an Executive Vice President, Co-Chief Operating Officer and Senior Vice President of R&D at TSMC before announcing his retirement in October 2013. 


NRAM is based on forming a film of Carbon Nanotubes (CNT) that are deposited onto a standard silicon substrate that contains an underlying cell select device and array lines (typically transistors or diodes) that interface the NRAM switch. The NRAM acts as a resistive non-volatile random access memory NVRAM and can be placed in two or more resistive modes depending on the resistive state of the CNT fabric. When the CNTs are not in contact the resistance state of the fabric is high and represents a “0” state (see Figure below). When the CNTs are brought into contact, the resistance state of the fabric is low and represents a “1” state. (www.nantero.com)



“Nantero continues to attract the industry’s brightest and most innovative minds both internally and on an advisory basis,” said Greg Schmergel, Co-Founder, CEO and President of Nantero. “This added expertise will be instrumental in helping the company deliver a new generation of memory with the unique properties of DRAM-like speed, nonvolatility, and ultra-high-densities, for both standalone and embedded use.”



Additional information at the www.nantero.com  tells us: NRAM can enable a variety of exciting new features and products in both consumer and enterprise electronics. This new super-fast, ultra-high density memory can replace both DRAM and flash in a single chip, or enable new applications as a storage class memory, while also delivering the low power, high speed, reliability, and endurance needed to drive the next wave of electronics innovation.

  • NRAM Advantages: Extremely Low Power, Super-Fast, High Density, High Endurance
  • Limitless Scalability: Can Scale Below 5 nm to Enable Terabits of Memory in the Future
  • Proven Technology: Successfully Used in Mass Production CMOS Fabs for Many Years
  • Exciting Future Products: Virtual Screens, Next-Generation Enterprise Systems, Rolled-up Tablets, Instant-On Laptops, 3D Video Phones and other products needing huge amounts of fast memory
Here is also a video where the founders of Nantero tells us more about the revolutionary emerging memory technology they are commercializing - claiming scaling down to 5 nm and "unlimited storage capacity" for our future electronic gizmos.