Revolutionizing Power Technology: Intel's Integrated CMOS Driver-GaN (DrGaN) Power Switch for Enhanced Efficiency and Density in Data Centers and Networks

Intel researchers have developed an integrated CMOS Driver-GaN (DrGaN) power switch, combining gallium nitride (GaN) and silicon CMOS technologies on a 300mm GaN-on-Si platform. This innovation is designed to meet the increasing power density and efficiency needs of data centers and networking platforms. The new device, termed DrGaN, features an e-mode HEMT and an integrated 3D monolithic Si PMOS. It's capable of addressing the power requirements of future CPUs and GPUs, showing excellent resistance and leakage performance. A key advancement is the development of a new gate-last process flow for 3D monolithic integration of GaN and Si CMOS through layer transfer. 

Intel researchers have developed an integrated CMOS Driver-GaN (DrGaN) power switch, combining gallium nitride (GaN) and silicon CMOS technologies on a 300mm GaN-on-Si platform.

This process involves completing the high-temperature activation steps for the Si CMOS transistors before depositing the GaN transistor's gate dielectric, solving a major challenge in integrating these two technologies. This method also allows GaN and Si CMOS transistors to share the same backend interconnect stack, which reduces resistance and mask count. The new technology demonstrates great promise for scaling, evidenced by a figure of merit of 0.59 (mΩ-nC)-1 for a 30nm gate-length GaN MOSHEMT. The paper includes images of the new process flow, the 3D monolithic integration, and the layout of a DrGaN unit cell, illustrating the advanced integration and circuitry of this novel power device.

Source: https://btbmarketing.egnyte.com/dl/m2hsmeZ6qH

Forge Nano Unveils Plans for U.S.-Based Lithium-Ion Battery Gigafactory in North Carolina, Set to Launch in 2026

Forge Nano, Inc. has announced its venture into lithium-ion battery manufacturing with the creation of Forge Battery. The company plans to establish a Gigafactory in Raleigh, North Carolina, targeting defense, aerospace, and specialty electric vehicle markets. With an initial investment of over $165M, the facility, operational by 2026, will produce batteries utilizing Forge Nano’s Atomic Armor surface technology, enhancing energy density, safety, and lifespan. 

This technology is expected to surpass existing lithium-ion cells in performance. The North Carolina facility, benefiting from state incentives and a Job Development Investment Grant, promises significant economic benefits, including hundreds of high-paying jobs and substantial tax revenue to support local communities. The groundbreaking event is scheduled for the first half of 2024.

• Forge Nano has raised $81.54M over 10 rounds.
• Forge Nano's latest funding round was a Series C for on May 30, 2023.

Source:

Forge Nano to Launch U.S Battery Manufacturing Business; North Carolina Gigafactory Planned for 2026 - Forge Nano

Forge Nano Stock Price, Funding, Valuation, Revenue & Financial Statements (cbinsights.com)

ALD is coming home 2024!

Announcement for the AVS 24th International Conference on Atomic Layer Deposition (ALD 2024) & 11th International Atomic Layer Etching Workshop (ALE 2024)

Event Overview: The AVS 24th International Conference on ALD along with the 11th International ALE Workshop will be held from August 4-7, 2024, at Messukeskus, Helsinki, Finland. This premier event, alternating annually among the United States, Europe, and Asia since 2001, focuses on the science and technology of atomic layer controlled deposition of thin films and atomic layer etching.

Special Celebration: The conference marks the 50th anniversary of ALD, celebrating the pioneering work of Dr. Tuomo Suntola, who filed the first patent on Atomic Layer Epitaxy in 1974. Dr. Suntola will open the conference with a special address.

Program and Submission Details: The event features pre-conference tutorials and a welcome reception on August 4, followed by sessions and an industry tradeshow from August 5-7. The program chairs include esteemed professionals from the University of Helsinki, the University of Twente, and AlixLabs AB. Key dates for abstract submission, registration, hotel reservations, and manuscript submissions are provided, with the abstract submission deadline being February 15, 2024.

Contact Information: Further details, including the event code of conduct, presentation guidelines, and sponsor and exhibitor information, are available for download. For any additional queries, Della Miller, the Event Manager, can be contacted at della@avs.org. 

For more details, attendees and interested parties are encouraged to visit the official website of AVS.

ald2024 (avs.org)

Aixtron Reports Strong Revenue Growth and Doubled Profits in Q3 2023, Driven by High Demand for GaN and SiC Power Electronics

 In Q3 2023, Aixtron SE, a deposition equipment maker based in Herzogenrath, Germany, reported a revenue of €165 million, marking an 86% increase from the previous year but a 4.9% decrease from the last quarter. The company's revenue for the first nine months of 2023 rose by 49% year-on-year to €415.7 million, predominantly from equipment sales.

A significant portion of the revenue came from the sale of metal-organic chemical vapor deposition (MOCVD)/chemical vapor deposition (CVD) systems for manufacturing gallium nitride (GaN) and silicon carbide (SiC) based power electronics, which accounted for 82% of equipment revenue. There was a notable shift from optoelectronics and LED systems to SiC and GaN-based systems.

Regionally, Asia contributed 44% of the revenue, followed by Europe (33%) and the Americas (23%). The gross margin improved to 46% in Q3 from 42% in Q2, with operating profit doubling year-on-year due to a better product mix.

However, the company faced increased operating expenses, primarily due to a 44% rise in R&D costs. This led to a significant drop in free cash flow, mainly attributed to a rise in inventories in anticipation of higher business volumes.

Aixtron launched the G10-GaN system, an addition to its G10 product line, which is expected to generate over 50% of its total GaN revenues in 2024. Despite a dip in order intake in Q3, Aixtron projects a higher intake in Q4 and confirms increased full-year growth guidance, expecting continued strong demand, especially for efficient power electronics.

The company is also investing in a new Innovation Center to expand its R&D capabilities, aligning with global trends in electrification, digitalization, and renewable energies, where materials like SiC and GaN are becoming mainstream.

Source: 

Aixtron’s Q3 Revenue And Earnings Up Significantly Year-on-year - Plato Data Intelligence (zephyrnet.com)

ClassOne Technology Equips VTT Finland with Advanced Electrplating System for Chip Packaging Innovation"

ClassOne Technology, a significant provider of electroplating and wet processing tools for microelectronics manufacturing, has received an order from Finland's VTT Technical Research Centre for its Solstice® S8 single-wafer system. VTT will use the system for advanced packaging applications like through-silicon via (TSV) processes essential for MEMS packaging and the integration of sensor chips and quantum computing devices. This move aligns with the anticipated 10% annual growth in the advanced packaging sector, which is expected to reach over $78 billion by 2028, with shifts in market drivers and dominant technologies.

The Solstice S8 will enable VTT to use advanced electrolyte chemistries and atomic layer deposition for efficient copper TSV plating. ClassOne Technology's Solstice platform is designed to support a variety of process technologies and chemistries in a compact setup, suitable for both R&D and pilot-line production. VTT plans to use the tool for its research and development and offer access to it for other qualified users. The system will be shipped to VTT's main facility in Espoo, Finland.

ClassOne Technology will showcase its Solstice platform at the upcoming SEMICON Europa trade fair in Munich. The company specializes in tailored, cost-effective processing solutions for wafer processes, serving the semiconductor and microelectronic device manufacturing industry globally.

The Solstice® S8 automated electroplating systems are high-speed, fully-automated, 8-chambered tool designed for electrochemical deposition (ECD) as well as surface preparation wet processing – specifically for ≤200mm wafers. It is the most powerful, easy-to-use, and cost-efficient route to single-wafer volume production for many applications.

Sources:

ClassOne Technology Receives Order for Solstice® S8 (globenewswire.com)

Solstice S8 Automated Electroplating Systems (classone.com)

Molybdenum: The New Frontier in Semiconductor Metallization according to Lam Research

The semiconductor industry is facing a significant shift as Molybdenum (Mo or Moly as the Americans say) is tipped to replace tungsten in chip manufacturing due to its superior atomic-scale properties. Kaihan Ashtiani, Corporate Vice President and General Manager at Lam Research, highlights the critical attributes of moly that make it the ideal choice for advanced devices. The company is at the forefront, aiding chipmakers in the transition with its ALTUS® product family, drawing from its pioneering work in Tungsten ALD and expertise in 3D NAND technology.

The semiconductor sector is on the cusp of a pivotal transition with molybdenum poised to supersede tungsten for interconnect metallization in response to the stringent scaling demands of modern chipmaking. Molybdenum's edge lies in its low resistivity and ease of integration into existing semiconductor processes, including atomic layer deposition (ALD) and chemical-mechanical planarization (CMP). These properties, combined with its minimal diffusivity into dielectric materials—thus negating the need for a barrier liner—make moly the preferred candidate for next-generation devices. Kaihan Ashtiani of Lam Research articulates the advantages of moly over other metals like cobalt and copper and underscores Lam's commitment to facilitating this industry shift. Leveraging decades of expertise and innovation in tungsten ALD and the transition from 2D to 3D NAND, Lam's ALTUS® product line is instrumental in enabling widespread adoption of molybdenum. This shift is not just theoretical; major chipmakers are actively exploring moly integration, marking a significant evolution in semiconductor fabrication.

The ALTUS® system by Lam Research is a suite of metal deposition tools used in semiconductor manufacturing, particularly for the deposition of tungsten and potentially other metals like molybdenum. These systems are designed to deposit metals by CVD or later named PNL (Pulsed Nanolayer deposition) and today marked as Atomic Layer Deposition (ALD- yeah!), which allows for extremely fine control of film thickness and composition at the atomic level, crucial for creating the tiny, densely packed structures found on modern integrated circuits.

For tungsten, the ALTUS® system has been a workhorse in the industry for the deposition of tungsten films, especially in the fabrication of the contact and via layers of integrated circuits. The ALD process ensures excellent step coverage, conformality, and uniformity even in very high aspect ratio structures. This is particularly important for Logic, DRAM, and 3D NAND applications, where the precise control of the tungsten film's electrical and physical properties is critical for device performance.

ALTUS applications

Logic devices, metallization needs to meet the requirements of increasingly smaller geometries and higher performance. The precision of ALD with tungsten and potentially molybdenum is essential for creating the necessary electrical connections without compromising the device's integrity.

  

Dynamic Random-Access Memory (DRAM) requires highly reliable and conductive connections as it is constantly refreshed to maintain data. The metallization process for DRAM needs to ensure that the metal films provide low resistivity and high reliability for the memory to function correctly.

  

In 3D NAND flash memory, multiple layers of memory cells are stacked vertically. This requires extremely uniform metal layers across all the stacked levels. The ability of the ALTUS® system to deposit tungsten and potentially molybdenum with high uniformity and excellent conformal coverage is vital for the success of 3D NAND devices.

Sources:

ALTUS Product Family - Lam Research

Veeco Delivers Groundbreaking NSA500 Annealing System to Tier 1 Logic Customer

Veeco Instruments Inc. has announced the delivery of its inaugural NSA500™ Nanosecond Annealing System to a premier logic customer, marking a significant stride in laser annealing technology and a chance to broaden its market reach. The NSA500 caters to the critical needs of advanced semiconductor nodes and 3D applications, offering precision annealing that spares the underlying device structure. This is particularly vital for low thermal budget and material modification processes. With the promise of a second system soon to ship to another leading customer, Veeco anticipates high-volume manufacturing orders by late 2024 or early 2025. The NSA500's versatility covers a spectrum of new applications, such as Backside Power Delivery and Contact Annealing, essential for cutting-edge semiconductor fabrication. Veeco’s technology, recognized for enhancing device performance and supporting customer product development, complements their existing laser annealing systems.

Source:

Veeco Ships First Nanosecond Annealing System to a Tier 1 Logic Customer -November 06, 2023 at 09:02 am EST | MarketScreener

MSP Launches Turbo II™ Vaporizers: Next-Gen Efficiency for Semiconductor Fabrication

MSP, a Division of TSI, has introduced the Turbo II™ Vaporizers, transforming vapor delivery for chemical vapor deposition (CVD) and atomic layer deposition (ALD) in semiconductor manufacturing. These vaporizers handle a variety of liquid precursors, including thermally sensitive ones, and boast a 200% increase in vapor output with half the size of previous models. They offer higher vapor concentrations, quicker stabilization, and faster deposition times, reducing wafer processing time and liquid waste. Additionally, the vaporizers are designed to decrease downtime and maintenance, offering a lower total cost of ownership and significant long-term cost savings. MSP's product line includes various vaporizers, VPG filters, liquid flow controllers, and semiconductor metrology equipment.

Source:

MSP Unveils Turbo II™ Vaporizers (globenewswire.com)

Global Semiconductor Sales See Mixed Trends: Monthly Rise Amid Annual Decline

Global semiconductor sales rose 1.9% in September 2023 from August, but fell 4.5% from September 2022. Q3 sales reached $134.7 billion, up 6.3% from Q2 but down 4.5% from Q3 the previous year. Sales reflect positive momentum with a strong long-term demand outlook. Increases were seen in all regions except Japan.

WASHINGTON—Nov. 1, 2023—The Semiconductor Industry Association (SIA) today announced global semiconductor sales for the month of September 2023 increased 1.9% compared to August 2023 and fell 4.5% compared to September 2022. Worldwide sales of semiconductors totaled $134.7 billion during the third quarter of 2023, an increase of 6.3% compared to the second quarter of 2023 and down 4.5% compared to the third quarter of 2022. Monthly sales are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average. SIA represents 99% of the U.S. semiconductor industry by revenue and nearly two-thirds of non-U.S. chip firms.

“Global semiconductor sales increased on a month-to-month basis for the seventh consecutive time in September, reinforcing the positive momentum the chip market has experienced during the middle part of this year,” said John Neuffer, SIA president and CEO. “The long-term outlook for semiconductor demand remains strong, with chips enabling countless products the world depends on and giving rise to new, transformative technologies of the future.”

Regionally, month-to-month sales increased in Asia Pacific/All Other (3.4%), Europe (3.0%), the Americas (2.4%), and China (0.5%), but decreased slightly in Japan (-0.2%). Year-to-year sales increased in Europe (6.7%), but decreased in the Americas (-2.0%), Japan (-3.6%), Asia Pacific/All Other (-5.6%) and China (-9.4%).

For comprehensive monthly semiconductor sales data and detailed WSTS forecasts, consider purchasing the WSTS Subscription Package. For detailed historical information about the global semiconductor industry and market, consider ordering the SIA Databook.

Nanexa AB Concludes Rights Issue on Nasdaq First North Growth

Nanexa AB's rights issue, aimed at raising SEK 121m, concluded with a 34.7% subscription rate using rights and without. The company will utilize guarantee commitments for the remaining 27.1%. The rights issue, announced on September 21 with backing for 62% of the total, resulted in 33.5% of shares subscribed with rights and 1.2% without. The capital raised before transaction costs will be SEK 75m. Trading in BTAs will occur until registration is completed around week 45, 2023, with the new shares expected to trade on Nasdaq First North Growth by week 46, 2023.

Nanexa, founded in 2007, has evolved from working with Atomic Layer Deposition (ALD) technology for various applications to focusing on the pharmaceutical sector with its proprietary PharmaShell® system. PharmaShell® positions Nanexa in the burgeoning drug delivery market with a system that allows high-precision, long-acting injectable drug products. The company is developing its own products and also partners with multiple pharmaceutical firms, including AstraZeneca, leveraging the unique capabilities of its ALD-based technology to enhance drug delivery.

The controlled release is steered by modulating the coating thickness, the composition of the coating and process parameters. We are currently primarily using nontoxic aluminum oxide and zinc oxides in the ALD coating

Sources:

Nanexa AB - What is Pharmashell®

Nanexa AB - Nanexa announces outcome of rights issue

Dutch Election Frontrunner Advocates for Earlier ASML Export Restrictions to China

Dilan Yesilgoz-Zegerius, the leading candidate in the Dutch elections, has stated that the Netherlands should have responded more swiftly to restrict exports of ASML Holding NV's advanced chipmaking equipment to China. The U.S. has coordinated with the Netherlands and Japan to impose these export bans, which are set to take effect in January, in an effort to prevent China from using the technology to gain a military advantage. ASML, the most valuable Dutch company, has opposed these restrictions.

A recent incident where Chinese company Semiconductor Manufacturing International Corp. used ASML equipment to make advanced processors for Huawei smartphones underscores the urgency and the missed opportunity for earlier action by the Netherlands.

Yesilgoz-Zegerius acknowledged that the Netherlands had been "naive" about its security, emphasizing the need for cooperation with the U.S. to ensure independence from undesirable collaborations. Her stance, however, contrasts with some local lawmakers who criticize the export curbs as an infringement on Dutch sovereignty.

As she vies to become the Netherlands' first female prime minister and the first refugee to hold the position, Yesilgoz-Zegerius has made headlines with her tough stance on immigration, opposing a parliamentary motion that reduces tax benefits for expats and arguing for a significant reduction in migrant numbers. Her comments have sparked debate among Dutch tech companies like ASML, which rely on international expertise and have expressed concerns about the tightening of such tax benefits.

Source:

ASML China Export Curbs Too Late, Yesilgoz-Zegerius Says - Bloomberg

ALD Adaptation Promises Advances in Solid-State Battery Development

Researchers at the Argonne National Laboratory have ingeniously applied a ALD, to improve solid-state battery technology. They adapted ALD, commonly used for applying thin films in chip manufacturing, to enhance argyrodite electrolytes—a sulfur-based compound known for high ionic conductivity, which is crucial for fast-charging batteries. The ALD process involves a chemical reaction on the material's surface to create a thin protective layer, addressing the reactivity challenges of argyrodites. Unlike typical post-pellet coating, this approach uniformly applies alumina coatings to electrolyte powders before pellet formation, preserving the material's structure. This results in less air-sensitive powders, facilitating easier production and leading to batteries with better performance, as demonstrated in cell tests. The method unexpectedly also doubles the ionic conductivity and mitigates issues like dendrite formation, significantly extending the battery's life and safety, marking a promising development for solid-state battery production.

Sources:

Adapting Semiconductor Techniques For Enhanced Battery Development (electronicsforu.com)

Zachary D. Hood et al, Multifunctional Coatings on Sulfide‐Based Solid Electrolyte Powders with Enhanced Processability, Stability, and Performance for Solid‐State Batteries, Advanced Materials (2023). DOI: 10.1002/adma.202300673

Entegris Reports Q3 2023 Revenue of $888M; Sees Rising Customer Interest in Innovative Solutions

Entegris, Inc. reported Q3 2023 revenue of $888 million, an 11% decrease YoY and 1% sequentially. GAAP net income was $33.2 million ($0.22 per share), including expenses like goodwill impairment and integration costs. Non-GAAP net income was $103.6 million ($0.68 per share). Q4 2023 sales are expected to be down around 2% sequentially, with GAAP EPS of $0.25-$0.30 and non-GAAP EPS of $0.55-$0.60. Customer interest is rising in Entegris' comprehensive solutions and collaborative materials development capabilities, particularly in materials like molybdenum. These solutions lead to faster development and speedier product launches, positioning Entegris as an innovation and growth partner.

Entegris, Inc. reported its third-quarter financial results for 2023, with revenue totaling $888 million, reflecting an 11% decrease compared to the same quarter in the previous year and a 1% sequential decrease. The company's GAAP net income for the third quarter was $33.2 million, resulting in earnings per diluted share of $0.22. These figures included various expenses, such as goodwill impairment, amortization of intangible assets, integration costs related to an acquisition, and other net costs. On a non-GAAP basis, the company achieved a net income of $103.6 million, with non-GAAP diluted earnings per share of $0.68.

For the fourth quarter of 2023, the company expects sales to be down approximately 2% sequentially, with a range of $770 million to $790 million in sales and diluted earnings per common share between $0.25 and $0.30 on a GAAP basis, while non-GAAP earnings per share are expected to range from $0.55 to $0.60.

Entegris operates in three segments: Materials Solutions (MS), Microcontamination Control (MC), and Advanced Materials Handling (AMH), catering to the semiconductor and high-tech industries. The company held a conference call to discuss its results on November 2, 2023. 

Entegris is experiencing rising customer interest in their comprehensive solutions and collaborative capabilities for materials development, such as molybdenum. Customers appreciate the benefits, such as faster development and improved speed, resulting in quicker product launches. This positions Entegris as a valuable partner in their customers' innovation and growth endeavors.

Switching to molybdenum (Mo) in semiconductor manufacturing for 2 nm affects multiple processes. Mo offers conductivity without needing barrier layers and is cost-effective, but its corrosion risk requires adapting steps like deposition and etching. For chemical mechanical planarization (CMP), slurries and pads must be refined to protect Mo, with lower oxidizer concentrations and customized pad designs. Word line etching, particularly for 3D NAND, faces challenges with conventional etchants and cleans, necessitating specialized etchants that prevent residue. High-purity materials and rigorous filtration are essential for yield, with in situ monitoring and multiple-stage filtration to minimize contamination. Transitioning to Mo demands a comprehensive approach to select chemicals, pads, and filters to optimize the process and yield. Close collaboration with suppliers that provide integrated solutions can smooth the transition, as using a single supplier can expedite material compatibility testing and streamline the switch.

Source - Entegris.com

The memory market presents a mixed scenario. DRAM has shown anticipated improvement, but 3D NAND remains subdued, with declining wafer starts in Q3 and no significant recovery expected in Q4. These conditions align with previous industry forecasts. Looking ahead to 2024, specific details are not yet available, but there is an expectation of increased wafer starts. More precise information will be provided in the Q4 earnings report in February, as it's currently too early to offer comprehensive insights into the upcoming year's market dynamics.

In the current year, the company has observed that all node transitions in the logic sector have occurred according to schedule, which has had a positive impact on its business performance, notably in Taiwan during the third quarter. However, within the memory segment, the company had previously forecasted delays and a lack of transitions in 3D NAND, and these expectations have been met. The initial anticipation was for many customers to adopt 200-plus layer architectures by the year's end, but this transition has not materialized as predicted. The company is now looking forward to the possibility of high-volume production at 200 layers or more in early 2024, marking a revised timeline for this development.

Sources:

Entegris, Inc. (ENTG) Q3 2023 Earnings Call Transcript | Seeking Alpha

New Materials: Smoothing the Transition to Molybdenum (entegris.com)

Migrating to Molybdenum: Comprehensive IC Solutions to Streamline the Transition (entegris.com)

Atlas Copco to Bolster Semiconductor Portfolio with Acquisition of South Korean Vacuum Valve Company, Presys Co., Ltd.

• Atlas Copco set to acquire South Korean vacuum valve producer, Presys Co., Ltd.
• Presys reported a revenue of MKRW 35,000 in 2022 and has a workforce of 134.
• The deal, pending regulatory approval, is anticipated to close in Q1 2024.

Swedish firm Atlas Copco has announced its intention to purchase Presys Co., Ltd, a South Korean manufacturer of vacuum valves primarily for the semiconductor sector. Located in Suwon, Presys reported 2022 revenues of MKRW 35,000 (equivalent to SEK 275 million). Geert Follens, the Business Area President of Vacuum Technique at Atlas Copco, highlighted that Presys' offerings will enhance their existing semiconductor product range. Although the transaction amount remains undisclosed, it awaits regulatory nods and is slated for completion by early 2024. Upon finalization, Presys will be integrated into Atlas Copco's Semiconductor Chamber Solutions Division within the Vacuum Technique Business Area.

Presys customers, with focus on Asia.

Sources: 

프리시스(주) (gabia.io)

Atlas Copco to acquire Presys (evertiq.com)

KTH and Green14 Innovates Green Silicon Production to Challenge Asia's Dominance in Solar Cell Market

The traditional methods dependent on fossil fuels to reduce silicon dioxide are being challenged by KTH and Green14's reactor, which has a fossil-free process using hydrogen-based plasma reduction. This high-temperature plasma, created from a combination of hydrogen and argon gas, emits water vapor instead of carbon dioxide and has silane as another byproduct, used for producing silicon anodes for lithium-ion batteries.

KTH (Royal Institute of Technology in Stockholm, Sweden) is challenging China's silicon production. A portrait depicts researcher Björn Glaser in a lab hall, pointing out the location where a reactor will be constructed. This seven-meter-tall reactor, being developed in collaboration with startup company Green14, aims to produce green silicon at KTH and challenge Asia's dominance in the solar cell silicon market.

Björn Glaser, researcher and project manager, points out the location in the so-called furnace hall where a reactor will be built. (Photo: Anna Gullers)

In a few months, the new reactor will begin construction at the Department of Materials Science, reaching the ceiling of the grand furnace hall, becoming KTH's largest pilot facility. The researchers aim to develop a process for silicon production that's faster and more environmentally friendly than previous methods.

Using 3,000-degree hydrogen plasma, the reactor will convert silicon dioxide to silicon, crucial for manufacturing solar cells and semiconductors. Unlike traditional methods that rely on fossil fuels, this process with hydrogen plasma emits water vapor instead of carbon dioxide.

The primary goal is to produce silicon suitable for solar cells, a market dominated by Asia, particularly China. Björn Glaser, a lecturer and expert in high-temperature metallurgical experiments, believes this could be a game-changer, potentially bringing Europe back into competition.

Green14, the startup behind the initiative, will own and operate the facility, with Björn Glaser and Adam Podgorski, an Australian chemist and CEO of Green14, working closely together. If successful, Green14 plans to build a larger facility in northern Sweden. However, a significant challenge is ensuring safety due to the combination of extremely high temperatures and hydrogen gas.

Björn Glaser expresses that the project not only provides good PR for KTH but also offers students a unique opportunity to engage in groundbreaking research. If successful, the process could revolutionize how other metals, like copper, titanium, and vanadium, are produced, reducing their carbon footprints and making them cheaper to manufacture.

About GREEN14

GREEN14 is a pioneering technology company committed to developing innovative solutions for a sustainable future. With a focus on renewable energy, GREEN14 is revolutionizing the production of solar grade silicon through its groundbreaking quartz reduction process. By combining cutting-edge technology with a commitment to environmental stewardship, GREEN14 is driving the transition to a low-carbon economy and paving the way for a cleaner, brighter future.

Sources:

KTH utmanar Kinas kiselproduktion | KTH

General 2 — Green14

Surge in HBM Demand Marks Memory Market Recovery and Anticipated Growth in 2024 for Samsung

The global memory market, after experiencing a period of stagnation, has witnessed a resurgence in the third quarter, driven primarily by increased demand for high-density DRAM and NAND products in the PC and mobile sectors.

Samsung Electronics' financial results for 3Q23 highlighted a 12% QoQ revenue increase to 67.40 trillion Korean won, although there was a 12% YoY decrease. Notably, the company reported its highest quarterly profit for the year. Despite potential economic uncertainties in 2024, Samsung is optimistic about the recovery of the memory market and the rebound in smartphone demand. 

The memory sector saw a recovery compared to the previous quarter, especially in PC and mobile due to the rise in adoption of high-density DRAM and NAND products. The completion of customer inventory adjustments also played a role. Server demand was subdued for traditional servers due to macroeconomic uncertainties. However, strong demand persisted for AI-oriented high-density products. Samsung emphasized its focus on expanding sales of advanced node products like HBM DDR5, LPDDR5, and UFS 4.0. They also intend to manage high inventory products through production adjustments. The company expects the recovery trend in the memory market to accelerate further in the fourth quarter. Additionally, there has been a notable surge in HBM demand and the company is actively advancing its HBM businesses and plans to augment its HBM supply capacity by 2.5 times next year.

Trendforce on X (LINK)

The foundry division secured a record number of new orders, particularly in the HPC domain, despite a slow recovery in the mobile market. The new Taylor factory in Texas is set to begin production using the second-gen 3nm GAA process. The advanced packaging business has also been flourishing with orders from both domestic and international HPC clients.

Profits in the mobile panel business surged due to new flagship models from major clients. In contrast, the large panel business faced tepid demand. Samsung aims to cater to the growing mobile panel demand and increase profitability in the large panel sector by introducing new products and enhancing yield rates.

With the global economy expected to bounce back in 2024, the smartphone market's demand is anticipated to surge. High-end market growth is likely to continue, driven by the global recovery of the smartphone market.

Looking ahead to 2024, Samsung anticipates increased PC and mobile demand due to product replacement cycles initiated during the pandemic's early phase. High-density trends in both DRAM and NAND are expected to persist, propelled by on-device AI advancements. The company plans to focus on advanced node products, including 1B nanometer DDR5, LPDR5X, PCI Gen 5, and UFS 4.0, to bolster product competitiveness and profitability. Emphasizing the growing demand for generative AI, Samsung aims to strengthen its market position with high-density, low-power, and high-performance products for on-device AI, which has recently gained significant attention.

Sources;

TrendForce on X: "Samsung Electronics has released its financial results for 3Q23, reporting a quarterly revenue of 67.40 trillion Korean won—a 12% QoQ increase but 12% YoY decrease. The company achieved its highest quarterly profit of the year and anticipates that, despite ongoing global economic… https://t.co/RDKVjimgzN" / X (twitter.com)

Samsung Electronics Co Ltd (SSNLF) Q3 2023 Earnings Conference Call Transcript | Seeking Alpha

Micron's Distinct Approach to DRAM and Apple Design Wins

The tech landscape has seen consistent advancements, especially with the D1β (D1b) DRAM generation. Micron's D1β LPDDR5 16 Gb DRAM chips, integrated into the Apple iPhone 15 Pro, represent a significant step forward. Codenamed Y52P die, this chip offers an improved form factor and density, especially when contrasted with its LPDDR5/5X D1α 16 Gb predecessor. The integration of these chips into Apple's flagship device marks a significant design win for Micron, emphasizing the trust and partnership between the two tech giants.

In a recent teardown of the Apple iPhone 15 Pro, TechInsights has discovered a remarkable find - Micron's cutting-edge D1β LPDDR5 DRAM chips. These chips mark the industry's first foray into the D1β generation, and they are nothing short of impressive. (LINK)

Micron's technological direction is unique, especially with their decision to forego the Extreme Ultraviolet Lithography (EUVL) process, common in sub-15nm DRAM scaling. This stands in contrast to industry giants like Samsung and SK Hynix, who employ EUVL in their DRAM fabrication. Despite this, Micron has successfully launched the D1z, D1α, and D1β DRAM chips without EUVL, illustrating an alternative yet effective DRAM scaling approach.

In wrapping up, while Samsung and SK Hynix utilize EUVL in their DRAM processes, Micron has carved a different path, further solidified by their design wins with Apple. This partnership not only underscores Micron's technological prowess but also indicates the potential of varied methodologies in shaping the future of DRAM technology.

Source: Micron's D1β LPDDR5 Chip: Great Advancements in Memory Technology | Semiconductor Materials and Equipment (abachy.com)

Canon's Nanoimprint Leap: Challenging ASML's Dominance in Semiconductor Lithography

Canon Inc. has unveiled its semiconductor lithography equipment after 10 years of development, aiming to challenge the market dominance of Netherlands-based ASML Holding NV. This equipment, using Canon's new nanoimprint lithography (NIL) technology, prints intricate circuit patterns on semiconductor wafers. Historically, Japanese firms, including Canon, led the lithography market until ASML took over with a 90% share. Canon's system merges its renowned inkjet and camera tech. Unlike traditional methods using strong light and resulting in high costs, Canon's method is energy-efficient, printing patterns in a single step and using just 10% of the power. Its affordability and efficiency could make it competitive, especially for products with complex designs. While current cutting-edge devices use 2-nanometer chips, Canon's tech can produce 5-nanometer-node products, with aspirations to achieve 2-nanometer-node. Canon's launch offers potential diversification in a market long dominated by ASML.

According to Lithography expert Dr. Frederick Chen, Canon's statement on nanoimprint technology status following mid-October announcement indicated they were still facing challenges before reaching the levels required for mass production.

Source: Canon releases ‘game-changing’ chipmaking equipment | The Asahi Shimbun: Breaking News, Japan News and Analysis

Canon's statement on nanoimprint technology status following mid-October announcement indicated they were still facing challenges before reaching the levels required for mass production. https://t.co/Z58su0Mkje

— Fred Chen (@DrFrederickChen) October 30, 2023

Kokusai Electric's Stellar Tokyo IPO: A Surge in Stock, High Hopes for the Future

Kokusai Electric's stock rose 28% in its Tokyo debut after KKR sold its shares for $724 million, marking Japan's largest IPO in five years. Closing at 2,350 yen, Kokusai's valuation reached $3.61 billion. This was the biggest Tokyo listing since SoftBank Corp. in 2018. KKR reduced its stake from 73.2% to 47.7%. Analysts noted a challenging market for chip-related stocks but anticipate a rebound for Kokusai. The company specializes in machines for silicon wafer films, with major clients like Samsung. Despite a predicted profit drop, Kokusai's President sees growth potential by 2025. KKR's previous sale attempt to Applied Materials was unsuccessful. The IPO saw huge interest, with foreign investors oversubscribing by over 10 times.

Source: Kokusai Electric shares jump 28% in Tokyo debut - Nikkei Asia

Infineon Acquires GaN Systems for $830M, Bolstering Position in Power Semiconductor Market

Strategic Move Amplifies Infineon's GaN Expertise, Accelerating Energy-Efficient Solutions and Decarbonization Efforts

Infineon Technologies has successfully acquired GaN Systems, a Canadian company, for $830 million. This acquisition positions Infineon as a significant supplier of gallium nitride (GaN) power devices across various sectors, including consumer, industrial, and automotive applications. With the deal, Infineon inherits a wide array of GaN-based power conversion devices, designs, and advanced application expertise. GaN Systems, located in Ottawa, has integrated with Infineon, which already had its CoolGaN range. Jochen Hanebeck, Infineon's CEO, emphasized that GaN technology promotes energy efficiency and contributes to decarbonization efforts. Following this acquisition, Infineon boasts 450 GaN experts and access to over 350 GaN patent families, solidifying its leadership in the power semiconductor domain. The collaboration of both companies' intellectual properties, application insights, and customer projects optimally positions Infineon for future growth. 

Notably, GaN Systems has a unique island-based device structure that enhances power design performance, utilized by companies like QPT for fast switching speeds of up to 20MHz. This acquisition comes after Infineon's 2020 purchase of Cypress Semiconductor.

Source: Infineon completes acquisition of GaN Systems ... (eenewseurope.com)

TSMC To Report Breakthrough in NMOS Nanosheets Using Ultra-Thin MoS2 Channels at IEDM 2023

A TSMC-led research team, in collaboration with National Yang Ming Chiao Tung University and National Applied Research Laboratories, has unveiled promising results for using ultra-thin transition metal dichalcogenides (TMDs), specifically MoS2, as the channel material in NMOS nanosheets. Their innovative approach deviates from the conventional method of thinning Si channels. The team's devices exhibited impressive performance metrics: a positive threshold voltage (VTH) of ~1.0 V, a high on-current of ~370 µA/µm at VDS = 1 V, a large on/off ratio of 1E8, and a low contact resistance ranging between 0.37-0.58 kΩ-µm. These outcomes were primarily attributed to the introduction of a novel C-shaped wrap-around contact, which enhances contact area, and an optimized gate stack. While the devices demonstrated satisfactory mechanical stability, a challenge remains in addressing defect creation within the MoS2 channels. This groundbreaking study, titled "Monolayer-MoS2 Stacked Nanosheet Channel with C-type Metal Contact" by Y-Y Chung et al., is a pivotal step forward in nanosheet scaling using TMDs.

ALD is a the technique for the precise and uniform synthesis of MoS₂, especially for semiconductor applications on large-scale wafers. The choice of precursors plays a crucial role in achieving optimal deposition characteristics. Mo (CO) 6 and H2S have been identified as the primary precursors for depositing molybdenum and sulfur components, respectively. These precursors have demonstrated the capacity for self-limiting growth behavior within a specific ALD temperature window, leading to uniform MoS₂ layers. Notably, this process has been successfully scaled up to achieve highly uniform film growth on large 300 mm SiO2/Si wafers, marking its potential for industry-level manufacturing. The ability to maintain uniformity and thickness control on such wafers emphasizes the potential of ALD in integrating MoS₂ into next-generation electronic devices and further underscores the significance of selecting appropriate precursors for optimal deposition outcomes. Other precursors have been investigated. MoCl₅ and MoF₆ serve as alternative molybdenum sources. For the sulfur component, H₂S is commonly paired with molybdenum precursors, but (CH₃)₂S has also been explored. The choice of these precursors directly impacts the properties of the resulting MoS₂ film in the ALD process and therefore precursor development for 2D MoS2 is a hot field of ongoing research.

While deposition methods are abundant, etching processes are comparatively scarce. Recent research by Elton Graugnard et al also introduces a thermal Atomic Layer Etching (ALE) technique for MoS2, leveraging MoF6 for fluorination, alternated with H2O exposures, to etch both crystalline and amorphous MoS2 films. This process has been characterized using various analytical techniques like QCM, FTIR, and QMS. The etching is temperature-dependent, with a significant increase in mass change per cycle as temperature rises. The mechanism involves two-stage oxidation of Mo, producing volatile byproducts. The resultant etch rates were established for different films, and post-etch annealing rendered crystalline MoS2 films. The thermal MoS2 ALE introduces a promising low-temperature method for embedding MoS2 films in large-scale device manufacturing.

Chem. Mater. 2023, 35, 3, 927-936

Sources:

 https://www.ieee-iedm.org/press-kit

https://pubs.acs.org/doi/10.1021/acs.chemmater.2c02549

Hamas' Brutal Attacks on Israel Could Disrupt Global Tech Supply Chain and Intel's Expansion Plans

The escalating Israel-Hamas war, after Hamas brutal attack on Israel and innocent civilians, is affecting the global tech sector. Many professionals, including top executives, are now serving as reservists in the Israel Defense Forces, as highlighted by EPSNews. Intel, a major private employer in Israel, along with other tech giants like Nvidia, Apple, Amazon, and Microsoft, faces potential disruptions, especially with facilities near conflict zones. The blockade in Gaza and transportation interruptions further strain the supply chain, emphasizing the tech industry's vulnerability to geopolitical challenges.

Intel factory in Kiryat Gat, employing about 5000 workers, which manufactures computer chips (wWikipedia), Location of Intel Fabs in Israel (Google)

Kiryat Gat, situated in Israel's Southern District, is known for Intel's semiconductor fabrication plants, including Fab 28 and the upcoming Fab 38. Founded in 1954, the city has grown significantly due to Jewish immigration over the decades and it remains an educational hub with 25 schools serving over 10,000 students.

The Israel-Hamas conflict has intensified concerns over the global semiconductor supply chain, as CNBC reports. With Israel being a key player in chip production, the geopolitical unrest poses risks to the semiconductor industry. The recent kidnapping of an Nvidia engineer further accentuates these threats, prompting tech firms to prioritize their employees' safety in the region.

Bloomberg reported this summer of Intel Corp.'s initiative to set up a new manufacturing facility in Israel. This move is part of Intel's strategy to diversify its production sources. While details remain undisclosed, the facility will focus on wafer fabrication. Intel's CEO, Pat Gelsinger, intends to expand manufacturing bases outside Asia. The plant, expected to operate from 2027, will be located in Kiryat Gat and is seen as a significant foreign investment in Israel. This development aligns with the global shift in chip manufacturing, as seen with Intel's investment in Poland and Micron Technology's potential investment in India.

Sources: 

War in Israel to Impact Electronics Supply Chain - EPS News

Intel to Build in Israel as Chipmakers Move Beyond East Asia - Bloomberg

Israel Is an Important Link in the Global Chip Supply Chain - Bloomberg

Kiryat Gat - Wikipedia

China Tightens Grip on Vital Graphite Exports Amid Global EV Surge: Implications for U.S. Battery Industry and Beyond

From December 1, China will mandate export permits for certain graphite products to safeguard national security amidst increasing international scrutiny over its manufacturing dominance. China supplies 67% of global natural graphite and refines over 90% used in EV battery anodes. This move coincides with foreign governments pressuring Chinese firms on their industrial practices. The U.S. and European Union are implementing measures against Chinese products and technologies. New Western investments aim to counter China's graphite dominance, but success remains uncertain.

According to the USGS, in 2022, the United States did not produce any natural graphite. Instead, 95 U.S. companies consumed 72,000 tons of it, valued at $140 million. These companies were mainly located in the Great Lakes and Northeast regions. Natural graphite was used in batteries, brake linings, lubricants, steelmaking, and other applications. The U.S. imported an estimated 82,000 tons of graphite in 2022, with 77% being flake and high-purity graphite. Due to the rising electric-vehicle market, graphite consumption is expected to grow. Since 2018, the global battery market for graphite has surged by 250%. The U.S. has four operational lithium-ion battery plants and 21 more in development. These plants, when fully operational, will need about 1.2 million tons of spherical purified graphite annually, with 40%-60% sourced from synthetic graphite.

Source: USGS

U.S. graphite imports saw a decline in 2019 and 2020 but rose by 55% in 2022. This increase is attributed to the demand from the lithium-ion battery industry. China dominated the graphite production in 2022, accounting for 65% of the global output. North America's graphite production was just 1.2% of the global supply. Projects to explore and produce graphite are ongoing worldwide. The geopolitical conflict in Ukraine has impacted graphite production and trade relations, affecting the global graphite market.

Europe heavily relies on graphite imports, primarily from China, but aims to reduce this dependency by advancing local mining projects. The EU has categorized graphite as a critical raw material due to its importance in the EV battery sector. Notably, mining initiatives in Sweden, such as Woxna Graphite Mine, and Norway's Skaland Graphite operation are underway to bolster local supply chains. With the rise of European battery gigafactories, securing a stable graphite supply has become imperative.

Why is graphite important?

Graphite is a crucial component in electric vehicle (EV) batteries, specifically in the lithium-ion batteries that power most EVs. Here's how graphite is used:

Anode Material: In a lithium-ion battery, there are three primary parts: the cathode (positive electrode), the anode (negative electrode), and the electrolyte. Graphite is used as the primary material for the anode. When the battery is being charged, lithium ions move from the cathode through the electrolyte and get stored between the layers of graphite in the anode.

Conductivity: Graphite is a good conductor of electricity. This property is essential for efficiently moving electrons in and out of the anode during the charging and discharging cycles of the battery.

Stability: Graphite has a layered, planar structure. This allows lithium ions to easily slip between these layers, a process called intercalation. This structure provides a stable housing for lithium ions, ensuring the battery's longevity and safety.

Volume Expansion: One of the challenges with lithium-ion batteries is that materials can expand and contract significantly as they absorb and release lithium ions. Graphite's structure can accommodate this volume change, helping to maintain the integrity of the electrode.

Natural vs. Synthetic Graphite: There are two main types of graphite used in EV batteries: natural flake graphite and synthetic graphite. Both types can be processed to achieve the desired properties for battery anodes. While natural graphite is mined, synthetic graphite is produced from petroleum coke.

The increasing demand for EVs has led to a surge in the need for graphite. As a result, the sourcing, processing, and supply chain for graphite have become critical considerations for the battery and EV industries.

Sources:

China, top graphite producer, to curb exports of key battery material (cnbc.com)

Graphite (Natural) (usgs.gov)

New US Roadmap Identifies Critical Semiconductor Research Priorities

Advancing semiconductor research is essential to continued innovation in the chip industry and throughout our economy. As ever-shrinking semiconductor components face fundamental physical limits, next-gen breakthroughs are unachievable without major advancements. To help address this challenge, Semiconductor Research Corporation (SRC) today unveiled the Microelectronics and Advanced Packaging (MAPT) Roadmap, which defines critical chip research priorities and technology challenges that must be addressed to support the “seismic shifts” outlined in the Decadal Plan for Semiconductors released by SRC and SIA in January 2021.

The Decadal Plan identified five seismic shifts in the industry related to smart sensing, memory and storage, communication, security, and energy efficient computing. The MAPT Roadmap continues the spirit of the Decadal Plan and discusses how to achieve its system-level goals, outlining the implementation plan for the semiconductor industry. The fundamental research that will transform these obstacles is focused on advanced packaging, 3D integration, electronic design automation, nanoscale manufacturing, new materials, and energy-efficient computing. The MAPT Roadmap is framed around fundamental and practical limits of information and communications technology sustainability: energy sustainability, environmental sustainability, and workforce sustainability.

Federal government and private sector investments in semiconductor R&D have propelled the rapid pace of innovation in the U.S. semiconductor industry, spurring tremendous growth throughout the U.S. and global economies. Using the MAPT Roadmap as a guide, we must sustain and expand public and private investments in chip research to help unlock the transformative technologies of the future.

Source: SIA, Erik Hadland, Director of Technology Policy New Roadmap Identifies Critical Semiconductor Research Priorities - Semiconductor Industry Association (semiconductors.org)

Intel Unveils Breakthrough 3D CFET Design at IEDM: Setting the Stage for Next-Gen Compact and Efficient Electronics

Intel researchers developed a 3D monolithic CFET device* with 3 n-FET nanoribbons atop 3 p-FET nanoribbons, separated by 30 nm gap. This industry-first device enabled the creation of functional inverters at a 60 nm gate pitch. Notably, it incorporated vertically stacked dual-Source/Drain epitaxy, dual metal work function gate stacks, and backside power delivery with direct device contacts. They also introduced a nanoribbon "depopulation" method for varying n-MOS/p-MOS device numbers. This research advances the understanding of CFET scalability for logic and SRAM applications and highlights key process enablers. The paper will be presented at the upcoming IEDM conference in San Francisco.

Comment: The stacked CMOS inverter at a 60 nm gate pitch represents an advancement in semiconductor design, allowing for denser circuits. The 60 nm distance between gates indicates a highly miniaturized design. Power vias provide vertical power connections to different layers, while direct backside device contacts enhance efficiency and heat dissipation. This development offers a glimpse into the  future electronic devices being more compact, efficient, and high-performing than deploying "planar" designs in one layer like the FinFETs and GAA-FETs of today.

ALD plays a key role in manufacturing 3D monolithic CFET devices by assisting in crafting the architecture and providing atomically precise and even thin film layers at small scales. ALD ensures even coverage, which is important for 3D designs, especially on vertical areas and inside deep gaps. It's used to put down important materials in transistor gate stacks (High-k/Metal Gates or HKMG), as well as barrier and seed layers. ALD also helps in doping (SSD - solid state doping), which changes how semiconductors behave, and in creating spacers, important for separating and defining parts of transistors. In brief, ALD helps improve the CFET design and its overall performance.

Figures from IEDM press kit

Paper: 29.2_A CFET-Based CMOS Inverter_Intel.docx (egnyte.com)

* A 3D monolithic CFET device combines three-dimensional stacking and the Complementary Field-Effect Transistor (CFET) design within a single semiconductor structure. This approach vertically integrates both n-type and p-type transistors on the same substrate, promoting tighter integration and reduced interconnect delays. By leveraging the complementary operation of CFET and the benefits of 3D stacking, the device aims to enhance performance, miniaturization, and efficiency in semiconductor technology.

The Semiconductor Showdown: TSMC's GAA FETs vs. Intel's RibbonFET

The semiconductor industry is witnessing a fierce competition between TSMC and Intel, as they advance transistor designs with TSMC's Gate-All-Around (GAA) FETs and Intel's RibbonFET. Atomic Layer Deposition (ALD) plays an instrumental role in crafting these intricate designs. As the race to dominate the microelectronics realm heats up, the innovations from these giants foretell a transformative phase for technology between 2024 and 2026. This article dives into their respective technologies, comparing their strategies and highlighting the future implications for the semiconductor industry.

Both TSMC and Intel are pushing the boundaries of semiconductor innovation with advanced transistor designs. TSMC's GAA (Gate-All-Around) FET (Field-Effect Transistor) technology and Intel's RibbonFET are prime examples of this evolution. ALD is crucial for GAA FET production, ensuring precision and atomically thin, conformal or on purpose non-conformal or selectively deposited films. As transistors miniaturized, ALD replaced traditional silicon dioxide gate dielectrics with high-k materials, reducing gate leakage and offering enhanced uniformity. One of the challenges in GAA FETs is accurately aligning the gate material around the channel; ALD facilitates this through self-aligned processes. Additionally, in configurations with multiple gates or nanosheets, ALD accurately deposits spacer materials, preserving the necessary separation between nanosheets. ALD also offers precise doping for GAA FETs, including NMOS and PMOS. With atomic-level control, ALD introduces dopants like phosphorus for NMOS and boron for PMOS. Given the shrinking device dimensions, ALD's precision becomes vital, especially when considering techniques like solid-state doping to achieve ultra-shallow profiles.

TSMC's Gate-All-Around (GAA) FET technology represents a significant shift from the traditional FinFET transistor design. In a GAA FET, the gate material wraps entirely around the channel, unlike the FinFET where the gate is only on three sides of a vertical fin. This complete encirclement provides enhanced control over the current flow through the channel, reducing leakage current and allowing for lower voltage operation. The result is improved energy efficiency and performance.

TSMC's roadmap to N2. (Image: TSMC)

On the other hand, Intel's RibbonFET introduces a similar gate-all-around design but with a unique twist. Instead of a traditional vertical fin, RibbonFET uses nanosheet technology, where multiple flat nano-sheets are stacked to form the channel. This design offers even better control of the current flow, leading to significant gains in performance and efficiency. RibbonFET is one of Intel's flagship innovations for its advanced nodes, emphasizing the company's commitment to reclaiming technology leadership in the semiconductor space.

Intel 20A Ribbon FET (intel.com)

In a recent article Tom´s Hardware (Anton Shilow, link below) compares the advanced semiconductor technology nodes from industry TSMC and Intel, focusing on TSMC's N3P and N2 nodes against Intel's 20A and 18A nodes. Forecasted for release between 2024 and 2026, these nodes represent the forefront of semiconductor innovation. TSMC's N3P, a 3nm-class node, is set to be available by 2025 and offers performance comparable to Intel's 18A. Interestingly, TSMC's 2nm-class N2, expected in the second half of 2025, is anticipated to outpace Intel's 18A in terms of power, performance, and area advantages. Intel's 20A, arriving in 2024, promises significant advancements by introducing RibbonFET gate-all-around transistors and a backside power delivery network. The subsequent 18A will further refine these innovations. While TSMC leans on its proven FinFET technology for the N3P, it plans to introduce nanosheet GAA transistors in the N2. 

As the semiconductor race intensifies, both companies are heavily invested in outpacing each other, with TSMC focusing on technology maturity and cost-effectiveness, and Intel aiming to regain its technology leadership. The dynamics between these tech giants will shape the semiconductor industry's future.

Comparison of Advanced Semiconductor Technology Nodes: TSMC N3P & N2 vs. Intel 20A & 18A, highlighting the competitive landscape of the semiconductor industry for the years 2024-2026 based on Toms Hardware article below.

Sources: 

TSMC: Our 3nm Node Comparable to Intel's 1.8nm Tech | Tom's Hardware (tomshardware.com)

Intel and TSMC company web pages