NCD supplied repeated ALD equipment for special protective coating

NCD Co., Ltd. has again supplied large-scale productive ALD equipment to a Korean customer. It is for special coating parts used in semiconductor equipment to protect from corrosion and plasma arcing. This contracted equipment is the improved Lucida GSH Series ALD, which is capable of coating more and heavier products at once than the existing equipment. So the customer is able to obtain the greater increased productivity and reduced coating costs.

As semiconductor devices become smaller and more integrated, particles and byproducts that were not a problem before can significantly affect device performance, so the cleaning cycle and life time of parts used in semiconductor equipment are becoming shorter.

Lucida GSH Series ALD

Therefore, atomic layer deposition protective coating on parts can be a very effective solution, and high-quality, uniform atomic layer coating can achieve the effect of increasing the usage time of expensive parts in semiconductor equipment without cleaning and replacement.

Previously, atomic layer deposition protective coating was widely applied to expensive parts such as showerheads and ESCs, but recently, it has been applied to various semiconductor equipment parts with complex gas paths, quartz products with complicated shapes, and high-purity precursor canisters that require the lowest impurity control. The scope of application is gradually increasing so we will look forward to steady and continued expansion of products and markets in this application field.

This repeated contract confirms once again the excellence of NCD's industrial atomic layer deposition technology and equipment to its customers, and it showed NCD to have occupied the leader on the gradually expanding market of atomic layer deposition equipment for part protection coating. NCD will continue to pioneer new atomic layer deposition markets based on its best technology and customer trust.

Exploring Ultrathin Solar Cells with Professor Carl Hägglund: A Journey from Stanford's ALD Techniques to Plasmonic Solar Cell Optimization

In this episode, Tyler is joined by Professor Carl Hägglund from Uppsala University. They discuss Carl’s motivations for pursuing ultrathin solar cells, how he learned ALD at Stanford in Stacey Bent’s lab, and an unlikely research connection through his child’s school. They also talk about why ALD is useful for plasmonic solar cells, optimization of SnS ALD and his planned path towards a fully realized ultrathin photovoltaic.

00:00 Introduction

01:45 Motivation for fabricating plasmonic solar cells

09:58 Learning ALD at Stanford

22:46 Optimizing SnS ALD process

30:33 Path towards an ultrathin solar cell

LINK (Spotify) SnS ALD and Ultrathin Solar Cells with Carl Hägglund – ALD Stories Ep. 30 - ALD stories podcast | Podcast on Spotify

Enhancing Thin Film Deposition with Plasma-Activated Water: A Novel Approach in Atomic Layer Deposition

The research article "Novel Energetic Co-Reactant for Thermal Oxide Atomic Layer Deposition: The Impact of Plasma-Activated Water on Al2O3 Film Growth" presents a groundbreaking study on the use of plasma-activated water (PAW) in the atomic layer deposition (ALD) of Al2O3 thin films. This study offers significant insights into the potential advantages of using PAW over traditional water in thin film deposition processes.

One of the key findings of this research is the enhanced Growth Per Cycle (GPC) when using PAW as a co-reactant. The study found that PAW led to an increase in GPC of up to 16.4% compared to deionized (DI) water. This enhancement is attributed to the reactive oxygen species present in PAW, such as H2O2 and O3, which are believed to activate substrate sites more effectively, thereby improving both the GPC and the overall quality of the films.

The study also delves into the chemical reactivity of PAW, noting significant changes in its physicochemical properties upon activation. These changes include a decrease in pH, indicating increased acidity, as well as increases in oxidation-reduction potential (ORP), conductivity, and total dissolved solids (TDS). Additionally, the concentration of reactive species like H2O2, NO2−, NO3−, HNO2, and O3 was found to be higher in PAW.

The improved film quality achieved with PAW is another highlight of the study. Films grown using PAW, especially with PAW at a pH of 3.1, displayed a near-stoichiometric O/Al ratio, reduced carbon content, and an expanded bandgap. These characteristics are indicative of a superior film quality compared to those grown using DI water.

Furthermore, the study suggests that a comprehensive understanding of PAW's role in ALD necessitates further investigations. These investigations should explore different temperatures, metal precursors, and PAWs generated by alternate non-thermal plasmas.

The term “PAW-ALD” has been proposed to describe this enhanced variant of the ALD process that incorporates plasma-activated water. This new descriptor highlights the unique approach and potential benefits of using PAW in thin film deposition processes.

Finally, the potential applications of this research are significant. The use of PAW in ALD could mirror the gains observed in plasma-enhanced atomic layer deposition (PEALD) processes that use oxygen plasma, indicating its potential industrial relevance.

Source: 

Nanomaterials 2023, 13(24), 3110; https://doi.org/10.3390/nano13243110

Nanomaterials | Free Full-Text | Novel Energetic Co-Reactant for Thermal Oxide Atomic Layer Deposition: The Impact of Plasma-Activated Water on Al2O3 Film Growth (mdpi.com)

Announcement: Webinar on ALD and MLD Techniques for Advanced Functional Materials

Join us for an enlightening webinar on Atomic Layer Deposition (ALD) and Molecular Layer Deposition (MLD), showcasing their combined prowess in the creation of novel inorganic-organic materials. This event is an excellent opportunity for those interested in advanced material sciences and engineering.

Date and Time: Tuesday, 16th of January, 2024 at 14:00 CET

Duration: 45 minutes

This session will provide a comprehensive overview of ALD and MLD, contrasting them with traditional solution-based methods. We will delve into how these techniques enable the formation of high-quality thin films, crucial for practical applications in areas such as optical data storage and wearable energy harvesting devices.

Key Highlights:

- An introduction to ALD-MLD techniques.

- Exploration of state-of-the-art inorganic-organic thin films, including photoactive ferrimagnetic and thermoelectric hybrid thin films.

- Discussion on technical challenges with organic precursors and solutions for industrial-scale application.

Guest Speaker: Topias Jussila, Doctoral Researcher, Aalto University

Topias Jussila is a promising PhD student at the Department of Chemistry and Materials Science, Aalto University, Finland. With a background in Chemistry and Functional Materials, his current research focuses on the development of novel thin film materials using ALD and MLD, particularly in the realm of iron-based materials.

Don't miss this opportunity to gain insights into the cutting-edge world of thin film materials and their applications. Register today to secure your spot!

For more information and registration, visit Atomic layer deposition (ALD) and molecular layer deposition (MLD) together present an elegant technique for the deposition of novel inorganic-organic materials. (picosun.com)

Introducing ALD to the Semiconductor Industry with Suvi Haukka – ALD Stories Ep. 29

Dr. Suvi Haukka, former executive technologist at ASM, ASM Fellow and ALD Innovator Awardee, joins Tyler for Episode 29. Suvi began her ALD career at Microchemistry in Finland working on atomic layer epitaxy on catalysts for under the direction of ALD technology inventor, Tuomo Suntola. She continued with Microchemistry as head of the thin film development group before spending most of her time teaching the world’s biggest semiconductor companies, like Intel and Samsung, about ALD. Suvi is one of the integral people in introducing ALD to the semiconductor industry in the 2000s. Suvi and Tyler discuss how she started working with ALD, what it was like to do a PhD with Tuomo Suntola, and how the make up of Microchemistry changed over the years. We also discuss the circumstances surrounding the ASM acquisition, how development changed under new leadership, and how it felt pitching ALD to the semiconductor industry. 

In this episode: 

00:32 Introduction to Microchemistry 

06:01 Doing a PhD with Tuomo Suntola 

19:00 Visiting semiconductor companies 

25:37 Post-ASM acquisition

ASD2024: Uniting the World of Area Selective Deposition in Historic Old Montreal

Announcement for ASD2024 Workshop

Dates: April 15-16, 2024

Location: Old Montreal, Canada

Welcome and bienvenue to the exciting Area Selective Deposition (ASD) workshop to be held in the picturesque Old Montreal. This two-day event, scheduled for April 15 and 16, offers an enriching platform for both academic and industry professionals to exchange groundbreaking ideas in the field of ASD.

Special Sessions:

1. Pre-Workshop Tutorial: A comprehensive half-day tutorial on April 14 (Sunday afternoon). Note: This session requires an additional fee.

2. Atomic Layer Processing Showcase: A half-day event on April 17 (Wednesday morning), highlighting Canada's advancements in atomic layer processing. This session is included in the conference fee.

Conference Venues:

- Hotel Place d'Armes (55 Rue Saint-Jacques): Main sessions and lunches on Monday and Tuesday will be hosted here. This 4-star hotel is conveniently located near a metro stop.

- Hotel Nelligan (106 Saint-Paul St W): A 4-star boutique hotel, the venue for the opening mixer on Sunday evening and the poster session on Monday evening.

Workshop Highlights:

- Single session format over two days featuring invited and contributed talks.

- A panel discussion focusing on the industrial and academic communication of ASD.

- Networking opportunities with leading experts and peers.

Explore Montreal:

Participants are encouraged to experience the charm of Old Montreal, known for its vibrant restaurants, bars, shopping venues, and historical sites like the Notre Dame Basilica and the port. For sports enthusiasts, the Circuit Gilles Villeneuve offers a unique opportunity for running and cycling.

Organizers:

- Prof. Sean Barry, Carleton University

- Prof. Paul Ragogna, Western University

Scientific Committee:

- Adrie Mackus, Eindhoven University of Technology

- Anjana Devi, Ruhr University Bochum

- Annelies Delabie, IMEC

- Anuja DaSilva, Lam Research

- Dennis Hausmann, Lam Research

- Erwin Kessels, Eindhoven University of Technology

- Gregory Parsons, North Carolina State University

- Han-Bo-Ram Lee, Incheon National University

- Ishwar Singh, IBM

- Keyvan Kashefi, Applied Materials

- Kristen Colwell, Intel

- Mark Saly, Applied Materials

- Marko Tuominen, ASM

- Ralf Tonner-Zech, Wilhelm-Ostwald-Institute für Physikalische und Theoretische Chemie

- Ravi Kanjolia, EMD Electronics

- Robert Clark, TEL

- Sang Hoon Ahn, Samsung Electronics

- Seung Wook Ryu, SK hynix

- Stacey F. Bent, Stanford University

Contact Information:

asd2024.ca

Congratulations to Jusung Engineering on 30 Years of Pioneering Innovation and Market Leadership in ALD, Semiconductor, Display, and Solar Technologies!

Jusung Engineering, celebrating its 30th anniversary, is a leader in semiconductors, displays, and solar equipment. Founded in 1993, the company has seen considerable growth through innovation, achieving record sales and operating profits last year. It specializes in semiconductor equipment for memory and non-memory sectors, leveraging advanced ALD technology. In displays, Jusung is diversifying equipment for various panel sizes, while in solar, it's innovating with high-efficiency solar cells. The company is investing in future growth, with new R&D and manufacturing facilities, focusing on technological independence. It holds over 3,000 patents, with 65% of its workforce in R&D, investing 15-20% of sales in technology development. The CEO attributes their success to relentless innovation and a unique path, with plans to maintain leadership in future technologies and expand into global markets. Despite recent challenges, Jusung remains optimistic, prioritizing innovation and market creation.

The Jusung Engineering headquarters in Gwangju, Korea 출처 : Businesskorea (https://www.businesskorea.co.kr)

Fullarticle and interview:

Jusung Engineering Leading in Semiconductor, Display, Solar by Innovating with Atomic Layer Deposition - Businesskorea

AI-Driven Chip Demand Spurs Optimism in Semiconductor Industry; Analyst Upgrades Key Players with Bullish Price Targets

Analyst Timm Schulze-Melander (Head of Tech Hardware research, Redburn) predicts growth in the semiconductor equipment industry, driven by AI-related chip demand. He upgraded Applied Materials and ASM International to "Buy," started Lam Research with a "Buy" rating, and rated KLA as "Neutral." Despite current capacity reductions, he sees growth resuming in 2025. Positive signs include recovering PC and mobile phone markets, with smartphone shipments expected to rise. He set price targets for each company, highlighting their market strengths. This analysis led to a rise in the companies' stock prices, reflecting optimism for the sector's future, particularly in the context of AI-driven demand.

The target prices set by analyst Timm Schulze-Melander are as follows:

• Lam Research: $800 - now $717
• ASM International: €545 - now $459
• KLA: $550 - now $554
• Applied Materials: $175 - now $149

Sources: 

Applied Materials and 3 Other Chip Equipment Stocks for a New AI Play - MarketWatch

Google Finance

SEMICON Europa 2023: A Deep Dive into ALD Technology for Wafer Fab Equipment in the More-than-Moore Era

Last week at SEMICON Europa, at the ALD Tech Day Organized by Beneq, Yole Group presented a comprehensive analysis on ALD technology for More-than-Moore (MtM) devices, focusing on its impact and future in the wafer fab equipment market. The presentation titled "Atomic Layer Deposition for More-than-Moore Devices in a Perspective of the Wafer Fab Equipment Market" offered valuable insights into the current trends and future directions of this pivotal technology.

The Growing Importance of ≤200 mm Wafers

A focal point of the discussion was the ≤200 mm wafer size, a segment that remains crucial in the semiconductor industry despite the surge in larger wafer sizes. The presentation highlighted the market size, chipmaker revenue, and capacity expansion specifically for this category. It emphasized that while the industry continues to evolve technologically, the demand for ≤200 mm wafers remains robust, accounting for a significant portion of the market.

Semiconductor Device Revenue Projections

Yole Group presented a detailed forecast for semiconductor device revenue, segmenting it by device type. They projected a CAGR of approximately 4.5%, expecting the overall market to reach around $850 billion by 2030. Within this, MtM devices are anticipated to contribute significantly, estimated at about $270 billion, indicating the growing relevance of these devices in the semiconductor landscape.

CapEx 200 mm Accelerates in Coming 5-Years - In 2023, the CapEx for 200mm wafer processing stood at $37 billion, representing 15% of the total device revenue of $252 billion. The slide forecasts an increase in CapEx to 17% of revenue by 2025, followed by an expected decrease to more sustainable levels by 2028. An impending demand for more Wafer Fab Equipment (WFE) for 200mm processing. Importantly, a significant opportunity for the introduction of ALD technologies in fabrication facilities, driven by the growth of compound semiconductors. This suggests a strategic shift in the industry, emphasizing the expanding role of ALD technology.

Capital Expenditure Trends and ALD Market Dynamics

The presentation also shed light on the capital expenditure (CapEx) trends in the industry, particularly for 200 mm wafer processing. With CapEx projected to increase to 17% of the revenue by 2025, a subsequent trend towards more sustainable levels by 2028 was also anticipated. This trend underscores the expanding market and the need for more Wafer Fab Equipment (WFE), presenting a substantial opportunity for the growth of ALD technologies.

Atomic Layer Deposition: Meeting Industry Needs

The analysis delved deeply into the ALD market, discussing how this technology is evolving to meet the changing demands of the semiconductor industry. It was pointed out that ALD technology is not just adapting but also driving significant advancements, particularly in the context of MtM devices.

From the presentation by Yole Group focuses on the use of ALD in power devices, emphasizing its role in enhancing device performance through precise interface control. The need for specialized ALD equipment, capable of handling multiple processes and materials, including thermal and plasma ALD with various precursors. ALD applications are found in in Silicon Carbide (SiC) and Gallium Nitride (GaN) devices, covering aspects like passivation, substrate creation, and buffer layers. While ALD is still in R&D for GaN High Electron Mobility Transistors (HEMT), it is already being used for SiC Trench and Planar MOSFETs in encapsulation and gate dielectrics, signaling its growing importance in semiconductor manufacturing.

Industry Challenges and Opportunities

The challenges and opportunities within the semiconductor industry were a crucial part of the discussion. The presentation addressed the current supply chain dynamics, technological innovations, and market trends that are shaping the adoption and development of ALD technology.

Conclusion

The presentation at SEMICON Europa provided a lucid and detailed perspective on the ALD technology in the context of the wafer fab equipment market. With a focus on ≤200 mm wafer size, it painted a comprehensive picture of the current market scenarios, future trends, and the pivotal role of ALD technology in shaping the future of semiconductor manufacturing. As the industry continues to evolve, the insights from this presentation will undoubtedly influence strategic decisions and technological advancements in the semiconductor sector.

Source: ALD TECHDAY 2023 powered by Beneq (yolegroup.com)

Presentation shared with the attendees

AIXTRON's G10-GaN System Empowers BelGaN's Expansion into the Growing GaN Semiconductor Market

The article discusses AIXTRON's support for BelGaN in expanding its Gallium Nitride (GaN) business through the new G10-GaN system. AIXTRON SE, a semiconductor company, is enabling BelGaN, a leading GaN automotive-qualified semiconductor foundry in Europe, to enter the growing GaN market and boost GaN technology innovation. BelGaN plans to use AIXTRON's G10-GaN, which offers top performance, a compact design, and low cost per wafer, starting with an 8x150mm configuration, to be delivered to BelGaN's production site in Oudenaarde, Belgium, by the end of 2023. This system will later evolve to support 5x200mm.

AIXTRON's G10-GaN System Empowers BelGaN's Expansion into the Growing GaN Semiconductor Market

BelGaN aims to expand its power chip range with voltage ratings from 40V to 1200V, utilizing GaN-on-Si, GaN on SOI, and new GaN-on-engineered substrates, focusing on high performance, automotive quality, reliability, high yield, and low costs. The G10-GaN will enable innovations in device architectures and improvements in performance, yield, and quality, reducing the cost of GaN products. This advancement is expected to drive growth in e-mobility, datacom, energy conversion, and contribute to a carbon-neutral society.

The G10-GaN epitaxy system is a highly efficient, productive, and cost-effective solution for GaN power and RF applications, combining single wafer performance with the economy of batch processing.

Dr. Marnix Tack of BelGaN praised the productivity, uniformity, and low cost of ownership of the G10-GaN, while Dr. Felix Grawert of AIXTRON expressed pride in BelGaN's choice of their technology. The G10-GaN, building on the G5+ C platform, offers double the productivity per cleanroom area, better material uniformities, and over 25% lower cost of ownership compared to other market equipment, making it a competitive choice for AIXTRON's customers. This MOCVD system is fully automated and designed for silicon fabs, marking a significant technological step in the semiconductor industry.

G10 GaN Performance (www.aixtron.com)

The G10-GaN by AIXTRON is a state-of-the-art deposition system for 150/200 mm GaN epitaxy, designed for GaN power and RF applications. It features a compact cluster design with three process chambers, reducing the footprint by 50% while maximizing wafer yield per square meter. This system significantly improves device yield with a threefold increase in on-wafer uniformity and maintains low particle levels, enhancing overall quality and consistency.

Cost-effectiveness is a key attribute, with the G10-GaN offering more than 25% lower epitaxial cost per wafer compared to other platforms. It incorporates Planetary Reactor® technology for high wafer yield and uniformity. The system's productivity is marked by over 90% equipment uptime and highest throughput per fab area, supported by features like fully automated wafer handling and advanced temperature control.

The G10-GaN ensures easy maintenance and operation with features like automated chamber cleaning and predictive functionalities. It's compatible with existing AIX G5+ C tools, facilitating seamless process transfers. Overall, the G10-GaN epitaxy system combines efficiency, cost-effectiveness, and advanced technology, making it an optimal choice for semiconductor manufacturing in the GaN sector.

Market opportunity for GaN for MOCVD and ALD

ALD and MOCVD is rapidly gaining traction in the semiconductor industry, particularly for logic, memory, and wide-bandgap power semiconductors. This growth is highlighted by industry experts at SEMICON Europa 2023. ALD is primarily adopted for its excellent surface passivation qualities, essential in GaN power electronic devices. While miniaturization drives ALD use in some sectors, its primary role in power electronics is to provide high-quality, conformal coatings, crucial for device performance and reliability. Thermal ALD processes like Al2O3 and AlON are key for GaN transistors, offering improved interface layers for low dynamic switching losses. ALD's impact is most notable in consumer, automotive, and industrial markets, where it enhances device performance and longevity. Looking forward, continued optimization of ALD processes and in-situ surface treatments are expected to further enhance device performance and reliability, especially in GaN power electronic devices, with high growth predicted in various end markets.

Forge Nano Unveils Plans for U.S.-Based Lithium-Ion Battery Gigafactory in North Carolina, Set to Launch in 2026

Forge Nano, Inc. has announced its venture into lithium-ion battery manufacturing with the creation of Forge Battery. The company plans to establish a Gigafactory in Raleigh, North Carolina, targeting defense, aerospace, and specialty electric vehicle markets. With an initial investment of over $165M, the facility, operational by 2026, will produce batteries utilizing Forge Nano’s Atomic Armor surface technology, enhancing energy density, safety, and lifespan. 

This technology is expected to surpass existing lithium-ion cells in performance. The North Carolina facility, benefiting from state incentives and a Job Development Investment Grant, promises significant economic benefits, including hundreds of high-paying jobs and substantial tax revenue to support local communities. The groundbreaking event is scheduled for the first half of 2024.

• Forge Nano has raised $81.54M over 10 rounds.
• Forge Nano's latest funding round was a Series C for on May 30, 2023.

Source:

Forge Nano to Launch U.S Battery Manufacturing Business; North Carolina Gigafactory Planned for 2026 - Forge Nano

Forge Nano Stock Price, Funding, Valuation, Revenue & Financial Statements (cbinsights.com)

Molybdenum: The New Frontier in Semiconductor Metallization according to Lam Research

The semiconductor industry is facing a significant shift as Molybdenum (Mo or Moly as the Americans say) is tipped to replace tungsten in chip manufacturing due to its superior atomic-scale properties. Kaihan Ashtiani, Corporate Vice President and General Manager at Lam Research, highlights the critical attributes of moly that make it the ideal choice for advanced devices. The company is at the forefront, aiding chipmakers in the transition with its ALTUS® product family, drawing from its pioneering work in Tungsten ALD and expertise in 3D NAND technology.

The semiconductor sector is on the cusp of a pivotal transition with molybdenum poised to supersede tungsten for interconnect metallization in response to the stringent scaling demands of modern chipmaking. Molybdenum's edge lies in its low resistivity and ease of integration into existing semiconductor processes, including atomic layer deposition (ALD) and chemical-mechanical planarization (CMP). These properties, combined with its minimal diffusivity into dielectric materials—thus negating the need for a barrier liner—make moly the preferred candidate for next-generation devices. Kaihan Ashtiani of Lam Research articulates the advantages of moly over other metals like cobalt and copper and underscores Lam's commitment to facilitating this industry shift. Leveraging decades of expertise and innovation in tungsten ALD and the transition from 2D to 3D NAND, Lam's ALTUS® product line is instrumental in enabling widespread adoption of molybdenum. This shift is not just theoretical; major chipmakers are actively exploring moly integration, marking a significant evolution in semiconductor fabrication.

The ALTUS® system by Lam Research is a suite of metal deposition tools used in semiconductor manufacturing, particularly for the deposition of tungsten and potentially other metals like molybdenum. These systems are designed to deposit metals by CVD or later named PNL (Pulsed Nanolayer deposition) and today marked as Atomic Layer Deposition (ALD- yeah!), which allows for extremely fine control of film thickness and composition at the atomic level, crucial for creating the tiny, densely packed structures found on modern integrated circuits.

For tungsten, the ALTUS® system has been a workhorse in the industry for the deposition of tungsten films, especially in the fabrication of the contact and via layers of integrated circuits. The ALD process ensures excellent step coverage, conformality, and uniformity even in very high aspect ratio structures. This is particularly important for Logic, DRAM, and 3D NAND applications, where the precise control of the tungsten film's electrical and physical properties is critical for device performance.

ALTUS applications

Logic devices, metallization needs to meet the requirements of increasingly smaller geometries and higher performance. The precision of ALD with tungsten and potentially molybdenum is essential for creating the necessary electrical connections without compromising the device's integrity.

  

Dynamic Random-Access Memory (DRAM) requires highly reliable and conductive connections as it is constantly refreshed to maintain data. The metallization process for DRAM needs to ensure that the metal films provide low resistivity and high reliability for the memory to function correctly.

  

In 3D NAND flash memory, multiple layers of memory cells are stacked vertically. This requires extremely uniform metal layers across all the stacked levels. The ability of the ALTUS® system to deposit tungsten and potentially molybdenum with high uniformity and excellent conformal coverage is vital for the success of 3D NAND devices.

Sources:

ALTUS Product Family - Lam Research

Nanexa AB Concludes Rights Issue on Nasdaq First North Growth

Nanexa AB's rights issue, aimed at raising SEK 121m, concluded with a 34.7% subscription rate using rights and without. The company will utilize guarantee commitments for the remaining 27.1%. The rights issue, announced on September 21 with backing for 62% of the total, resulted in 33.5% of shares subscribed with rights and 1.2% without. The capital raised before transaction costs will be SEK 75m. Trading in BTAs will occur until registration is completed around week 45, 2023, with the new shares expected to trade on Nasdaq First North Growth by week 46, 2023.

Nanexa, founded in 2007, has evolved from working with Atomic Layer Deposition (ALD) technology for various applications to focusing on the pharmaceutical sector with its proprietary PharmaShell® system. PharmaShell® positions Nanexa in the burgeoning drug delivery market with a system that allows high-precision, long-acting injectable drug products. The company is developing its own products and also partners with multiple pharmaceutical firms, including AstraZeneca, leveraging the unique capabilities of its ALD-based technology to enhance drug delivery.

The controlled release is steered by modulating the coating thickness, the composition of the coating and process parameters. We are currently primarily using nontoxic aluminum oxide and zinc oxides in the ALD coating

Sources:

Nanexa AB - What is Pharmashell®

Nanexa AB - Nanexa announces outcome of rights issue

ALD Adaptation Promises Advances in Solid-State Battery Development

Researchers at the Argonne National Laboratory have ingeniously applied a ALD, to improve solid-state battery technology. They adapted ALD, commonly used for applying thin films in chip manufacturing, to enhance argyrodite electrolytes—a sulfur-based compound known for high ionic conductivity, which is crucial for fast-charging batteries. The ALD process involves a chemical reaction on the material's surface to create a thin protective layer, addressing the reactivity challenges of argyrodites. Unlike typical post-pellet coating, this approach uniformly applies alumina coatings to electrolyte powders before pellet formation, preserving the material's structure. This results in less air-sensitive powders, facilitating easier production and leading to batteries with better performance, as demonstrated in cell tests. The method unexpectedly also doubles the ionic conductivity and mitigates issues like dendrite formation, significantly extending the battery's life and safety, marking a promising development for solid-state battery production.

Sources:

Adapting Semiconductor Techniques For Enhanced Battery Development (electronicsforu.com)

Zachary D. Hood et al, Multifunctional Coatings on Sulfide‐Based Solid Electrolyte Powders with Enhanced Processability, Stability, and Performance for Solid‐State Batteries, Advanced Materials (2023). DOI: 10.1002/adma.202300673

TSMC To Report Breakthrough in NMOS Nanosheets Using Ultra-Thin MoS2 Channels at IEDM 2023

A TSMC-led research team, in collaboration with National Yang Ming Chiao Tung University and National Applied Research Laboratories, has unveiled promising results for using ultra-thin transition metal dichalcogenides (TMDs), specifically MoS2, as the channel material in NMOS nanosheets. Their innovative approach deviates from the conventional method of thinning Si channels. The team's devices exhibited impressive performance metrics: a positive threshold voltage (VTH) of ~1.0 V, a high on-current of ~370 µA/µm at VDS = 1 V, a large on/off ratio of 1E8, and a low contact resistance ranging between 0.37-0.58 kΩ-µm. These outcomes were primarily attributed to the introduction of a novel C-shaped wrap-around contact, which enhances contact area, and an optimized gate stack. While the devices demonstrated satisfactory mechanical stability, a challenge remains in addressing defect creation within the MoS2 channels. This groundbreaking study, titled "Monolayer-MoS2 Stacked Nanosheet Channel with C-type Metal Contact" by Y-Y Chung et al., is a pivotal step forward in nanosheet scaling using TMDs.

ALD is a the technique for the precise and uniform synthesis of MoS₂, especially for semiconductor applications on large-scale wafers. The choice of precursors plays a crucial role in achieving optimal deposition characteristics. Mo (CO) 6 and H2S have been identified as the primary precursors for depositing molybdenum and sulfur components, respectively. These precursors have demonstrated the capacity for self-limiting growth behavior within a specific ALD temperature window, leading to uniform MoS₂ layers. Notably, this process has been successfully scaled up to achieve highly uniform film growth on large 300 mm SiO2/Si wafers, marking its potential for industry-level manufacturing. The ability to maintain uniformity and thickness control on such wafers emphasizes the potential of ALD in integrating MoS₂ into next-generation electronic devices and further underscores the significance of selecting appropriate precursors for optimal deposition outcomes. Other precursors have been investigated. MoCl₅ and MoF₆ serve as alternative molybdenum sources. For the sulfur component, H₂S is commonly paired with molybdenum precursors, but (CH₃)₂S has also been explored. The choice of these precursors directly impacts the properties of the resulting MoS₂ film in the ALD process and therefore precursor development for 2D MoS2 is a hot field of ongoing research.

While deposition methods are abundant, etching processes are comparatively scarce. Recent research by Elton Graugnard et al also introduces a thermal Atomic Layer Etching (ALE) technique for MoS2, leveraging MoF6 for fluorination, alternated with H2O exposures, to etch both crystalline and amorphous MoS2 films. This process has been characterized using various analytical techniques like QCM, FTIR, and QMS. The etching is temperature-dependent, with a significant increase in mass change per cycle as temperature rises. The mechanism involves two-stage oxidation of Mo, producing volatile byproducts. The resultant etch rates were established for different films, and post-etch annealing rendered crystalline MoS2 films. The thermal MoS2 ALE introduces a promising low-temperature method for embedding MoS2 films in large-scale device manufacturing.

Chem. Mater. 2023, 35, 3, 927-936

Sources:

 https://www.ieee-iedm.org/press-kit

https://pubs.acs.org/doi/10.1021/acs.chemmater.2c02549

Intel Unveils Breakthrough 3D CFET Design at IEDM: Setting the Stage for Next-Gen Compact and Efficient Electronics

Intel researchers developed a 3D monolithic CFET device* with 3 n-FET nanoribbons atop 3 p-FET nanoribbons, separated by 30 nm gap. This industry-first device enabled the creation of functional inverters at a 60 nm gate pitch. Notably, it incorporated vertically stacked dual-Source/Drain epitaxy, dual metal work function gate stacks, and backside power delivery with direct device contacts. They also introduced a nanoribbon "depopulation" method for varying n-MOS/p-MOS device numbers. This research advances the understanding of CFET scalability for logic and SRAM applications and highlights key process enablers. The paper will be presented at the upcoming IEDM conference in San Francisco.

Comment: The stacked CMOS inverter at a 60 nm gate pitch represents an advancement in semiconductor design, allowing for denser circuits. The 60 nm distance between gates indicates a highly miniaturized design. Power vias provide vertical power connections to different layers, while direct backside device contacts enhance efficiency and heat dissipation. This development offers a glimpse into the  future electronic devices being more compact, efficient, and high-performing than deploying "planar" designs in one layer like the FinFETs and GAA-FETs of today.

ALD plays a key role in manufacturing 3D monolithic CFET devices by assisting in crafting the architecture and providing atomically precise and even thin film layers at small scales. ALD ensures even coverage, which is important for 3D designs, especially on vertical areas and inside deep gaps. It's used to put down important materials in transistor gate stacks (High-k/Metal Gates or HKMG), as well as barrier and seed layers. ALD also helps in doping (SSD - solid state doping), which changes how semiconductors behave, and in creating spacers, important for separating and defining parts of transistors. In brief, ALD helps improve the CFET design and its overall performance.

Figures from IEDM press kit

Paper: 29.2_A CFET-Based CMOS Inverter_Intel.docx (egnyte.com)

* A 3D monolithic CFET device combines three-dimensional stacking and the Complementary Field-Effect Transistor (CFET) design within a single semiconductor structure. This approach vertically integrates both n-type and p-type transistors on the same substrate, promoting tighter integration and reduced interconnect delays. By leveraging the complementary operation of CFET and the benefits of 3D stacking, the device aims to enhance performance, miniaturization, and efficiency in semiconductor technology.

Jumpstart Your Semiconductor Career: ALD Process Engineer III Position in Santa Clara with Competitive Compensation and Benefits!

ALD Process engineer is the best possible start into a future career in the ever-evolving Semiconductor Industry. This Process Engineer III – (E3) position in Santa Clara, CA focuses on designing, analyzing, and troubleshooting complex problems within the semiconductor realm. Candidates should possess a Bachelor's Degree with 4-7 years of experience. The role includes a salary range of $116,000.00 to $159,500.00, potential bonus opportunities, and a comprehensive benefits package, with 10% travel time.

Apply here - Process Engineer III – (E3)

Careers (myworkdayjobs.com)

Stay informed in the ALD LinkedIn Group and chat with the hiring manager!

https://www.linkedin.com/feed/update/urn:li:activity:7119847768239607808?utm_source=share&utm_medium=member_desktop 

ALD TechDay at SEMICON Europa 2023 Hosted by Beneq

Join us for an exclusive expert forum discussing the adoption and applications of Atomic Layer Deposition (ALD) in the semiconductor industry. Powered by Beneq, this event is scheduled for Tuesday, November 14, from 3:00 pm to 5:30 pm at the Internationales Congress Center München (ICM).

Key Insights:

- Learn about the scaling of logic and memory semiconductor devices enabled by ALD.

- Discover ALD's rapid adoption in specialty device fabrication, particularly in wide-bandgap power semiconductors.

- Yole Group's projection reveals a 12% yearly growth in ALD equipment sales, reaching a record $680.5M by 2026.

- Get insights from industry experts, including speakers from Yole Intelligence, Beneq, and imec.

- Engage in discussions with a live panel of innovators and attend keynotes detailing innovative ALD applications, tool solutions, and case examples.

This event is tailored for integrated device manufacturers, foundries, and research and technology organizations. If you're invested in specialty semiconductor devices—from advanced packaging and CMOS image sensors to optoelectronics and power devices—this is an unmissable opportunity.

Attendance is complimentary but by invitation only. If interested, please register through our interest form.

Wrap up the day with the ALD TechDay networking gala dinner, a perfect platform for idea exchange and collaborative exploration.

*About Beneq:* A pioneering leader in atomic layer deposition, Beneq has been at the forefront since 1984. With a vast product range and unique development services, Beneq remains committed to simplifying ALD processes for researchers and shortening the time to market with its state-of-the-art ALD production.

Kokusai Electric's Successful IPO Raises $724.4 Million, Japan's Largest in 5 Years

Japanese chip equipment manufacturer Kokusai Electric has successfully raised $724.4 million through its initial public offering (IPO) by pricing its shares at the top end of a reduced marketing range. The IPO, Japan's largest in five years, saw Kokusai Electric value its shares at 1,840 yen per share, giving the company an overall valuation of 423.9 billion yen ($2.84 billion). The decision to lower the price range was influenced by the underwhelming performance of chip designer Arm's shares following its recent listing. Kokusai Electric's shares are set to debut on the Tokyo exchange's Prime Market on October 25. The company's major customers include Samsung Electronics, TSMC, and Micron Technology, accounting for over 40% of its revenue.

TSURUGI-C²® is a KOKUSAI ELECTRIC’s new thermal processing platform which is most recently developed for advanced devices especially for the ones with high aspect ratio 3D structures requiring high quality, uniform and conformal film deposition with new innovative reactor design and process techniques.

Kokusai Electric specializes in deposition and treatment process equipment for semiconductor manufacturing. Their deposition equipment is designed for creating nanoscale thin films on semiconductor wafers and supports technologies like LP-CVD, oxidation, annealing (low and high temperature), diffusion, and ALD. Notable products include TSURUGI-C², designed for advanced devices with complex 3D structures, AdvancedAce®-300 for batch thermal processing of 300mm wafers, and VERTRON® Revolution for 200-mm batch thermal processing.

Kokusai Electric's treatment equipment improves film properties through processes like nitridation, oxidation, curing, and annealing. MARORA® is ideal for gate dielectric film formation, utilizing plasma with low electron temperature. TANDUO® offers modular single-wafer treatment for various processes, and AdvancedAce®-300 supports LP-CVD, oxidation, annealing, and diffusion.

These equipment offerings are essential for semiconductor manufacturing, enabling the production of high-quality, high-performance components used in diverse electronic devices.

Sources:

Kokusai Electric raises $724.4 mln after setting IPO price at the top end of range | Reuters

Products＆Services | KOKUSAI ELECTRIC CORPORATION (kokusai-electric.com)

US Researchers Achieve Record 25.1% Efficiency with Large Perovskite-Silicon Tandem Solar Cell

US scientists have achieved a breakthrough in photovoltaic (PV) cell technology by creating a large-area perovskite-silicon tandem solar cell measuring 24 cm2. This tandem cell has achieved a remarkable steady-state power conversion efficiency of 25.1%. To overcome common issues associated with scaling up perovskite solar technologies, such as shunting losses that create alternate pathways for solar-generated charge and lead to power losses, the researchers inserted a lithium fluoride (LiF) interlayer between a hole transport layer (HTL) and a wide bandgap (WBG) perovskite absorber. This interlayer improves physical contact and reduces shunting. The tandem cell demonstrated an efficiency of 25.2% under standard conditions, making it one of the most efficient two-terminal tandem devices for areas exceeding 10 cm2. This development holds promise for efficient, reproducible, and large-scale perovskite-silicon tandem solar cells.

Current-voltage curves for a perovskite mini-module with an aperture area of 42.9 cm2 Image: University of North Carolina at Chapel Hil, Cell Reports Physical Science, Creative Commons License CC BY 4.0

ALD is an important technology in perovskite solar cell fabrication. It enables precise, nanoscale control of layer thickness, ensuring uniform coverage even on complex surfaces. ALD is used for depositing passivation layers to reduce defects and enhance stability, creating protective barriers against environmental factors, engineering interfaces for improved charge transport, and ensuring compatibility with various materials. These applications contribute to improving the efficiency and long-term stability of perovskite solar cells, making ALD an essential tool in their development and optimization.

For deployment in solar cells, "perovskite" denotes a particular class of materials employed as the light-absorbing layer. These perovskite solar cells utilize a group of materials characterized by a crystalline structure akin to that of the mineral perovskite, named after Russian mineralogist Lev Perovski. Typically, these materials are comprised of organic-inorganic hybrid compounds, with common examples including methylammonium lead iodide (CH3NH3PbI3) and formamidinium lead iodide (HC(NH2)2PbI3). Perovskite solar cells have garnered substantial interest due to their potential for high efficiency, cost-effectiveness in production, and simplified manufacturing processes. Researchers are diligently working to enhance the efficiency, stability, and scalability of perovskite solar cells to position them as a competitive and sustainable renewable energy solution.

Source: Large-area perovskite-silicon tandem PV cell hits record efficiency of 25.1% – pv magazine International (pv-magazine.com)