Showing posts with label DRAM. Show all posts
Showing posts with label DRAM. Show all posts

Wednesday, October 28, 2020

TechInsights Webinar: ALD/ALE Process in Commercially Available Memory Devices

2018 saw memory product manufacturers Samsung, Hynix, Toshiba and Micron introducing 64- or 72- stacked layer 3D-NAND devices, and move into 1x generation DRAM devices.

This presentation will examine some of the different structures we have seen through the evolution of these technologies, in particular the latest 3D-NAND and DRAM parts. We will also look at several historical applications of ALD/ALE technology that have been observed through reverse engineering. We will highlight the importance of ALD/ALE process in advanced logic devices. In many cases, the technology could not have advanced without the implementation of ALD technology.

Information and registration: LINK



Tuesday, May 19, 2020

Hafnium, Zirconium: Australian Strategic Materials a step closer to completing commercial pilot plan

Recent semiconductor materials related trade issues between Japan and South Korea have led South Korea to secure alternative sourcing of photoresists and metals for their semiconductor industry. This includes essential minerals for hafnium and zirconium ALD precursors that are used in the manufacturing of DRAM and Foundry logic at SK Hynix and Samsung fabs.

Besides the tension with Japan, China's dominance in the supply of zirconium chemicals and materials has highlighted the additional risk in the critical materials supply change for its important semiconductor and high tech industries.

One such action has been setting up a pilot plant in South Korea for hafnium and zirconium metal in joint development with Australias Alkane and its subsidiary Australian Strategic Materials (ASM). The joint undertaking has now moved to the next phase for a commercial operation of a pilot plant as reported by Alkaine below.

Australian Strategic Materials a step closer to completing commercial pilot plan

Australian Strategic Materials (ASM), a wholly owned subsidiary of Alkane Resources is getting closer to completing the construction of a commercial pilot plant facility in South Korea that will enable critical metal oxides, including zirconium and hafnium, to be converted into metals in clean, carbon-free way.

As the Covid-19 pandemic continues to highlight weaknesses in critical minerals supply chains globally, ASM has confirmed in Alkane Resources' quarterly recently it has received interest in both potential future supply and partnership from a number of parties in South Korea and elsewhere. ...

Read more.



Read more about previous blog about the Alkane Dubbo project in New South Wales, Austrailia:

The Dubbo Project - The High-k mine in Dubbo, NSW Australia

Hafnium product breakthrough consolidates Dubbo Project business case

China’s water crisis stems the flow of zirconium and rare earths for global industries

Alkane Resources reports that zirconium oxychloride (ZOC) prices are up 40% since January 2017


Monday, April 20, 2020

Choppy Waters for Shipping $50B of Semiconductor Materials in 2020

Risky Sailing on the Global Supply-Chain Seas

San Diego, CA, Apr 17, 2020:TECHCET announces that:
 
• 2020 global material revenues in semiconductor manufacturing forecasted to decline by 3.0% year-over-year (YoY) despite growth in 1Q2020,
• Impact of COVID-19 pandemic on the global economy is creating choppy waters for shipping and supplying critical materials, as highlighted in recent Critical Materials Council (CMC) monthly meetings, and
• With a return of global economic growth by 2021, compound annual growth rate (CAGR) through 2025 is forecast at 3.5% as shown in the Figure (below).
 
 

“From our market research, materials suppliers are increasing production and sales to ensure safety-stock throughout the supply-chain in case there are further disruptions due to COVID-19 cases,” remarked Lita Shon-Roy, TECHCET President and CEO. “Even without further disruptions, we can already see leading economic indicators such as unemployment levels, metal prices and container shipping indices point toward a significant decline in global GDP.” This is supported by the International Monetary Fund’s (IMF’s) current outlook on 2020.

Currently, almost all chip fabs appear to be running at normal levels, with a few exceptions. During this difficult period, YMTC in Wuhan, China reportedly has maintained R&D and grown production of 3D-NAND chips. However, chip fabs in Malaysia report that the government required companies to request permission to continue operating at 50% staffing levels. One company in France had to temporarily reduce production due to their labor union insisting on temporary workforce reductions.

Significant value-added engineered materials including specialty gases, deposition precursors, wet chemicals, chemical-mechanical planarization (CMP) slurries & pads, silicon wafers, PVD/sputtering targets, and photoresists & ancillary materials for lithography are reporting healthy orders and in some cases will see better than expected revenues for 1Q2020 and April 2020. However, more than 60% of all materials are expected to be negatively impacted before year-end.

Overall demand for commodity materials, such as silane and phosphoric acid, is expected to decline YoY in 2020 by an average of 3% due to softening of the global economy. Average selling prices (ASP) for electronic-grade commodities may drop due to cost reductions in feed-stocks; for example, the global helium (He) gas market which had been forecasted to be in shortage with high ASPs throughout 2020 has already improved due to COVID-19 slowing down helium demand.

DRAM, 3D-NAND, and MPU chips for server / cloud-computing applications are now in high demand for virtual meetings and remote work. It is yet unclear how much of an increase in materials shipments will be needed to support this segment, however from TECHCET’s modeling of prior cycles it will likely be >7%. Despite such an increase in the materials used to make leading-edge ICs to build out data centers, shipments in support of legacy node IC fabrication are expected to decline this year.

Consequently, cloud-computing growth may not compensate for overall reduced semiconductor materials demands caused by economic downturns this year. By 2021 the global economy and all chip fabs should return to healthier growth, with materials markets for all IC devices expected to increase at a CAGR of +3.5% through 2025.

Critical Materials Reports™ and Market Briefings: TECHCET Shop
CMC Events: Click here to view all Events

Saturday, November 2, 2019

Micron claim DRAM Technology Leadership As Samsung And SK Hynix Push Out EUV

  • ASML reported that four EUV lithography systems will be pushed out from shipping in 4Q 2019.
  • My analysis suggests Samsung Electronics and SK Hynix are two of the companies pushing our EUV for their memory business.
  • Micron's 1z nm DRAM already is technologically advanced, and are two quarters ahead of Samsung and one year ahead of SK Hynix.

Full article: Micron: DRAM Technology Leadership As Samsung And SK Hynix Push Out EUV, Seeking Alpha (LINK)


A DRAM roadmap by the Information Network showing Micron’s transition to 1z nm and gain of leadership over rivals Samsung and SK Hynix.

Thursday, August 22, 2019

Micron has started volume production of 10 nm-class DRAM (1z nm)

Micron announced on Thursday that it had started volume production of memory chips using its 3rd Generation 10 nm-class fabrication technology (also known as 1Z nm). The first DRAMs to be made using Micron’s 1Z nm process are 16 Gb monolithic DDR4 and LPDDR4X devices. 
The company claims that its 16 Gb DDR4 device consumes 40% less power than two 8 Gb DDR4 DRAMs (presumably at the same clocks). Meanwhile, Micron’s 16 Gb LPDDR4X ICs will bring an up to 10% power saving. One of the first products to use the company’s 16 Gb DDR4 devices will be high-capacity (e.g., 32 GB and higher) memory modules for desktops, notebooks, and workstations.
Source: Anandtech LINK
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By Abhishekkumar Thakur

Tuesday, July 2, 2019

Applied Materials to buy Japan's Kokusai to boost memory chip business and ALD

Here are more details and analyst responses on the Applied Materials Kokusai purchase and my own thoughts at the end:

(Reuters, LINK) - U.S. chip gear maker Applied Materials Inc (AMAT.O) on Monday agreed to buy Japanese peer Kokusai Electric for $2.2 billion from KKR & Co Inc (KKR.N), as it bets on rising demand for memory chips used in data centers, 5G phones, and AI-powered devices.  

In summary:
  • Kokusai is a small acquisition for Applied materials as compared to the previously failed mega-merger with Tokyo Electron, meaning that the road to approval should be easy. However, China’s willingness from a political standpoint is always a risk, Evercore analysts said. 
  • Apart from China, the acquisition will need approvals from Israel, Ireland, Japan, Korea and Taiwan, Applied Materials Chief Financial Officer Dan Durn said on a call with analysts.
  • Kokusai, which counts Samsung, SK Hynix, Toshiba and Micron among its top customers, reported revenue of $1.24 billion as of March 2018. 
  • Kokusai’s batch wafer processing tools are less technology intensive than Applied Materials’ single wafer tools, the recent focus on ultra-thin films has driven renewed interest in this group, DA Davidson analysts said.
So this whole purchase is really about Applied Materials getting a state of the art ALD technology for the memory business (DRAM and 3DNAND). The last readout is a bit crazy, the analyst refers to ALD as an "Ultra Thin Films". Anybody who has followed the ALD business the previous 15-20 years know that Applied Materials has repeatedly failed to take a big market share in ALD and that a Japanese Large Batch ALD reactor is one of the most advanced and reliable ALD tools out there - simply because nobody would like to trash a full load of +100 product wafers. The top three domination has been by:
  • ASM International
  • Tokyo Electron
  • Kokusai
The top 3 has been followed by Lam Research, Jusung Engineering, Wonik IPS and Applied Materials was always somewhere in this bunch. Even the inrodcution of the new Spatial ALD Olympia platform didn´t change things. It seems that Tokyo Electron took a large part of the spatial ALD market with their NT333 tool and ASM was able to defend their single wafer approach by making the XP platform super productive by adding more chamber slots (up to 16 for the latest ASM XP8 QCM).  

When it comes to IP in Spatial ALD, Tokyo Electron is No.1 followed by Applied Materials (see below).

IP Applications for spatial ALD

Magically, Kokusai settled the IP issues with ASM just before the Applied announcement (LINK). Historically, Kokusai has been masters in avoiding to call ALD ALD because of the IP situation. However, now there is a different situation and Kokusai also have single wafer ALD out there, and Applied is dominating the BEOL films deposition business so we can assume that Applied will enter top three and have a go at No 1. Exciting!

Wednesday, June 19, 2019

TechInsights’ Logic, NAND, DRAM and Emerging Memory Process Roadmaps are here

TechInsights’ Logic Process Roadmap offers an assessment and the anticipatory timing of new innovations from key players within the Logic space including: TSMC, Global Foundries, Intel & others. Download the roadmap here

TechInsights’ technology roadmaps show you the innovations we are monitoring

For over 30 years, TechInsights has been reverse engineering semiconductors and advanced technology products, developing the world’s largest library of technical analysis. We have built this library through two approaches: by conducting analysis in response to client requests, and by proactively analyzing disruptive or innovative technologies as they are released.

We constantly monitor the consumer electronics market to determine which manufacturers are planning to release new solutions, and when. We maintain and regularly update technology roadmaps in several different areas: Logic, NAND Flash Memory, DRAM, Emerging Memory, and Internet of Things Connectivity Systems on Chips, and more.

Updates to the roadmaps shown below are released throughout the year; check this page for updates. 

Wednesday, May 8, 2019

4th CMC Conference Enabled Critical Information and Connections

Fab materials event in Albany, New York area April 25-26 featured GlobalFoundries keynote and Intel and TI presentations. Plan now for the 2020 April 23-24 event in Hillsboro, Oregon. 

(SAN DIEGO (PRWEB) May 07, 2019) Over 150 leading executives and managers within the semiconductor manufacturing ecosystem gathered on April 25th and 26th in the Albany area of New York state for an important event on fabrication (fab) materials. The fourth-annual Critical Materials Council (CMC) Conference, produced by TECHCET, included topical presentations, a fab tour, exhibits by specialty materials suppliers, and networking roundtable discussions to learn about best-practices in a pre-competitive environment. Folks who missed attending the event this year can register to access the posted presentations for a nominal fee at https://cmcfabs.org/cmc-conference-2019/.

The event opened again, as in each of the prior three years, on an extremely strong business and technology keynote address by an executive from one of the CMC Fab member companies. The 2019 CMC Conference keynote was given by Dr. John Pellerin, Deputy CTO and VP of Worldwide R&D, GlobalFoundries. Pellerin talked about how demand for new high-volume manufacturing (HVM) semiconductor devices over the next few years will drive needs for increased numbers of new specialty materials as well as volumes of existing materials in his presentation on "Materials Challenges & Opportunities in Differentiated Technologies."

In the first session of the event covering global supply-chain issues of economics and regulations, G. Dan Hutcheson, CEO of VLSI Research, presented on "Slowdown: When did it start? What drove it? And When will the recovery come?" Hutcheson showed data from leading economic indicators that the recent decline in global semiconductor fab industry revenues due to memory chip prices may have already turned around.

TECHCET Sr. Analysts Dr. Jonas Sundqvist and Terry Francis presented updated information on demand drivers and forecasts for ALD/CVD precursors and Rare Earths, respectively. Sundqvist--also leader of the Thin Film Technologies Group at Fraunhofer IKTS--focused on how new 3D memory and logic chips demand more deposition precursors such that chemical volume growth will outpace that of silicon wafers, shown in the Figure. Francis showed how "Rare Earth" elements are not so rare at the elemental level, but complex dynamics between mining and refining and capitalism have led to a situation where mainland China currently controls most of the market for elements such as lanthanum (used in advanced ICs to create CMOS logic gates). Deep dives into all such materials matters are found in the TECHCET Critical Materials Reports (CMR), and you can find all of them online at https://techcet.com/shop/

Global semiconductor silicon quarterly wafer shipments 2015-2019 in millions of square inches (MSI). (Source: TECHCET)
The 2020 spring CMC Conference is scheduled for April 24-25 in Hillsboro, Oregon. The CMC Fab members and Associate members will again gather for two days of private face-to-face meetings before attending the public CMC Conference.

In addition to the annual spring CMC Conference in the US, there is also an annual fall CMC Seminar in Asia. The 2019 CMC Seminar will be held on October 17 in Taoyuan, Taiwan. For more information on CMC events see https://techcet.com/cmc-events/.

About CMC:
The Critical Materials Council (CMC) of Semiconductor Fabricators (CMCFabs.org) is a membership-based organization that works to anticipate and solve critical materials issues in a pre-competitive environment. The CMC is a business unit of TECHCET, and includes materials supplier Associate Members.

About TECHCET:
TECHCET CA LLC is an advisory services firm focused on process materials supply-chains, electronic materials business, and materials market analysis for the semiconductor, display, solar/PV, and LED industries. Since 2000, the company has been responsible for producing the SEMATECH Critical Material Reports™, covering silicon wafers, semiconductor gases, wet chemicals, CMP consumables, Photoresists, and ALD/CVD Precursors. For additional information about reports, market briefings, CMC membership, or custom consulting please contact info(at)cmcfabs(dot)org, +1-480-332-8336, or go to http://www.techcet.com or http://www.cmcfabs.org.

Friday, November 9, 2018

Imec to present scaled Superduper High-k Ruthenium/Strontium titanate capacitor at IEDM

Here is another interesting IEDM 2018 paper from Imec. It is a classical paper obn DRAM capacitor scaling featuring the almost impossible Superduper High-k Ruthenium/Strontium titanate capacitor! It is an ALD integration, the patterning the capacitor everything - no need to involve anyone else - it is up to the Litho and ALD people to get the job done.

Paper #2.7, "High-Performance (EOT<0.4nm, Jg~10-7 A/cm2) ALD-Deposited Ru/SrTiO3 Stack for Next-Generation DRAM Pillar Capacitor," M. Popovici et al, Imec)

I have not seen the abstract but it has been reviewed by CDRInfo (see paragraph below) and I am sure there will be more details available soon (LINK):

"Scaling DRAM Technology To 16nm And Beyond: DRAM memory technology is used in virtually all electronic systems because of its speed and density. DRAM memory comprises arrays of capacitor-transistor pairs which store data as electrical charge in the capacitor; the presence of charge indicates "1" and its absence "0." Manipulation of these digits is the basis of computer programming. It’s difficult to scale DRAM to the 16nm generation and beyond because of space limitations which make it hard to pack enough capacitance within the pitch. Imec researchers used an atomic layer deposition (ALD) process to pattern and build a novel 11nm pillar-shaped capacitor using new dielectric materials (SrTiO3, or STO). By tailoring the material properties of the capacitor and the SrRuO3 (SRO) epitaxial template on which it was grown, the researchers achieved a very high dielectric constant (k~118) and low electrical leakage (10-7 A/cm2 at ±1V). This means that pillar-shaped capacitors can be used instead of existing cup-shaped capacitors, without paying too great a penalty in terms of reduced data-storage capability. These results make the STO capacitors suitable for continued scaling for 16nm and smaller DRAMs."
 
 
Construction work at Imec, Leuven, June 2013. The tower looks a bit like a DRAM Capacitor but somehow I do not think that the architect know that and I bet they were working on Ru/STO ALD well before that!

Monday, September 26, 2016

RASIRC® BRUTE® peroxide and hydrazine technology for leading edge memory and high performance logic

Hydrogen peroxide (H2O2) gas is an oxidant that improves passivation and nucleation density at semiconductor interfaces, potentially leading to reduced interfacial defect density. A new technology capable of generating and delivering stable anhydrous H2O2 gas has been developed by RASIRC. The method utilizes a substantially anhydrous H2O2 solution, a carrier gas and membrane pervaporator in order to deliver anhydrous H2O2. A broad range of high-k materials and interfaces that can be improved as well as enhanced transistor performance were shown at ALD2016 Ireland. 
H2O2 allows for unique process windows in ALD due to its oxidative potential, which lies between more commonly used water and ozone, and greater acidity relative to water [1]

RASIRC BRUTE H2O2 Apparatus (H2O2 + solvent) surrounds the Nafion membrane tubes. H2O2 passes through the membrane walls and is picked up by the carrier gas.

Growth of many different films has been showcased with BRUTE Peroxide and the related RASIRC product BRUTE Hydrazine. In presentations and posters at ALD2016 Ireland the RASIRC line of BRUTE Hydrazine and BRUTE Peroxide showed impressively many useful results by many different precursors. In total, four separate posters and presentations covered growth passivation of SiOx on SiGe, SiNx on SiGe, SiON on SiGe as well as  growing HfO2, ZrO2, TiO2, Al2O3 and  TaOx with the BRUTE line of new reactive chemistries.

Transistor channel passivation, Dan Alvarez presented results of growing SiNx and SiOxNx  on SiGe using BRUTE Hydrazine and BRUTE Peroxide [2]. These films were then further processed with HfO2 dielectric layer to grow MOSCAPs. These MOSCAPS had better performance than those processed with HF last and water vapor, where improved defect density and lower leakage characteristics were reported. In addition, the presentation by Dan Alvarez discussed how anhydrous hydrazine can be used to create a thin layer of silicon nitride that can act as a diffusion barrier or channel passivation layer prior to dielectric deposition in FinFets or MOSFETs. The study focused on <400 °C silicon nitride ALD process and showed how further oxidation using anhydrous peroxide provides good nucleation for High-k deposition.

A low Temperature Passivation on SiGe(110) via plasma free process by subsequent doses of anhydrous hydrazine and hexachlorodisilane can further increase the amount of SiNx on the surface. A final treatment with HOOH can prepare the surface for high-k deposition.

BRUTE Peroxide was reported to reduce HfO2 gate oxide EOT by reduction in the interface layer

Steve Consiglio from Tokyo Electron, presented data comparing growth of HfO2 and interface layer thickness control [3]. Utilizing 300 mm Si wafers with pre-formed chemical oxide, he evaluated an all in-situ method of chemical oxide removal (COR; Si-H termination) followed by H2O2(g) dosing prior to ALD growth of HfO2 using TEMAHf and H2O. The study reported faster growth rate with H2O2 than for O3. Most interestingly, the interface results were very exciting with interface layer regrowth in the 2-4 Ångstrom range, which corresponds to ½ to 1 monolayer of SiOx interface for improved EOT and this was definitely much thinner than the results reported using O3.
Aluminum oxide, Al2O3 ALD has been presented previously [4]. This time RASIRC had a poster on improved nucleation by using H2O2 as an oxidant in ALD of Al2O3 [5]. The poster explained the need for a novel oxidant that improves passivation and nucleation density at semiconductor interfaces. The study was performed on SiGe(110) surfaces and  provides a direct comparison of equal amounts of water, 30% H2O2/H2O, and anhydrous H2O2. A five-fold increase was found in nucleation density for H2O2 versus water, and a three-fold increase for H2O2 versus 30% H2O2/H2O. An additional comparison was made of H2O2 to H2O by deposition of Al2O3 on an Si-H surface. This comparison found denser nucleation and faster initiation for H2O2 treated surfaces.




In a direct comparison of TMA based ALD with water vs peroxide the coverages of O and Al are higher with peroxide and growth starts earlier.

Zirconium oxide, ZrO2  was presented in study by Intermolecular and RASIRC at ALD2016 Poster session [6]. By utilizing the Intermolecular Combinatorial ALD platform equipped with a RASIRC BRUTE H2O2 apparatus the study compared the performance of H2O2 against O3 in a zirconium oxide ALD using ZyALD Air Liquide industry standard Zr-precursor. By MIMCAP integration the differences in ZrOx unit film properties and electrical performance was shown. Similar unit film behavior (GPC, linearity, growth saturation, film crystallinity etc.) was observed between O3 and H2O2.


Oxidant dosing (left) show that 4% O3 yields saturated response, whereas H2O2 and 20% O3 display softer saturation. ZyALD dose (middle) for each oxidant system shows definite completion for 20% O3. All three investigated conditions show linear growth without growth inhibition (right).       


The MIMCAP study (above) concluded that ZrO2 produced with H2O2 matched the best performance of 4% O3. Therefore it is possible to avoid issues observed with high (20%) O3 concentration as showcased in the figure below. More importantly, H2O2 has the capability to produce thin node dielectric, which is needed for highly scaled DRAM nodes.

Optical (left) and SEM (middle) images of MIMCAPs, post-annealing, with defects observed with 20% O3 and thin 5 nm ZrOx. As comparison blanket TiN film enhanced resistivity was observed (right) using 4 resp. 20% O3 concentrations, whereas H2O2 lays in-between. Results suggest that elevated TiN bottom electrode oxidation takes place with 20% O3 that leads to degassing during annealing.  However, the defect can be avoided with minimal reduction in growth rate, by using H2O2 as the oxidant.
Hafnium oxide, HfO2 by TDMAHf along TEMAHf was the first Hf-precursors in use at the introduction of High-k in the DRAM industry more than 10 years ago at the 90nm node. HfO2 ALD has also been investigated by Intermolecular using the H2O2/TDMAHf ALD process and in this study the MIMCAPs showed to match the best O3 performance like in the case of ZrO2 given in more detail above. In addition, Tokyo Electron presented work for HfO2 as summarized above.  
Titanium oxide, TiO2 low temperature (100 °C) TiOx ALD using H2O2 and TiMCTA (methylcyclopentadienyl tris(dimethylamino)titanium) as the metal precursor has successfully been grown as also reported by Intermolecular at ALD2016 Poster session [6].  
   
To summarize, RASIRC and their collaborations throughout the semiconductor insdustry and with leading research facilities have shown that many different films can be grown with BRUTE Peroxide and BRUTE Hydrazine and most importantly that BRUTE Peroxide can reduce EOT by reduction in the interface layer, yielding higher performing memory and logic devices.
References
[1] D. R. Lide, CRC Handbook of Chemistry and Physics (CRC Press, Boca Raton, 1996).
[2] Hydrogen peroxide gas for improved nucleation and initiation in ALD, Daniel Alvarez, Adam Hinckley, Pablo Macheno, Christopher Ramos, Jeffrey Spiegelman,
Anthony Muscat, Presentation at ALD 2016 Ireland.
[3] Anhydrous H2O2 for ALD HfO2 growth and interfacial layer thickness control, Steven Consiglio, Robert Clark, Takahiro Hakamata, Kandabara Tapily, Cory Wajda, Gert Leusink, Presentation at ALD2016 Ireland.
[4] Comparison of Water Vapor to Ozone for Growth ALD Films, J. Spiegelman, J. Sundqvist, EU PVSEC Proceedings 2011, page 1694 – 1698.
[5] Hydrogen peroxide gas for improved nucleation and initiation in ALD, Daniel Alvarez, Adam Hinckley, Pablo Macheno, Christopher Ramos, Jeffrey Spiegelman, Anthony Muscat, Poster ALD2016 Ireland.
[6] Comparison of hydrogen peroxide and ozone for use in zirconium oxide atomic layer deposition, Gregory  Nowling,  Stephen Weeks, Daniel Alvarez, Mark Leo, Jeff Spiegelman, Karl Littau, Poster ALD2016 Ireland.