Thursday, May 19, 2016

Critical Materials Conference 2016 It's Not too Late - Registration for Presentation!



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Critical Materials Conference 2016
For attendees still in need of access, please email us
Don't forget to Plan for CMC Conference 2017
May 4, 2017, Dallas, TX (tentative) 
     This year's conference was a success, bringing together attendees from both business and technical backgrounds. "Development is no longer completely separate from the business aspect of production - both R&D and manufacturing segments must understand the different technological and market dynamics of critical materials to plan for profitable semiconductor IC fabrication,"  commented TECHCET's President, Lita Shon-Roy.
     Throughout the conference, the common theme was the importance of manufacturing-oriented material design. Tim Hendry's presentation elaborated on this, touching on every front end material segment category. Norm Armour connected all these concepts, highlighting the importance of minimizing carbon footprints through recycling and improved manufacturing efficiency.
 
Here's What the Attendees Had to Say:
 
"Upon our return we concluded that CMC should be on the recurring conference list."
 
"Very good meeting. Great focus on key issues."
 
"Excellent content - practical issues and challenges discussed."

"The event was a wonderful event to attend and I learned a lot."

"Very good conference - good speaker lineup, good content, stimulating topics."

Click here to purchase access to this year's conference presentations or for more information, please contact cmcinfo@techcet.com or call 1-480-382-8336
    
Sponsors and Committee
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Dave Hemker Lam - Predicting the end of Moore’s Law is like predicting a bear market

Here is a very nice and informative and forward looking interview of Dave Hemker CTO of Lam Research by Ed Sperling who is the editor in chief of Semiconductor Engineering. The interview covers key issues on for semiconductor process and manufacturing and the recent developments that will govern the semiconductor industry in the future like 3DNAND, Cross-Point Memory Technology and "Atomic-Level Engineering", which is yet another readout of ALE besides the beer classifications. Please do read the full interview at Semiconductor Engineering and below you will find some answers and statements that I found interesting from an atomic level point of view :

One-On-One: Dave Hemker, Semiconductor Engineering,
May 19th, 2016 - By: Ed Sperling

"Predicting the end of Moore’s Law is like predicting a bear market. Eventually you’re going to be right."


The terms "bull market" and "bear market" describe upward and downward market trends, respectively. Here these the statues of the two symbolic beasts of finance, the bear and the bull, in front of the Frankfurt Stock Exchange. [Wikipedia]

David Hemker is senior vice president and chief technology officer at Lam Research, where he is responsible for long-range research and technology development.[www.lamresearch.com]

Atomic-Level Engineering


Hemker: "All of the feature sizes now are on the order of nanometers. The variation is on the order of Angstroms because you have a 10 Angstrom window. Our critical feature control has to be under 0.5nm. That’s 5 Angstroms. A bond length is 2.5 Angstroms. We’re doing atomic-level engineering. That’s one of the new tools we’ll need. You need to peel off one layer in such a way that you have a perfect etch front, the same way you will need perfect conformality."
Sperling: "Isn’t that the tradeoff, namely how we get enough throughput and still manage to have that kind of control?"
 Hemker: "Yes. The good thing is that from an etch and dep perspective, as things are getting smaller they’re also getting thinner. There are lots of circumstances now where you can look at how much ALD is used in multi-patterning. Because you’re putting less material down, you don’t have to add half a micron. You can do 10nm in a very reasonable time frame, so ALD and ALE become very economical."

Tuesday, May 17, 2016

Imec Expands its Silicon Platform for Quantum Computing Applications

Leuven (Belgium) – May 17, 2016 – At the Quantum Europe conference, taking place in Amsterdam, Belgian’s nanoelectronincs research center imec announced today that it is ramping-up its R&D activities focused on quantum computing. Imec will implement qubits and supporting nanoelectronic functionality for quantum computing, leveraging its advanced silicon (Si) platform that was established within the framework of its industrial affiliation program with additional support from the EU through e.g. ECSEL projects SENATE and TAKE-5. 


Widely seen as a possible solution to complex computing problems which are intractable on classical computers, quantum computing uses quantum physics to create and manipulate quantum states within electronic devices (qubits) to enhance the performance over that of existing, ‘classical’ approaches. Of the many device proposals for qubit implementation, the ones compatible with existing Si technology will provide the most viable solution for interfacing with the outside world.

The Imec Fab with all necessary 300mm equipment to allow advanced sub-10nm CMOS R&D (www.imec.be)
 
The goal of imec’s initiative is to establish a bridge between the most advanced transistor technology and emerging quantum technology options, representing a natural extension of imec’s Si platform. This will ensure routes to demonstrate the quantum computing functionality compatible with industries’ platform technologies. Assuming a key position in the quantum technologies ecosystem, imec will support the transition of new quantum technologies, from the physics lab to technology feed into the supply chain. Imec’s platform will help translate laboratory demonstrators into commercial products. It will be open for universities, SMEs and industrial partners of imec’s quantum technologies programs.

“The coming decades will be characterized by a wave of quantum technology based applications, ranging from communication, simulation and sensing, to computation. However, to enable this, the industry will need technical support to adopt and to integrate these new technologies into products and services”, stated Jo De Boeck, CTO at imec. “ Imec’s industry relevant Si platform for the advanced technology nodes, is currently used to screen technology options for the 5nm nodes and beyond. The same platform is hence the ideal basis to start implementing quantum devices as quantum effects are becoming the starting point of developing a quantum platform.”

VLSI Research - Top 10 Critical Subsystems Suppliers for 2015

A bit late but interesting ranking for those of you interested in semiconductor processing equipment. As released in April by VLSI Research. It is also interesting to see that European companies are strong in this market.

VLSIresearch released its 2015 Top 10 Suppliers of Critical Subsystems to the Semiconductor and Related Manufacturing Industries today.  Sales of critical subsystems were relatively flat with a value of $8.1B in 2015, while six of the Top 10 suppliers achieved sales growth. The Top 10 suppliers now account for 48% of all critical subsystems sales.


There were no changes in the top five rankings list this year due to stable market conditions and the absence of major mergers and acquisitions. Carl Zeiss SMT retained the top spot with sales just above $1B. Edwards, in second place, narrowed the gap slightly with sales of $630M. MKS Instruments once again benefited from the diversity of its product range to hold third position with sales of $540M and Brooks Automation managed to keep fourth place. Advanced Energy had a great year and asserted its dominance of the RF power subsystems market by growing 17% to consolidate fifth place. The big gainer in 2015 was VAT Group, jumping up from eighth to sixth place as it continues to dominate the vacuum valve field. Horiba and Pfeiffer Vacuum ranked seventh and eighth place respectively, with Ichor Systems just managing to stay ahead of Ebara Corporation in tenth place.

VLSIresearch includes vacuum valves as a critical subsystem and as a result VAT Group is included as a Top 10 supplier in this year’s rankings list.

More information about Critical Subsystems is available here: https://www.vlsiresearch.com/public/csubs/

Ultratech Cambridge Nanotech Forms Research Collaboration With Northeastern University

Ultratech-CNT and Professor Thomas Webster at Northeastern University to Research the Use of ALD-Produced Nano-Materials in Medical Applications

SAN JOSE, Calif., May 17, 2016 /PRNewswire/ -- Ultratech, Inc. (Nasdaq: UTEK), a leading supplier of lithography, laser­ processing and inspection systems used to manufacture semiconductor devices and high­brightness LEDs (HB­ LEDs), as well as atomic layer deposition (ALD) systems, announced the formation of a research collaboration with Professor Thomas J. Webster, Ph.D. at Northeastern University, to study the use of nano-materials produced via ALD for medical applications. The initial research has focused on inhibiting bacterial growth and inflammation and promoting cell and tissue growth. 
 
 
Dr. Thomas Webster, Chair and Professor of Chemical Engineering at Northeastern, said, "We are very excited to embark on this collaboration with Ultratech-CNT. While we are in the early stages of this study, the initial results of our work suggest that the materials and processes we are developing could have long-range impact in this field."


 
Ultratech-CNT Senior Research Scientist Ritwik Bhatia, Ph.D., who has been working closely with Professor Webster, explained, "This type of work is a marked departure from the traditional applications and uses for ALD and dramatically opens up a new field where material science and life sciences intersect. I am extremely pleased to be part of this research program and excited by the potential benefits for healthy surgical outcomes that this research represents."

Arthur W. Zafiropoulo, Ultratech's Chairman and Chief Executive Officer, said, "At Ultratech, we have long maintained and understood that material science would play a key role in moving many emerging technological fields forward. We also feel that it can serve a much larger role, namely in improving the quality of life. In linking the expertise of Prof. Webster and his research group with Ultratech-CNT's ALD group, we believe we are taking steps to solidly and efficiently pursue our scientific and commercial goals."

Sunday, May 15, 2016

UPDATE: Imec showcase low cost Self-aligned quadruple patterning (SAQP) for sub 10nm nodes

Imec has developed a low cost Self-aligned quadruple patterning (SAQP) that meet the basic requirements for 7 and 5 nm CMOS FinFET patterning. The technology is based on 193 immersion (193i) lithography and repeated plasma ALD and etching steps as alternative to expensive high resolution EUV lihography. You can read all details SPIE Newsroom (abstract below).

UPDATE: According to information received spacers are Plasma Enhanced ALD SiO2 and the a-Si mandrel and SiN all from ASM. The etching has been performed using Lam Research chambers.

Self-aligned quadruple patterning to meet requirements for fins with high density

Efraín Altamirano-Sánchez, Zheng Tao, Anil Gunay-Demirkol, Gian Lorusso, Toby Hopf, Jean-Luc Everaert, William Clark, Vassilios Constantoudis, Daniel Sobieski, Fung Suong Ou and David Hellin

14 May 2016, SPIE Newsroom. DOI: 10.1117/2.1201604.006378 
Transmission electron microscopy (TEM) images of the stages of SAQP show, from left to right: patterning of the first core onto a mandrel; deposition of SiO2 by ALD; etching of the first spacers; etching of the mandrel to produce the second core; further deposition of SiO2by ALD; and etching of the second spacers and silicon nitride pad (14 May 2016, SPIE Newsroom. DOI: 10.1117/2.1201604.006378 ).

Repeated plasma deposition and etching steps enable the patterning of fins with the potential to meet requirements of N7 and N5 technologies for profile, depth, uniformity, and pitch walk. Over recent decades, continuous reductions in the scale of field-effect transistors in accordance with Moore's law, which states that the number of transistors in an integrated circuit doubles every two years, have enabled continuous increases in device performance and transistor density. Currently, state-of-the-art devices are based on structural elements with dimensions of 7nm or even 5nm (N7/N5). The highest-resolution patterns required for N7/N5 devices are silicon fins with a pitch of 18–28nm and metal layers with a pitch of 24–32nm. These dimensions far exceed the resolution attainable with 193 immersion (193i) lithography. Extreme UV lithography might be an alternative process for the formation of lines and spaces, but is expensive and not entirely ready for use in production.

Friday, May 13, 2016

HERALD White paper on atomic-level processing

Right now there is a brief window of opportunity to feed in to consultations on the future topics for H2020 funding - in particular, the 2018-2020 workplan for NMPB. Some academic and industrial members of HERALD have therefore put together the enclosed position document on urgent research directions, under the overall heading of 'atomic-level processing'.
The document is public. If you feel it is worthwhile, please circulate it to your colleagues, national/regional funding agencies and in particular to your national contact points and delegates on European committees and technology platforms.

It is hoped that this document will evolve into a "Roadmap for Atomic Layer Processing" over the coming months and years. So please feel free to suggest corrections and improvements. Remember that this is a high-level document aimed at non-experts, not a scientific treatise.
As the next step, we are organising an industry panel discussion on this topic on the morning of Wednesday 27th July at the upcoming ALD2016 conference in Ireland. 

Thursday, May 12, 2016

UPDATE: Sponsoring of Joint Euro CVD & Baltic ALD 2017 is now open!

This is an update on the CVD-ALD bonanza that will take place in Linköping, Sweden 2017. We will organize a joint EuroCVD-BalticALD meeting over four packed days 11-14 June 2017.

The conference is now open for sponsoring & booking of Trade Show Exhibition space. Please let us know if you have any special wishes for this event and welcome to Sweden in summer of 2017!

Organizing Committee:

Henrik Pedersen, Linköping University, Chair
Jonas Sundqvist, Lund University / Fraunhofer IKTS
Sean Barry, Carleton University
Mats Boman, Uppsala University

Conference T-shirt now available Online for 18.99 €: https://shop.spreadshirt.se/1129023/

Sponsors & Exhibition & Support:








Tuesday, May 10, 2016

Welcome to St. Petersburg at the BALD 2016!

Welcome to St. Petersburg at the BALD 2016!


 Dear Colleagues,
The first time the Baltic Conference on Atomic Layer Deposition (BALD) will be arranged in St. Petersburg (Russia) where Prof. V.B. Aleskovskii with his colleagues and assistants created the foundations of ALD in the 1950x. The aim of the Conference is to demonstrate recent developments in the areas of technology and applications of Atomic Layer Deposition (ALD) and to show contribution of the Russian research centres to ALD applications.
The Conference Program will consist of plenary, oral and poster thematic sessions and small exhibition.
 The BALD 2016 will provide a versatile platform for formal and informal discussions with colleagues from both academia and industry, and foster new collaborations and partnerships.


 

The Conference will cover the following topics:
 
  • Metals, nitrides, carbides; 
  • Microelectronic applications; 
  • Reaction mechanisms; 
  • Process development;
  • Energy applications;
  • Micro- and nanosystems, physics and technology;
  • Characterization;
  • Hybrid materials.

The BALD 2016 will be held at the Solo Sokos Hotel Palace Bridge in St. Petersburg (Russia) from October 2nd to 4th, 2016.

On behalf of the International Advisory Board and Local Organizing Committee, I cordially invite you to participate in the 14th International Baltic Conference on Atomic Layer Deposition.
Prof. Vladimir Kutuzov
Chairman of the BALD 2016
St. Petersburg Electrotechnical University "LETI"

Saturday, May 7, 2016

Missouri S&T Team boosts lithium-ion battery performance with ALD

Researchers Missouri University of Science and Technology are working to solve the problem of short-life of lithium-ion batteries like those used in laptops and cellphones, making them reliable and longer-lasting using a atomic layer deposition. This study was carried out using a fluidized bed reactor.

Science Daily reports the following:

"Dr. Xinhua Liang, assistant professor of chemical and biochemical engineering at Missouri S&T, leads the study to dope and coat lithium magnesium nickel oxygen (LMNO) with iron oxide through ALD -- at the same time. Doping means adding an element or compound into the crystalline structure, or lattice, filling in the gaps in the LMNO. Coating is what it sounds like, putting ultra-thin layers of iron oxide around the whole compound. Rajankumar Patel, a Missouri S&T Ph.D. candidate in chemical engineering who will graduate next week, did the majority of the experimental work in the project


TEM images of (a) clean edge of an uncoated LiMn1.5Ni0.5O4 particle, and (b) ~3 nm of conformal iron oxide film coated on one LiMn1.5Ni0.5O4 particle after 160 cycles of iron oxide ALD, (c) cross sectional TEM image of one LiMn1.5Ni0.5O4 particle with 160 cycles of iron oxide ALD, (d) Fe element mapping of cross-sectioned surface by EDS, and (e) Fe EDS line scanning along the red line as shown in (c). TEM image indicates that conformal iron oxide films were coated on primary LiMn1.5Ni0.5O4 particle surface. EDS mapping and EDS element line scanning indicates that Fe was doped in the lattice structure of LiMn1.5Ni0.5O4. (From Open Source - Scientific Reports 6, Article number: 25293 (2016), doi:10.1038/srep25293)


The operating voltage window of LMNO makes it a potential candidate for use in hybrid electric vehicles (HEV). However, it has not gained commercial usability in HEV because of high-capacity fade during cycling at elevated temperatures and manganese(3+) dissolution by hydrogen fluorine.

"Unlike current research practice that either covers the particles' surface with insulating film or dopes the particles to improve the performance of the battery," Liang says, "this ALD process combines the coating and doping processes into one, and applying this technique makes rechargeable lithium-ion batteries last longer."

"This is the first report for a unique phenomenon of ionic iron entering the lattice structure of LMNO during the ALD coating process," Patel says.

Full story: https://www.sciencedaily.com/releases/2016/05/160505105220.htm and Open Source article below published in Scientific Reports.

Employing Synergetic Effect of Doping and Thin Film Coating to Boost the Performance of Lithium-Ion Battery Cathode Particles

Rajankumar L. Patel, Ying-Bing Jiang, Amitava Choudhury & Xinhua Liang

Scientific Reports 6, Article number: 25293 (2016), doi:10.1038/srep25293

Atomic layer deposition (ALD) has evolved as an important technique to coat conformal protective thin films on cathode and anode particles of lithium ion batteries to enhance their electrochemical performance. Coating a conformal, conductive and optimal ultrathin film on cathode particles has significantly increased the capacity retention and cycle life as demonstrated in our previous work. In this work, we have unearthed the synergetic effect of electrochemically active iron oxide films coating and partial doping of iron on LiMn1.5Ni0.5O4 (LMNO) particles. The ionic Fe penetrates into the lattice structure of LMNO during the ALD process. After the structural defects were saturated, the iron started participating in formation of ultrathin oxide films on LMNO particle surface. Owing to the conductive nature of iron oxide films, with an optimal film thickness of ~0.6 nm, the initial capacity improved by ~25% at room temperature and by ~26% at an elevated temperature of 55 °C at a 1C cycling rate. The synergy of doping of LMNO with iron combined with the conductive and protective nature of the optimal iron oxide film led to a high capacity retention (~93% at room temperature and ~91% at 55 °C) even after 1,000 cycles at a 1C cycling rate.

CORIAL releases process control software for atomic layer processing using conventional dry process tools

Plasma etch and deposition equipment maker CORIAL (http://corial.net) of Bernin, France, a provider of plasma etching and deposition equipment has launched COSMA Pulse as new software enabling pulsed or time-multiplexed processing on conventional dry process tools. 



The firm has found a way to add new capabilities (pulsing of process parameters) to conventional dry etching and plasma-enhanced chemical vapor deposition (PECVD) systems to realize deep reactive ion etching (DRIE)-Bosch processing, atomic layer etching (ALE) and/or atomic layer deposition (ALD). 

Developed with the R&D market in mind, COSMA Pulse can control and pulse simultaneously and independently from all other process parameters, including gas flow rate, working pressure, RF power, LF power, or virtual process parameters. 

"We are proud to announce the first successful demonstration of COSMA Pulse on a 200mm ICP-RIE system", says R&D manager Jean-Pierre Roch. For this demo, CORIAL chose the DRIE-Bosch – a classical process that alternates repeatedly etching and passivation steps to achieve deep anisotropic etching of silicon structures. DRIE-Bosch is the cornerstone of MEMS, advanced packaging and power devices manufacturing flows. "COSMA Pulse, with adequate electronic controller, will deliver very fast process step switching from 10ms for a single process step up to 1 minute," says Roch.

The software ensures that the wide range of dry etching and deposition techniques - from continuous wave plasma to pulsed processing - can be realized in conventional ICP-RIE and PECVD tools. 

"COSMA Pulse expands CORIAL's available market, giving customers alternative options for their etching processes," says marketing manager Elsa Bernard-Moulin. "This demonstration is just a taste of the capabilities of COSMA Pulse. Soon, we will be letting you see true atomic layer processing on our conventional ICP-RIE tool."

Thursday, May 5, 2016

Photo show from The CMC Conference - a Great Success!

Here is an ongoing blog on reporting on the CMC Conference in Hillsboro 5-6th of May. For those of you who attended - Thank you for attending the Critical Materials Conference! It was an overwhelming success! Attendees comments thus far include: "fantastic event", "really appreciated", "great value", with "High quality speakers and attendees"! We want to hear more! 

"It was one of the best conferences that I have ever attended."

More information will be added during the coming week and if you have any nice pictures from the event please send them to me. Also stay tuned for the announcement from the CMC Panel that will be published soon by CMC Conference Co-Chair Ed Korczynski

For attendees still in need of access, please email us
Don't forget to Plan for CMC Conference 2017
May 4, 2017, Dallas, TX (tentative) 
The Critical Materials Conference is a 2 day event providing actionable information on materials and supply-chains for current and future semiconductor manufacturing. Business drives the world, but technology enables semiconductor business, so we must understand the dynamics of how materials and technologies enable the scaling of devices in IC fabs. Conference speakers will provide information on critical materials used in HVM fabs, while also looking at manufacturing integration issues associated with new materials needed for future devices. Notable speakers from leading semiconductor fabricators, and materials companies, and leading market research firms will provide insights on this ever changing area of semiconductor process materials and markets.



I met the first time for real with Angel Yanguas-Gil, a staff scientist at Argonne National Laboratory‘s Energy Systems Division and also an Institute Fellow at the Northwestern Argonne Institute of Science and Engineering (NAISE) at Northwestern University. Angel took a very active part in the sessions Q&A with insightful questions to the ALD Industry. Check out his web here for some more information and cool stuff.


The CMC Conference was held at the Embassy Suites by Hilton Portland Hillsboro, Oregon, USA 5-6th of May.


Posing with my ALD2016 Ireland polo shirt.



Hiromichi Enami form Hitachi High-Tech and CMC Co-Chair Ed Korczynski discussing critical challenges in the semoconductor materials supply chain at the round table discussions.



Rasirc sponsoring and presenting "Hydrazine as a Low Temperature Nitride Source: Materials Challenges for High Volume Manufacturing " at the event posing Dan Alvarez CTO and Jeff Spiegelman President and Founder.



 Two of the speakers, Dr. S.I. Lee (CTO Veeco) presenting "Low Temp Spatial ALD for Multiple Patterning Materials " and Dr. Jean Marc Girard (CTO Air Liquide) presenting "ALD Precursor Development Challenges for HVM" as well as being part of the conference committee. There will be an opportunity to meet both gentlemen ALD 2016 in Dublin. 




Part of Team ZyALD(TM): Ravi Laxman (Linde), Jonas Sundqvist, Ashotosh Misra (Air Liquide) and Jean Marc Girard (Air Liquide).


All set for giving my talk on ALD/CVD Precursor & Equipment Market Trends. Please contact me if you would like to have a copy of the presentation. (Picture by Angel)


The Round Table and Beer Tasting event organized by Alan Balderson (Kanto Chemical) and sponsored by Hitachi High-Tech was very successful and here is the collection of local beers that were part of the tasting.



Day 2 ended with The CMC Conference Panel moderated by Ed Korczyinski (Techcet/Solid State Technology) : John Smythe (Micron), Jonas Sundqvist (Techcet/Fraunhofer IKTS), Jeff Hemphill (Intel), Jean Marc Girard (Air Liquide)



Tuesday, May 3, 2016

The 2016 Symposia on VLSI Technology & Circuits presskit is out

The VLSI Symposia is an international conference on semiconductor technology and circuits that offers an opportunity to interact and synergize on topics spanning the range from process technology to systems-on-chip.  http://vlsisymposium.org/

The following press materials are available for pre-conference publicity for the 2016 Symposia on VLSI Technology & Circuits: http://vlsisymposium.org/press-kit/ 


Hilton Hawaiian Village Venue (Picture from www.vlsisymposium.org press kit)

Especially interesting is the Technical Highlights from the Symposium on VLSI Technology  document: http://vlsisymposium.org/wp-content/uploads/2013/06/VLSI-2016-Tipsheet-4.18.16-FINAL.pdf


Monday, May 2, 2016

ALD for Industry - a topical workshop with focus on industrialization and commercialization of ALD

ALD for Industry - a topical workshop with focus on industrialization and commercialization of ALD for current and emerging markets. The workshop is organized by EFDS, IHM TU Dresden and Fraunhofer IKTS in collaboration with ALD Lab Saxony and leading ALD companies.


Co-Chairs: Dr. Christoph Hossbach IHM-TU Dresden & Dr. Jonas Sundqvist Frauhofer IKTS
 
Date: 17 to 18th of January 2017
   
Day 1: Tutorial & Tour of IHM, Fraunhofer IKTS and NaMLab Dresden
TU Dresden, Werner-Hartmann-Bau
   
Day 2: Workshop & Industrial Exhibition
Swissôtel Dresden Am Schloss

Please find more information here and the Exposé here.

Friday, April 29, 2016

ALD on the road to Dublin - Visit at the Convention Centre Dublin



ALD and ALE 2016 Site Visit at the Convention Centre Dublin

ALD 2016 Conference Co-Chair Simon Elliott and ALE Chair Bert Ellingboe, along with Happening Conferences and Events, met on Thursday 28 April at the CCD in Dublin to finalise plans for the conference.  It is going to be an exciting 4 days in July and we can’t wait to welcome everyone to Dublin!


Bert Ellingboe Dublin City University , Simon Elliott, Tyndall National Institute & Anne Doherty, Happening Conferences and Events Launching the 16th International Conference on Atomic Layer Deposition incorporating the 3rd International Workshop on Atomic Layer Etching"
L - R Bert Ellingboe Dublin City University & Simon Elliott, Tyndall National Institute launching the 16th International Conference on Atomic Layer Deposition incorporating the 3rd International Workshop on Atomic Layer Etching

Thursday, April 28, 2016

UPDATE! Tutorials on Atomic-Layer-Processing – Sunday 24th July ALD2016 Dublin

Tutorial on Atomic-Layer-Processing – Sunday 24th July

Time  Speaker  Organisation  Title 
13:00 Fred Roozeboom TU Eindhoven, The Netherlands Processing for 3D-IC Technologies
13:30 Annelies Delabie IMEC, Belgium Atomic layer processing of 2D materials for beyond CMOS applications
14:00 Break
14:15 Sumit Agarwal Colorado School of Mines USA Plasma Physics and Diagnostics
14:45 Stephan Wege Plasway GmbH, Germany Plasma Processing Reactor Design
15:15 Keren Kanarik Lam Research, USA Overview of Atomic Layer Etching
15:45 Break
16:00 Sean Barry Carleton University, Canada ALD Precursor Design & Synthesis
16:30 Massimo Tallarida Alba, Spain Characterization of ALD processes and Materials using Synchrotron Light
17:00 Coaches to Guinness Storehouse for Welcome Reception