Showing posts with label Capacitors. Show all posts
Showing posts with label Capacitors. Show all posts

Thursday, January 2, 2020

Picosun’s ALD technology enables 3D silicon-integrated microcapacitors with unprecedented performance

ESPOO, Finland, 2nd January 2020 (LINK) – Picosun Group, global provider of leading AGILE ALD® (Atomic Layer Deposition) thin film coating solutions, reports record performance of silicon-integrated, three-dimensional deep trench microcapacitors manufactured using its ALD technology.

Increasing efficiency and performance demands of portable and wearable electronics, along with their shrinking size in accordance with the Moore’s law, set new challenges to the power management of these devices as well. A solution is further integration of the devices’ key components into so-called SiP (systems-in-package) or SoC (systems-on-chip) architectures, where everything, including the energy storage such as batteries or capacitors, is packed close to each other into one compact, microscale-miniaturized assembly. This calls for novel techniques to increase the performance and shrink the size of the energy storage unit as well. Three-dimensional, high aspect ratio and large surface area deep trench microcapacitors where ultra-thin, alternating layers of conducting and insulating materials form the energy storing structure, provide a potential solution.

Figures above: Main technological steps of 3D microcapacitor fabrication. 1: patterning of a square lattice of holes on the silicon surface; 2: high aspect ratio trenching of silicon by electrochemical micromachining (ECM); 3: atomic layer deposition (ALD) of conformal metal-insulator-metal (MIM) stack; 4: aluminium deposition and contact patterning (*).

Picosun’s ALD technology has now realized unprecedented performance of these 3D microcapacitors. PICOSUN® ALD equipment were used to deposit film stacks of conductive TiN and insulating dielectric Al2O3 and HfAlO3 layers into high aspect ratio (up to 100) trenches etched into silicon. Up to 1 µF/mm2 areal capacitance was obtained, which is the new record for this capacitor type. Also power and energy densities, 566 W/cm2 and 1.7 µWh/cm2, were excellent and surpassing the values achieved with the most of the other capacitor technologies. The ALD microcapacitors showed also outstanding voltage and temperature stability, up to 16 V and 100 oC, over 100 hours continuous operation (*).

Figures above: b) SEM cross-section of an array of cylindrical trenches with a pitch of 4 μm, diameter of 2 μm and aspect ratio of 100, conformally coated with an ALD stack consisting of 40 nm of TiN, 40 nm of Al2O3, and 40 nm of TiN. Insets show a detail of the MIM stack at the top and bottom of a single trench; d) high-resolution TEM image of an MIM stack consisting of 40 nm of TiN, 40 nm of Al2O3, and 40 nm of TiN taken at the bottom of ALD-coated trenches with aspect ratio of 100; e) TEM-EDX elemental maps of Ti (yellow), N 14 (cyan), Al (red), and O (green) of the MIM stack in (d) (*).

These excellent performance indicators pave the way to industrial applications of this capacitor technology. This is further facilitated by ALD’s mature position in modern semiconductor industries, where the technology is already integrated into practically all advanced microchip component manufacturing lines.

“We exploited the room available on the bottom of silicon wafers, of which only a few micrometers of silicon are used for electronic components in integrated circuits, to fabricate silicon-integrated 3D microcapacitors with unprecedented areal capacitance. The electrochemical micromachining technology, developed at the University of Pisa over the past decade, enabled etching of high density trenches with aspect ratios up to 100 in silicon, a value otherwise not achievable with deep reactive ion etching. This posed the basis for increasing the areal capacitance of our 3D microcapacitors upon conformal coating with an ALD metal-insulator-metal stack,” says Prof. Giuseppe Barillaro, group leader at the Information Engineering Department of the University of Pisa, Italy.

“The suberb results achieved with our 3D silicon-integrated microcapacitors show again how imperative ALD technology is to modern microelectronics. We are happy that we can offer our unmatched expertise and decades of cumulative know-how in the field to develop novel solutions for the challenges the industry is facing, when the requirements for system performance and integration level increase inversely to the system size. The environmental aspect is also obvious, when smaller, more compact devices manufactured in the same line mean also smaller consumption of materials and energy,” says Juhana Kostamo, deputy CEO of Picosun Group.
(*) “Three-dimensional silicon-integrated capacitor with unprecedented areal capacitance for on-chip energy storage”, Lucanos M. Strambinib,1, Alessandro Paghia,1, Stefano Mariania, Anjali Soodc, Jesse Kalliomäkic, Päivi Järvinenc, Fabrizio Toiad, Mario Scuratid, Marco Morellid, Alessio Lampertie, Giuseppe Barillaroa,b,, accepted for publication in Nano Energy,
a Dipartimento di Ingegneria dell’Informazione, Università di Pisa, via G. Caruso 16, 57122, Pisa, Italy
b Istituto di Elettronica e di Ingegneria dell’Informazione e delle Telecomunicazioni, Consiglio nazionale delle Ricerche, via G. Caruso 16, 57122, Pisa, Italy
c Picosun Oy, Tietotie 3, Espoo, FI-02150, Finland
d ST Microelectronics, via Olivetti 1, Agrate Brianza, Italy
e IMM-CNR, Unit of Agrate Brianza, Via C. Olivetti 2, 20864, Agrate Brianza, MB, Italy
(Funding from the ECSEL Joint Undertaking through the R2POWER300 project, grant no. 653933)

Wednesday, November 29, 2017

Transparent flexible capacitors by ALD high-k, ALD AZO and graphene electrodes

Transparent and flexible flat panel displays manufactured on plastic substrates and flexible substrates involve key technologies like ALD manufacturing of transparent electrodes and barriers. In addition, for the pixel-drive circuit of displays, capacitors are used for charging and discharging at very high speed. Having a high capacitance enables also a high color brightness for each pixel. Now researchers at Wuhan University, China has developed an capacitor technology that is has an excellent transparency and flexibility using the latest ALD and graphene processing technology. Please find the Open Access publication below.

In this study used comercially available graphene in the form of single-layer graphene that had been grown by CVD on copper foil from 2D Carbon Tech Inc. LTD, Changzhou, China. The ALD ZrO2 high-k and AZO was grown in an TSF 200 from Beneq.

Transparent and Flexible Capacitors with an Ultrathin Structure by Using Graphene as Bottom Electrodes
by Tao Guo, Guozhen Zhang, Xi Su, Heng Zhang, Jiaxian Wan, Xue Chen, Hao Wu and Chang Liu
Nanomaterials 2017, 7(12), 418; doi:10.3390/nano7120418  (registering DOI) - 28 November 2017
(Left) The schematic diagram of the ultrathin, transparent and flexible capacitors; (Right) The optical transmittance spectra of the capacitors on PEN substrates. The inset shows the optical photograph of the actual capacitor device with the characters “TFS 200” in the background, and the optical transmittance spectra of graphene and capacitors on quartz substrates. 
Ultrathin, transparent and flexible capacitors using graphene as the bottom electrodes were directly fabricated on polyethylene naphthalate (PEN) substrates. ZrO2 dielectric films were deposited on the treated surface of graphene by atomic layer deposition (ALD). The deposition process did not introduce any detectible defects in the graphene, as indicated by Raman measurements, guaranteeing the electrical performances of the graphene electrodes. The Aluminum-doped zinc oxide (AZO) films were prepared as the top electrodes using the ALD technique. The capacitors presented a high capacitance density (10.3 fF/μm2 at 10 kHz) and a relatively low leakage current (5.3 × 10−6 A/cm2 at 1 V). Bending tests revealed that the capacitors were able to work normally at an outward bending radius of 10 mm without any deterioration of electrical properties. The capacitors exhibited an average optical transmittance of close to 70% at visible wavelengths. Thus, it opens the door to practical applications in transparent integrated circuits. Full article

This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. (CC BY 4.0).

Monday, November 20, 2017

ALD assisted Nano-Architected capacitors reports: Researchers at Gwangju Institute of Science and Technology (GIST) Korea and California Institute of Technology USA have made low-k dielectric by a new technique. They deposit a photoresist on the top of a electrode (Au/Ti (80/12 nm) and then directly write a nanolattice scaffold into the photoresist layer using a technique called two-photon photolithography direct laser writing. 

They then coat coated the polymer nanolattice with a 10 nm-thick conformal layer of alumina (Al2O3) using atomic layer deposition (ALD) and etch away the photoresist by an oxygen plasma using a focused ion beam. Finally, we evaporated an identical Au/Ti (80/12 nm) bilayer as a top electrode on the top plate of the nanolattice to create a parallel plate capacitor.

Please find much more details in this article (LINK) and the publication below:

Enabling Simultaneous Extreme Ultra Low-k in Stiff, Resilient, and Thermally Stable Nano-Architected Materials 

Max L. Lifson, Min-Woo Kim, Julia R. Greer, and Bong-Joong Kim
Nano Lett., Article ASAP
DOI: 10.1021/acs.nanolett.7b03941 
Publication Date (Web): November 7, 2017

Abstract Image

Low dielectric constant (low-k) materials have gained increasing popularity because of their critical role in developing faster, smaller, and higher performance devices. Their practical use has been limited by the strong coupling among mechanical, thermal, and electrical properties of materials and their dielectric constant; a low-k is usually attained by materials that are very porous, which results in high compliance, that is, silica aerogels; high dielectric loss, that is, porous polycrystalline alumina; and poor thermal stability, that is, Sr-based metal–organic frameworks. We report the fabrication of 3D nanoarchitected hollow-beam alumina dielectrics which k is 1.06–1.10 at 1 MHz that is stable over the voltage range of −20 to 20 V and a frequency range of 100 kHz to 10 MHz. This dielectric material can be used in capacitors and is mechanically resilient, with a Young’s modulus of 30 MPa, a yield strength of 1.07 MPa, a nearly full shape recoverability to its original size after >50% compressions, and outstanding thermal stability with a thermal coefficient of dielectric constant (TCK) of 2.43 × 10–5 K–1 up to 800 °C. These results suggest that nanoarchitected materials may serve as viable candidates for ultra low-k materials that are simultaneously mechanically resilient and thermally and electrically stable for microelectronics and devices.

Friday, June 24, 2016

Harvard University initiates ALD patent infringement suits towards US chip makers

Harvard University initiates patent infringement suits to protect inventors’ rights in atomic layer deposition alkyl amide precursor used for High-k applications like DRAM and other high aspect ratio capacitor based technologies. 

Harvard has now filed patent-infringement suits against two major US chip makers, Micron and Globalfoundries. The University believes that these companies have violated patents that claim inventions created in Gordon’s lab of famous ALD Prof. Roy Gordon.
The article in The Harvard Gazette reports:
Over a few years, Gordon, his graduate students Jill Becker [Founder of Cambridge Nanotech] and Dennis Hausmann [Lam Research], and postdoctoral fellow Seigi Suh [DuPont] would play central roles in making that high-k dielectric insulator work. Their primary innovation, filed at the U.S. Patent Office in 2000 and described in scientific papers in 2001 and 2002, was to create a novel carrier molecule, one never before seen outside of Gordon’s lab, as well as to identify a class of precursor molecules ideally suited to use in a method called atomic layer deposition (ALD) to create thin films. This precursor molecule delivered the insulator where it had to go. Once there it released the metal atoms to form a uniform layer, while its other components — such as carbon, nitrogen, and hydrogen — were easily removed, leaving behind the pure insulator layer.

Isaac T. Kohlberg, Harvard’s senior associate provost, said it’s important that Harvard protect the intellectual property rights of faculty, postdoctoral researchers, students, and the University itself, particularly in an era when corporations increasingly look to academia for significant advances in science, engineering, and technology.

Here you can read the whole intriguing story from Gordon Lab in the Harvard Gazette : Defending breakthrough research. Here is also one of the well cited publications form 2002 on using TEMAHf and TEMAZr and water in deep trench DRAM stuctures (from Infineon) by Hausman et al :

There are many angles to this story and it will be interesting to follow this case.

Wednesday, June 8, 2016

Novel energy inside a microcircuit chip: VTT developed an efficient nanomaterial-based integrated energy storage

Here is a cool energy storage device from VTT in Finland using Finnish ALD technology from Beneq - a Beneq TFS-500 reactor.
As published by VTT: VTT Technical Research Centre of Finland developed an extremely efficient small-size energy storage, a micro-supercapacitor, which can be integrated directly inside a silicon microcircuit chip. The high energy and power density of the miniaturized energy storage relies on the new hybrid nanomaterial developed recently at VTT. This technology opens new possibilities for integrated mobile devices and paves the way for zero-power autonomous devices required for the future Internet of Things (IoT).

Supercapacitors resemble electrochemical batteries. However, in contrast to for example mobile phone lithium ion batteries, which utilize chemical reactions to store energy, supercapacitors store mainly electrostatic energy that is bound at the interface between liquid and solid electrodes. Similarly to batteries supercapacitors are typically discrete devices with large variety of use cases from small electronic gadgets to the large energy storages of electrical vehicles.
The energy and power density of a supercapacitor depends on the surface area and conductivity of the solid electrodes. VTT's research group has developed a hybrid nanomaterial electrode, which consists of porous silicon coated with a few nanometre thick titanium nitride layer by atomic layer deposition (ALD). This approach leads to a record large conductive surface in a small volume. Inclusion of ionic liquid in a micro channel formed in between two hybrid electrodes results in extremely small and efficient energy storage.

The new supercapacitor has excellent performance. For the first time, silicon based micro-supercapacitor competes with the leading carbon and graphene based devices in power, energy and durability.

From Graphical abstract - Conformal titanium nitride in a porous silicon matrix: A nanomaterial for in-chip supercapacitors, Nano Energy26(2016)340–345, doi:10.1016/j.nanoen.2016.04.029
Micro-supercapacitors can be integrated directly with active microelectronic devices to store electrical energy generated by different thermal, light and vibration energy harvesters and to supply the electrical energy when needed. This is important for autonomous sensor networks, wearable electronics and mobile electronics of the IoT.

VTT's research group takes the integration to the extreme by integrating the new nanomaterial micro-supercapacitor energy storage directly inside a silicon chip. The demonstrated in-chip supercapacitor technology enables storing energy of as much as 0.2 joule and impressive power generation of 2 watts on a one square centimetre silicon chip. At the same time it leaves the surface of the chip available for active integrated microcircuits and sensors.

VTT is currently seeking a party interested in commercializing the technique.

VTT's article on integrated energy storage will be published in Nano Energy magazine (Volume 26, August 2016, pages 340-345). The article can be read online:

Thursday, October 22, 2015

Successful industrialization of high-density 3D integrated silicon capacitors for ultra-miniaturized electronic components

Three high-tech SMEs finalize the joint EU-funded PICS project on innovative ALD materials and manufacturing equipment

Caen, Oct. 22, 2015 – Two years after the launch of the PICS project (funded by the FP7 funding instrument dedicated to research for the benefit of SMEs), three European SMEs, IPDiA, Picosun and SENTECH Instruments along with CEA-Leti and Fraunhofer IPMS-CNT announce the major technological results achieved during this program. 

Two new dielectric stacks were developed and integrated into the IPDiA 3D trench capacitors by IPDiA, CEA-Leti and Fraunhofer IPMS-CNT. The initial specifications were fulfilled and proven by electrical measurements. A new record on capacitance density (>500nF/mm² at 3.3V) and an extended operation voltage (10V with 150nF/mm²) were obtained, which expands IPDiA’s ability to meet current market requirements particularly in the field of medical or aeronautics. Qualification procedure was initiated during the project by launching preliminary reliability studies and it will continue in the coming months.
Read more... (369.11 kB)
Prototype of medical pills integrating temperature sensor and RF transceiver

3D trench capacitors integrated into Silicon 

Publication Overview

Title of Publication Author(s) Link
Picosun ALD enables a new generation of medical devices Picosun click here 
Innovative ALD materials and tools or high densIty 3D integrated capacitors Fraunhofer IPMS click here
Presentation: NIL industrial Days (19-20 March 2015, Berlin) Pinnow (SENTECH) click here
Presentation: EuroNanoForum (10-15 June 2015, Riga) C. Billard (CEA) click here
Presentation: "Development of innovative ALD materials for high density 3D integrated capacitors” ALD Symposium, SEMICON Europe 2014 (7-9 October 2015, Grenoble) M. Czernohorsky (Fraunhofer IPMS-CNT) click here
Presentation: "Ultra-thin high density capacitors for advanced packaging solutions" 20th European Microelectronics and Packaging Conference & Exhibition (September 13-16, 2015 in Friedrichshafen, Germany) K. Seidel (Fraunhofer IPMS-CNT) click here
Presentation: "HfO2-Al2O3 nanolaminate dielectric for ultra-high integrated MIM capacitors" RAFALD workshop (November 16-18, 2015 Grenoble, France). A. Lefevre click here 
PICS Poster   click here 

Sunday, August 2, 2015

Sol-gel Capacitor Dielectric Offers Record-high Energy Storage

Here are new wonderful results on a sol gel capacitor technology that could beat batteries in the future aiming at both high power and energy density. Thanks Heiko for helping me to find this one.  Georgia Tech reports : Using a hybrid silica sol-gel material and self-assembled monolayers of a common fatty acid, researchers have developed a new capacitor dielectric material that provides an electrical energy storage capacity rivaling certain batteries, with both a high energy density and high power density.

Samples of the new hybrid sol-gel material are shown placed on a clear plastic substrate for testing. (Credit: John Toon, Georgia Tech)

If the material can be scaled up from laboratory samples, devices made from it could surpass traditional electrolytic capacitors for applications in electromagnetic propulsion, electric vehicles and defibrillators. Capacitors often complement batteries in these applications because they can provide large amounts of current quickly.

“This is the first time I’ve seen a capacitor beat a battery on energy density,” said Perry. “The combination of high energy density and high power density is uncommon in the capacitor world.”

The new material is composed of a silica sol-gel thin film containing polar groups linked to the silicon atoms and a nanoscale self-assembled monolayer of an octylphosphonic acid, which provides insulating properties. The bilayer structure blocks the injection of electrons into the sol-gel material, providing low leakage current, high breakdown strength and high energy extraction efficiency.

Publication: Yunsang Kim, et al., “Bilayer Structure with Ultra-high Energy/Power Density Using Hybrid Sol-Gel Dielectric and Charge Blocking Monolayer, (Advanced Energy Materials, 2015).

Wednesday, July 8, 2015

MIT develops Supercapacitors from Niobium Nanowire Yarns for wearable electronics

As reported by MIT News : Wearable electronic devices for health and fitness monitoring are a rapidly growing area of consumer electronics; one of their biggest limitations is the capacity of their tiny batteries to deliver enough power to transmit data. Now, researchers at MIT and in Canada have found a promising new approach to delivering the short but intense bursts of power needed by such small devices.

The key is a new approach to making supercapacitors — devices that can store and release electrical power in such bursts, which are needed for brief transmissions of data from wearable devices such as heart-rate monitors, computers, or smartphones, the researchers say. They may also be useful for other applications where high power is needed in small volumes, such as autonomous microrobots.

The new approach uses yarns, made from nanowires of the element niobium, as the electrodes in tiny supercapacitors (which are essentially pairs of electrically conducting fibers with an insulator between). The concept is described in a paper in the journal ACS Applied Materials and Interfaces by MIT professor of mechanical engineering Ian W. Hunter, doctoral student Seyed M. Mirvakili, and three others at the University of British Columbia.

Here below is the abstract for the publication or you can continue reading the story from MIT News.

High-Performance Supercapacitors from Niobium Nanowire Yarns

Seyed M. Mirvakili, Mehr Negar Mirvakili, Peter Englezos, John D. W. Madden, and Ian W. Hunter

ACS Appl. Mater. Interfaces, 2015, 7 (25), pp 13882–13888
DOI: 10.1021/acsami.5b02327

The large-ion-accessible surface area of carbon nanotubes (CNTs) and graphene sheets formed as yarns, forests, and films enables miniature high-performance supercapacitors with power densities exceeding those of electrolytics while achieving energy densities equaling those of batteries.1−7 Capacitance and energy density can be enhanced by depositing highly pseudocapacitive materials such as conductive polymers on them.3,8−15 Yarns formed from carbon nanotubes are proposed for use in wearable supercapacitors.3,16 In this work, we show that high power, energy density, and capacitance in yarn form are not unique to carbon materials, and we introduce niobium nanowires as an alternative. These yarns show higher capacitance and energy per volume and are stronger and 100 times more conductive than similarly spun carbon multiwalled nanotube (MWNT) and graphene yarns.6,17−22 The long niobium nanowires, formed by repeated extrusion and drawing,17 achieve device volumetric peak power and energy densities of 55 MW·m–3 (55 W·cm–3) and 25 MJ·m–3 (7 mWh·cm–3), 2 and 5 times higher than that for state-of-the-art CNT yarns, respectively.3 The capacitance per volume of Nb nanowire yarn is lower than the 158 MF·m–3 (158 F·cm–3) reported for carbon-based materials such as reduced graphene oxide (RGO) and CNT wet-spun yarns,5 but the peak power and energy densities are 200 and 2 times higher, respectively.5 Achieving high power in long yarns is made possible by the high conductivity of the metal, and achievement of high energy density is possible thanks to the high internal surface area. No additional metal backing is needed, unlike for CNT yarns and supercapacitors in general, saving substantial space. As the yarn is infiltrated with pseudocapacitive materials such as poly(3,4-ethylenedioxythiophene) (PEDOT), the energy density is further increased to 10 MJ·m–3 (2.8 mWh·cm–3). Similar to CNT yarns, niobium nanowire yarns are highly flexible and show potential for weaving into textiles and use in wearable devices.

Thursday, April 9, 2015

Knowles has expanded its DLI ‘UX’ ultra-high K dielectric capacitor range

Knowles has expanded its DLI ‘UX’ ultra-high K dielectric capacitor range. The ‘UX’ material has the company’s highest dielectric constant allows for higher capacitance values in existing case sizes, or smaller sized components – all achieved without sacrificing performance. The material is space qualified to MIL-PRF-38534 Class K.

This new 50V rated dielectric complements the existing 25V rated material and is available to be specified across a broad range of standard Thin Film architectures – including Di-Caps, Border Caps, Bar Caps and Gap Caps.

With the temperature stability of an X7R material and a dielectric constant of 25,000, UX is seen as the ideal solution for ultra-broadband decoupling, broadband DC blocking, amplifier stabilization and energy storage applications.

Capacitance range 51pF to 10,000pF; Temperature coefficient of capacitance ±15% at -55C to +125C; Dissipation Factor < 2.5% at 1MHz; Insulation Resistance >103Mohm at +25C and Dielectric Withstanding Voltage of 250% of rated voltage. Finished products exhibit exceptional dimensional tolerance and are Ideal for epoxy and wire bond assembly, says the company.

Wednesday, April 8, 2015

First ALD based cermic capacitor

As repoted by Bargan Tech in Lesnoy Gorodok, Odintsovky District, Moscow Province who uses Atomic Layer Deposition (ALD)  to deposit nanoscale layers of the dielectric and conductor onto a porous carbon-based material - the primary electrode. This results in a very thin device with high specific capacity that is several orders of magnitude greater than existing multi-layer ceramic capacitors (MLCC).


The application of a highly porous material is a more progressive method of increasing capacity than 
(a) reducing the thickness of the dielectric; (b) numerous layering; (c) using dielectrics with high permittivity (ε), which are the methods used in the best ceramic capacitors today - the multi-layer ceramic capacitors.

The advantages of our single layer construction over multi-layer ceramic capacitors include:

  • Higher specific capacity at comparable operating voltage.
  • Absence of noise when operating at high frequency (high speed charging and discharging), caused by the difference in expansion dynamics of each layer (conductor and dielectric), which result from overheating.
  • Infinite scalability; flexibility to produce high capacity devices using Class 1 ceramic materials which is a high quality ceramic with a low temperature/capacity dependence.
  • Simple manufacturing process.
Datasheet (pdf) [339,38 Kb]

Proprietary electrode

The foundation of the technology, serving as the primary plate, is a carbon based material with macro and mesopores. A hybrid dielectric and the second plate are conformed to its surface - layer by layer - by Atomic Layer Deposition. The capacitor assembly is then completed using traditional methods. The material is a form of viscose cloth - heat treated in an oxygen-free environment.

As illustrated, its structure consists of uniformly shaped interwoven fibers. The surface of each fiber is vastly covered with pores ranging 30-300nm in diameter, which is sufficient for building the dielectric and conductor layers on their inner surfaces.

Monday, November 17, 2014

Ultra-compact capacitors by ALD for the electronics market

Fraunhofer IPMS-CNT and IZM-ASSID presented ultra-thin and integrated capacitors with a high capacity and specially tailored features for industrial applications at electronica, the international trade show for components, systems and applications in the electronic sector in Munich (November 11-14, 2014).
New High Density capacitors for SiP From Fraunhofer institutes IPMS & IZM ASSID Booth A4.113 (Twitter:
The division "Center Nanoelectronic Technologies" (CNT) is the Fraunhofer IPMS research and development platform for material and process optimization for the industrial semiconductor production. Together with Fraunhofer IZM-ASSID and ALD Lab Dresden, a competence center for atomic layer deposition, the CNT developed an ultra-compact capacitor for direct integrated circuit packaging. The capacitor’s design and features can be adapted to specific customer requirements and a large range of capacity values can be achieved with the use of high-k materials and special structuring processes.

Close up of the Ultra Thin High Density capacitors for SiP From Fraunhofer institutes IPMS & IZM ASSID Booth A4.113 (Twitter:
Customizable high density integrated capacitors.
Besides the direct integration (“system in package”), the capacitor is also suited for implementation in high-end printed circuit boards. In addition, the technology is also used in interposers or directly on the chip metallization level. The application fields of these capacitors vary and may include signal filtering in low- and high-frequency applications, for decoupling purposes and as energy storage.

Monday, September 15, 2014

Stanford engineering team has built a radio the size of an ant

A Stanford engineering team has built a radio the size of an ant, a device so energy efficient that it gathers all the power it needs from the same electromagnetic waves that carry signals to its receiving antenna.

Press release: A Stanford engineering team, in collaboration with researchers from the University of California, Berkeley, has built a radio the size of an ant, a device so energy efficient that it gathers all the power it needs from the same electromagnetic waves that carry signals to its receiving antenna – no batteries required.

Designed to compute, execute and relay commands, this tiny wireless chip costs pennies to fabricate – making it cheap enough to become the missing link between the Internet as we know it and the linked-together smart gadgets envisioned in the "Internet of Things."

"The next exponential growth in connectivity will be connecting objects together and giving us remote control through the web," said Amin Arbabian, an assistant professor of electrical engineering who recently demonstrated this ant-sized radio chip at the VLSI Technology and Circuits Symposium in Hawaii.

The tiny radio-on-a-chip gathers all the power it needs from the same electromagnetic waves that carry signals to its receiving antenna.

Much of the infrastructure needed to enable us to control sensors and devices remotely already exists: We have the Internet to carry commands around the globe, and computers and smartphones to issue the commands. What's missing is a wireless controller cheap enough to so that it can be installed on any gadget anywhere.

"How do you put a bi-directional wireless control system on every lightbulb?" Arbabian said. "By putting all the essential elements of a radio on a single chip that costs pennies to make."

Cost is critical because, as Arbabian observed, "We're ultimately talking about connecting trillions of devices."
More information:
A Power-Harvesting Pad-Less mm-Sized 24/60GHz Passive Radio with On-Chip Antennas, VLSI Technology and Circuits Symposium in Hawaii 2014.

Movie from (Stanford)

... and then just think what you could do with this radio chip on a MEMS mad bug like in the video below...

Researchers at Harvard and the Wyss Institute are developing a robotic bee that could be used to pollinate plants in the future. (

Saturday, September 13, 2014

Study on band-gaps of a variety of classic ALD high-k´s via REELS

A good investigation on band-gaps of a variety of classic ALD high-k´s  - all amorphous NbO, TaO, ZrO, HfO, AlO, and SiO School of Electrical Engineering and Computer Science at Oregon State University and Intel. One of the key aspects of this work is that  the MIM devices have been fabricated on ultra-smooth ZrCuAlNi (ZCAN) amorphous metal bottom electrodes.

All high-k materials were deposited in a Picosun SUNALE R-150B reactor and SiO were deposited in a Cambridge NanoTech Fiji PEALD reactor. 

Investigation of the impact of insulator material on the performance of dissimilar electrode metal-insulator-metal diodes
Nasir Alimardani, Sean W. King, Benjamin L. French, Cheng Tan, Benjamin P. Lampert and John F. Conley Jr.
J. Appl. Phys. 116, 024508 (2014)

The performance of thin film metal-insulator-metal (MIM) diodes is investigated for a variety of large and small electron affinity insulators using ultrasmooth amorphous metal as the bottom electrode. Nb 2O5, Ta 2O5, ZrO2, HfO2, Al2O3, and SiO2 amorphous insulators are deposited via atomic layer deposition (ALD). Reflection electron energy loss spectroscopy (REELS) is utilized to measure the band-gap energy (EG) and energy position of intrinsic sub-gap defect states for each insulator. EG of as-deposited ALD insulators are found to be Nb 2O5 = 3.8 eV, Ta 2O5 = 4.4 eV, ZrO2 = 5.4 eV, HfO2 = 5.6 eV, Al2O3 = 6.4 eV, and SiO2 = 8.8 eV with uncertainty of ±0.2 eV. Current vs. voltage asymmetry, non-linearity, turn-on voltage, and dominant conduction mechanisms are compared. Al2O3 and SiO2 are found to operate based on Fowler-Nordheim tunneling. Al2O3 shows the highest asymmetry. ZrO2, Nb 2O5, and Ta 2O5 based diodes are found to be dominated by Frenkel-Poole emission at large biases and exhibit lower asymmetry. The electrically estimated trap energy levels for defects that dominate Frenkel-Poole conduction are found to be consistent with the energy levels of surface oxygen vacancy defects observed in REELS measurements. For HfO2, conduction is found to be a mix of trap assisted tunneling and Frenkel-Poole emission. Insulator selection criteria in regards to MIM diodes applications are discussed.

Equilibrium energy band diagrams with defect levels indicated. Dotted lines in (a) SiO and (b) AlO indicate distinct energy levels peaks determined by REELS. The shaded region in (c) HfO, (d) ZrO, (e) TaO, and (f) NbO represents the extended range of oxygen vacancy related defect levels as determined by REELS. Darker shading is meant to represent higher densities of defects. Finally, the thick dashed lines in (d) ZrO, (e) TaO, and (f) NbO indicate defect levels extracted from electrical measurements. (J. Appl. Phys. 116, 024508 (2014))

Monday, April 7, 2014

Berkeley and Masdar Institute achieve breakthrough supercapacitor capacitance Using ALD RuO2

As reported by The National (UAE): Dr. Firas Sammoura, an assistant professor in microsystems engineering at the Masdar Institute an co-workers and Researchers at the University of California at Berkeley in the US, have achieved a breakthrough in improving supercapacitor capacitance.

"We did this by utilising ruthenium oxide RuO2 – a pseudo-capacitive chemical compound that is able to quickly switch between its oxide and hydroxide states and can hold a large charge – and atomic layer deposition (ALD). ALD is an advanced method of coating a material by depositing it in thin films, one atomic layer at a time, allowing for the utmost control and uniformity of the coating. In our supercapacitor, the RuO2 layering takes place on carbon nanotubes that form the surface of the plate where the ions gather. The carbon nanotubes are spread on the plate like a shag-pile carpet, with many miniscule filaments of carbon greatly increasing its surface area. To achieve the desired capacitance of that carbon-nanotube plate, we then subject it to ALD of RuO2. This evenly coats each of the tiny nanotubes in a perfect layer of RuO2 – just enough to provide the necessary enhanced pseudo-capacitance, while not wasting expensive RuO2. The result is striking – a supercapacitor that can hold 50 times as much charge as the traditional technology. And it can provide that energy nearly without diminishing. We tested 10,000 cycles, with no loss of power or energy."
Fully story can be found here.