Showing posts with label BEOL. Show all posts
Showing posts with label BEOL. Show all posts

Tuesday, March 12, 2019

Review—Cobalt Thin Films: Trends in Processing Technologies and Emerging Applications

Here is a fantastic revie on Cobalt ALD and CVD from SUNY Polytechnic Institute and Gelest and it is fee to download - Thanks for sharing this one Henrik Pedersen!
Editors' Choice—Review—Cobalt Thin Films: Trends in Processing Technologies and Emerging Applications
Alain E. Kaloyeros, Youlin Pan, Jonathan Goff and Barry Arkles
ECS Journal of Solid State Science and Technology, 8 (2) P119-P152 (2019) (LINK)

Cobalt metallic films are the subject of an ever-expanding academic and industrial interest for incorporation into a multitude of new technological applications. This report reviews the state-of-the art chemistry and deposition techniques for cobalt thin films, highlighting innovations in cobalt metal-organic chemical vapor deposition (MOCVD), plasma and thermal atomic layer deposition (ALD), as well as pulsed MOCVD technologies, and focusing on cobalt source precursors, thin and ultrathin film growth processes, and the resulting effects on film composition, resistivity and other pertinent properties.
Open access article distributed under the terms of the Creative Commons Attribution 4.0 License (CC BY,

Wednesday, September 12, 2018

Thermal Atomic Layer Etching of copper by University of Illinois at Urbana-Champaign

Copper is a wonder metal used in moth integrated circuits but is very difficult to etch by a dry process. That is why copper is typically removed by wet chemistry or rather brutal CMP processes. So now quite fantastic news for all BEOL people who have had all kinds of problem etching copper or for those FEOL people who absolutely do not like copper - now there is a way to thermally etch copper as presented in the publication below by scientists form University of Illinois at Urbana-Champaign in the United States.

Thank you Prof. Pedersen for sharing this article on Twitter using the hashtag #ALEtch (#ALDep for ALD).

According to the abstract, the published ALE method of copper relies on:
  • a cyclic exposure to an oxidant and hexafluoroacetylacetone (Hhfac) at 275°C
  • exposure of a copper surface to molecular oxygen, O2, a weak oxidant, forms a ∼0.3 nm thick layer of Cu2O, which is removed in a subsequent step by exposure to Hhfac. 
  • the process has high selectivity and does not attack dielectrics such as SiO2 or SiNx 
  • the surface reactions are self-limiting
  • the roughness of the copper surface increases slowly over successive etch cycles 
Promising is also that rhermochemical and bulk etching data indicate that the approach should also work for other metals.

Thermal Atomic Layer Etching of Copper by Sequential Steps Involving Oxidation and Exposure to Hexafluoroacetylacetone

doi: 10.1149/2.0211809jss ECS J. Solid State Sci. Technol. 2018 volume 7, issue 9, P491-P495

Screendump from ECS Journal of Solid State Science and Technology ( 2018.12.09)

Monday, August 20, 2018

Overview of Applied Materials cobalt metallization for local interconnects

For those of you interested in the details behind the Applied Materials integrated cobalt metallization process Jonathan Bakke has written two informative blogs about it in Semiconductror Engineering:

(1) The Role Of Cobalt In Enabling AI - For continued performance, power, area and cost improvements, materials need to be engineered at the atomic scale.
(2) The Materials Side Of AI - What comes after tungsten fill for contacts and copper for the lowest-level interconnects?
The integrated cobalt solution using Applied Materials platforms (Applied Materials).

Jonathan Bakke is global product manager for Contact and Middle of Line Products in the Metal Deposition Products Business Unit at Applied Materials. He details the process flow and tool sets from Applied Materials involved in the complete BEOL Co metallization flow:

  • PVD titanium and ALD titanium nitride for the silicide and barrier layers
  • PVD cobalt serves as an anchor layer to ensure good cobalt adhesion to the bottom of the feature
  • CVD cobalt is then used to deposit a conformal film to bulk fill the feature
  • Anneal purifies and reflows the cobalt, removes the CVD seam, and merges crystal grains to form a more crystalline, lower resistance material
  • PVD cobalt for a thick overburden film
  • CMP removes overburden materials to create a smooth planar surface
  • E-beam technology monitors the process and detects voids

Friday, August 10, 2018

Is the semiconductor industry preparing for ruthenium again?

As cobalt is being implemented for 10/7 nm logic interconnects, the next contender on roadmaps for the leading IDMs and foundries is ruthenium. This is not the first time that ruthenium comes into play, ruthenium has on regular basis been on the DRAM and Logic manufacturers roadmaps. Last year there were several indications that ruthenium is back again including that you could spot a rice in ruthenium metal pricing. However, since I started in the semiconductor world 2003 I think that I have managed to be part of six ALD/CVD ruthenium programs and I am happy that one of them is still running (this was my shortest participation, all in all 7 days).

So why do you want to use an expensive and rather fancy metal like ruthenium in interconnects? The lowest Ru resistivity reported for use in interconnects is 15 μΩ-cm, at a cross-sectional area of 300 nm2. Ru damascene metallization is extendible to features with critical dimension around 10 nm and Ru may match Cu line resistance for line dimensions below ~17 nm.

Therefore, as semiconductor devices become even smaller at sub 7 nm nodes, Ru is a strong candidate for replacing some of the back end copper and middle of the line tungsten or ultimately cobalt as the interconnect material or as a liner/barrier/seed for metallization.

At AVS ALD 2018 in Incheon South Korea had a high number of presentations on ruthenium. Besides the oral presentations here below, there were also a number of interesting posters. You can get the abstracts by searching "ruthenium" in the AVS ALD conference planer (LINK).

Low Temperature Atomic Layer Deposition of Ru for Copper Metallization [Oral]
Anil Mane‚ Yan Zhang (Argonne National Laboratory); Amit Kumar‚ John Allgair (BRIDG); John Hryn‚ Jeffrey W. Elam (Argonne National Laboratory)

Insight in Surface Dependence and Diffusion-mediated Nucleation Mechanism of Ruthenium Atomic Layer Deposition on Dielectrics
Job Soethoudt (KU Leuven‚ Belgium); Yoann Tomczak (IMEC‚ Belgium); Fabio Grillo‚ Ruud Van Ommen (Delft University of Technology‚ Netherlands); Efrain Altamirano Sanchez (IMEC‚ Belgium); Annelies Delabie (KU Leuven‚ Belgium)

Inherent Substrate Selectivity and Nucleation Enhancement during Ru ALD using the RuO4-Precursor and H2-gas.
Matthias Minjauw‚ Hannes Rijckaert‚ Isabel Van Driessche‚ Christophe Detavernier‚ Jolien Dendooven (Ghent University‚ Belgium)
Conformal Growth of Low-resistivity Ru by Oxygen-free Thermal Atomic Layer Deposition [Oral]

Guo Liu‚ Jacob Woodruff‚ Daniel Moser (EMD Performance Materials)

Ruthenium: Advanced Nodes and Supply Chain Implications [Oral]
Oliver Briel‚ Don Zeng‚ Andreas Wilk (Umicore AG & Co. KG‚ Germany)
The last contribution by Umicore is especially interesting since it explain in great details the whole supply chain of ruthenium today including:
  • Ruthenium in electronic applications
  • Todays Ruthenium market - Platinum Group Metals market
  • Market drivers, Sources, uses, supply vs. demand,
  • Managing Ruthenium in your precursor portfolio
  • Sourcing strategies

Umicore Tweet: Oliver Briel's fascinating talk on ‘: Advanced Nodes and Supply Chain Implications’ (LINK).

Another event taking place this summer was the Imec US Technology Forum in San Fransisco, also here ruthenium was again on the agenda. According to a recent article in C&EA (LINK), reporting from the annual Imec Technology Forum, Imec experts made the case that the metal ruthenium has potential to replace copper in interconnect. Such a replacement could prevent the semiconductor industry from tripping over a wiring problem in coming years. The main information was given in a talk by Zsolt Tokei - Program Director Nano-interconnect, imec:

New Conductors - Reality or not? [LINK]
For several decades Cu, Al and W were used for interconnect wiring. Recently, due to resistance and reliability concerns alternatives to conventional conductors gained significant interest. Alternative metals are of interest to both memory and logic chips. In this talk imec’s conductor research activities will be showcased with a few implementation examples using damascene or subtractive processes. Benchmark to conventional conductors as well as future perspectives will be provided.

Before that there was also the IITC 2018 and there ruthenium was on the agenda as well. One interesting presentation was the Adelman et. al also from Imec, “Alternative Metals: from ab initio Screening to Calibrated Narrow Line Models” (LINK).
So as for now, ruthenium is on the roadmaps for 5 nm and below but not yet implemented in HVM by any Foundry. However there is a reverse engineering report claiming that ruthenium has been found in Intels 10 nm technology [LINK].

Further reading : Ruthenium Liners Give Way To Ruthenium Lines (LINK)

Much more detailed information on ALD/CVD metal precursors : TECHCET LLC Critical Materials Report(TM) on Metal & High-k  CVD and ALD precursors (LINK)