Stanford presents Area Selective ALD to Develop Higher Performing, More Energy Efficient Electronics

Press release: Stanford University researchers sponsored by Semiconductor Research Corporation (SRC), the world’s leading university-research consortium for semiconductor technologies, have developed a new area selective atomic layer deposition (ALD) process that promises to accelerate the manufacturing of higher performing, more energy efficient semiconductors. 

The Stanford researchers employ the intrinsically selective adsorption of octadecylphosphonic acid self-assembled monolayers on Cu over SiO2 surfaces to selectively create a resist layer only on Cu. ALD is then performed on the patterns to deposit a dielectric film. A mild etchant is subsequently used to selectively remove any residual dielectric film deposited on the Cu surface while leaving the dielectric film on SiO2 unaffected. The selectivity achieved after this treatment, measured by compositional analysis, is found to be 10 times greater than for conventional area selective ALD. "Reprinted (adapted) with permission from (ACS Nano, 2015, 9 (9), pp 8710–8717, DOI: 10.1021/acsnano.5b03125). Copyright (2015) American Chemical Society."
 

Press release Continued :

 

It is well known that next-generation electronic, optoelectronic and sensing devices that contain nanoscale dimensions face increasingly difficult materials and fabrication challenges as the downward scaling of these devices continues. Conventional semiconductor manufacturing processes are time-consuming and expensive, in part due to the need for lithographic patterning. The Stanford research leverages simple ALD and etching processes that eliminate this lithography step and improve selective deposition of dielectric materials by more than 10 times in film thickness compared to similar advanced processes.

Due to difficulties of current top-down fabrication processes that contain multiple deposition, lithography and etching steps, along with problems with misalignment in lithography, using an alternative approach in which the desired materials are directly and selectively deposited would significantly facilitate the process, according to the Stanford team. 

 

 

Stacey Bent, Department of Chemical Engineering Chair and Jagdeep and Roshni Singh Professor in School of Engineering, Stanford University.(Picture from Stanford University)

 

“Our technology is a promising candidate for overcoming the challenges of top-down processing and misalignment because it greatly improves the ability to perform selective deposition of materials. This research introduces a novel processing method to meet the increasingly difficult materials challenges associated with new devices,” said Dr. Stacey Bent, Department of Chemical Engineering Chair and Jagdeep and Roshni Singh Professor in School of Engineering, Stanford University.

Link to Stacy Bent´s Research Group : http://bentgroup.stanford.edu/
 

Current approaches utilize lithography for nanoscale patterning. Using lithography and etching for fabrication of 2D or 3D structures often results in misaligned features and causes a risk of shorting or high resistant areas. However, selective deposition using ALD can reduce these risks and reduce the process time and steps.

Bent explained that selective deposition allows layers of material to be added onto a substrate only where desired without the need for additional lithography steps. However, the high level of selectivity needed for a manufacture-worthy process has not yet been achieved in area selective deposition studies. In addition, most methods for area selective deposition require long processing times.

The Stanford research has been focused on selective deposition of dielectric materials on metal/dielectric patterns. These type of structures can be found in interconnects and back-end-of-line (BEOL) processing. With ALD being used in other stages of the device fabrication process as well, the results from the Stanford experiments can potentially be applied to a variety of nanoscale electronic, optoelectronic and sensing devices.

The research developments occurred during the second year of research on the topic, and the Stanford team is continuing to explore new methods for area selective ALD to improve both selectivity and manufacturability.

“The Stanford team’s research has shown for the first time that, by following selective deposition of a dielectric material using pre-treatment by an inhibitory material, they can significantly reduce the process time (from 48 hours to less than 1 hour) and also improve the limits of selective deposition of dielectrics by more than 10 times,” said Kwok Ng, Senior Science Director of Nanomanufacturing Materials and Processes at SRC.

Issues and options for using selective ALD at 5nm

Here is a very good blog by Mark Lapedus on scaling down some additional nodes. Mark Lapedus is Executive Editor for manufacturing at Semiconductor Engineering.

One of the more interesting option for all us ALD freaks besides the NGLs, there is another emerging option—selective deposition. Below I have cut out that part and please do forward any good open avaialble information on this topic to me (jonas.sundqvist@baldengineering.com) or simply post a comment here!

Still in the R&D stage, selective deposition could be used to selectively deposit materials, namely metals on metals and dielectrics on dielectrics, on a device. “There are a lot of people thinking about
this today,” said Girish Dixit, vice president of process applications for Lam Research . “There are many areas that selective deposition could be used in, including doing edges or removing something at the expense of something.

Selective deposition involves the use of special chemistries and existing atomic layer deposition (ALD) tools. It also makes use of molecular layer deposition (MLD), which is similar to ALD. “With MLD,you are typically making something that is primarily an organic,composed of carbon, nitrogen, oxygen and hydrogen. In classic ALD, you are making inorganic materials. There are also hybrids,” said James Engstrom, a professor in the School of Chemical and Biomolecular Engineering at Cornell University. There are some differences between traditional ALD and selective deposition using ALD. “The difference is you somehow trick the ALD process, so that it grows on material A, but does not grow on material B,” Engstrom said.

Selective deposition doesn’t replace lithography, but it does solve a problem—edge placement error. “When you want one thing to line up with another, the ability to control the placement of a feature is getting to be outside the range, because the features are small,” said Gregory Parsons, a professor in the College of Engineering at North Carolina State University.

In a theoretical flow, a lithography tool would first pattern a surface. “So, if there is a pattern available on the surface that you want to selectively deposit, then your material that you are forming would then align to the pattern that is underneath the substrate,” Parsons said. “Instead of a physical mask to align, you would want to use the chemistry of the surface to do the alignment. And if the process can recognize that selective chemical difference, then we can deposit materials exactly where we want.”

Still, the technology is unproven and there are challenges. But if the technology works, it could possibly change the landscape in IC manufacturing. “Once the ball is rolling, and you can do selective deposition on anything, then the applications will expand,” Lam’s Dixit added.

Full Story here: http://semiengineering.com/issues-and-options-at-5nm/#.VQrjFVPwzdg.linkedin

Good papers on the topic:

The use of atomic layer deposition in advanced nanopatterning by Kessels et al

Atomic layer deposition (ALD) is a method that allows for the deposition of thin films with atomic level control of the thickness and an excellent conformality on 3-dimensional surfaces. In recent years, ALD has been implemented in many applications in microelectronics, for which often a patterned film instead of full area coverage is required. This article reviews several approaches for the patterning of ALD-grown films. In addition to conventional methods relying on etching, there has been much interest in nanopatterning by area-selective ALD. Area-selective approaches can eliminate compatibility issues associated with the use of etchants, lift-off chemicals, or resist films. Moreover, the use of ALD as an enabling technology in advanced nanopatterning methods such as spacer defined double patterning or block copolymer lithography is discussed, as well as the application of selective ALD in self-aligned fabrication schemes.

University of Helsinki presents Self-Aligned Thin-Film Patterning by Area-Selective Etching of Polymers

A promising path to cut cost, scale, and reduce the environmental impact of semiconductor manufacturing

One of the driving costs in the high volume production of semiconductor components for especially powerful processors and memory chips is the patterning process. Both the capital investment in photolithographic equipment and the design cost add to the escalating cost going down to smaller nodes (see figure below). If one can reduce the number of lithographic mask layers needed in the production for a chip design one automatically cut the overall cost. Another problem is that while scaling down designs to smaller critical dimensions and tighter pitches and scaling up in the 3rd dimension like for 3D-NAND and coming 3D-DRAM it becomes more difficult to match the next mask layer with the previous one. The industry has solved this issue successfully for many years by introducing self-aligned processes like self-aligned contacts to the source, drain, and gate of the transistors below. Also, selective deposition processes like selective Epi and Cobalt CVD caps on copper are in production.

From an environmental view, lithography and mask more mask layers also consume more energy and clean water. Recent reports from Taiwan have it that both are problems, where drought has led to water shortages and the overall energy demand from fabs are high (about 5% of Taiwan total demand in 2019). 

Here, the University of Helsinki presents a process sequence for the future that is self-aligned and selective making it possible to mitigate all those problems in a very clever way for future devices and metallization schemes - please find all the details in the article below that is open source for download.

Self-Aligned Thin-Film Patterning by Area-Selective Etching of Polymers

by Chao Zhang, Markku Leskelä and Mikko Ritala *

Coatings 2021, 11(9), 1124; https://doi.org/10.3390/coatings11091124

Patterning of thin films with lithography techniques for making semiconductor devices has been facing increasing difficulties with feature sizes shrinking to the sub-10 nm range, and alternatives have been actively sought from area-selective thin film deposition processes. Here, an entirely new method is introduced to self-aligned thin-film patterning: area-selective gas-phase etching of polymers. The etching reactions are selective to the materials underneath the polymers. Either O2 or H2 can be used as an etchant gas. After diffusing through the polymer film to the catalytic surfaces, the etchant gas molecules are dissociated into their respective atoms, which then readily react with the polymer, etching it away. On noncatalytic surfaces, the polymer film remains. For example, polyimide and poly(methyl methacrylate) (PMMA) were selectively oxidatively removed at 300 °C from Pt and Ru, while on SiO2 they stayed. CeO2 also showed a clear catalytic effect for the oxidative removal of PMMA. In H2, the most active surfaces catalysing the hydrogenolysis of PMMA were Cu and Ti. The area-selective etching of polyimide from Pt was followed by area-selective atomic layer deposition of iridium using the patterned polymer as a growth-inhibiting layer on SiO2, eventually resulting in dual side-by-side self-aligned formation of metal-on-metal and insulator (polymer)-on-insulator. This demonstrates that when innovatively combined with area-selective thin film deposition and, for example, lift-off patterning processes, self-aligned etching processes will open entirely new possibilities for the fabrication of the most advanced and challenging semiconductor devices.

Schematics showing self-aligned polymer etching and the subsequent film patterning through area-selective deposition and lift-off processes. (Zhang et al Coatings 2021, 11(9), 1124, figure 1)

This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited

Semiconductor design and manufacturing: Achieving leading-edge capabilities, McKinsey LINK

ASD 2018 Call for Abstracts Deadline Extended to March 5

Call for Abstracts Extended to March 5, 2018

Click for Abstract Guidelines & Submission

Website

Hotel

Sponsors

The principal chemical processes and mechanisms that enable Area Selective Deposition (ASD) are rapidly becoming critical in several areas of materials and technological advancement. Most notably, the semiconductor industry will likely need new ASD processes to enable “chemical alignment” to complement traditional physical alignment (i.e. lithography) to allow transistors to scale to less than 10 nm dimensions. Other fields are also exploring chemical selectivity in materials to achieve precise targeted performance. Catalytic materials, for example, which are commonly employed to promote chemically selective reactions, are now being designed and constructed using site-selective deposition reactions. In addition, the growing complexity of energy generation and storage materials are also driving the need for new site- or area-selective processes to control heterogeneous material structures. To share advances in these areas, the 3rd Area Selective Deposition Workshop (ASD 2018), will be held on April 29 – May 1, 2018, at North Carolina State University in Raleigh North Carolina USA. The Workshop will bring together leading international scientists and engineers from academia and industry from all regions to share results and insights into: 1) fundamental principles and barriers to area selective deposition; 2) technological needs and challenges of ASD; 3) new chemical approaches and processes to address the expanding needs; and 4) surface characterization techniques and metrology innovation for ASD. Based on successful workshops at the Eindhoven University of Technology in 2017 and at IMEC in Leuven Belgium in 2016, ASD 2018 will consist of two days of presentations and discussions, preceded by a welcome reception at North Carolina State University on April 29. The program will include a series of invited and contributed speakers, a panel discussion, as well as a poster session reception on the evening of April 30.

Call for Abstracts - 3rd Area Selective Deposition Workshop (ASD 2018)

Call for Abstracts Extended to March 5, 2018 Click for Abstract Guidelines & Submission Website Hotel Sponsors The principal chemical processes and mechanisms that enable Area Selective Deposition (ASD) are rapidly becoming critical in several areas of materials and technological advancement. Most notably, the semiconductor industry will likely need new ASD processes to enable “chemical alignment” to complement traditional physical alignment (i.e. lithography) to allow transistors to scale to less than 10 nm dimensions. Other fields are also exploring chemical selectivity in materials to achieve precise targeted performance. Catalytic materials, for example, which are commonly employed to promote chemically selective reactions, are now being designed and constructed using site-selective deposition reactions. In addition, the growing complexity of energy generation and storage materials are also driving the need for new site- or area-selective processes to control heterogeneous material structures. To share advances in these areas, the 3rd Area Selective Deposition Workshop (ASD 2018), will be held on April 29 – May 1, 2018, at North Carolina State University in Raleigh North Carolina USA. The Workshop will bring together leading international scientists and engineers from academia and industry from all regions to share results and insights into: 1) fundamental principles and barriers to area selective deposition; 2) technological needs and challenges of ASD; 3) new chemical approaches and processes to address the expanding needs; and 4) surface characterization techniques and metrology innovation for ASD. Based on successful workshops at the Eindhoven University of Technology in 2017 and at IMEC in Leuven Belgium in 2016, ASD 2018 will consist of two days of presentations and discussions, preceded by a welcome reception at North Carolina State University on April 29. The program will include a series of invited and contributed speakers, a panel discussion, as well as a poster session reception on the evening of April 30. Topics: Chemical selectivity in surface reactions Mechanisms and surface-dependent thin film nucleation and growth Surface passivation for controlled nucleation and growth Patterned deposition resists, including organic monolayers, for selective deposition Chemical activation for nucleation enhancement Selectivity in thin film etching, including atomic layer etching (ALE) Processes and mechanisms for area-selective chemical vapor deposition (CVD) Processes and mechanisms area-selective atomic layer deposition (ALD) Metrology for Area-Selective Deposition Applications for area-selective deposition in electronics manufacturing Applications for area-selective processing in catalysis, energy generation and storage, and other emerging areas Surface characterization techniques for defects formation and mitigation Invited: Rohan Akolkar, Case Western University, USA Silvia Armini, IMEC, Belgium Sean Barry, Carlton University, Canada Yves Chabal, University of Texas, Dallas, USA Steve George, University of Colorado at Boulder, USA Jessica Kachian, Applied Materials, USA Joerg Lahann, University of Michigan, USA Junling Lu, University of Science & Technology of China, China Adrie Makus, Eindhoven Technical University, The Netherlands Chuck Winter, Wayne State University, USA Panel Discussion: As area selective deposition becomes critical for multiple uses, loss of selectivity and defect formation continue to be obstacles to practical implementation. New surface characterization and metrologies are needed for better mechanistic understanding of defect formation and mitigation. This panel will bring experts from academia, industry and consortia to discuss these challenges and potential solution paths. Click for Abstract Guidelines & Submission Key Deadlines: Abstract Submission Deadline Extended to: March 5, 2018 Author Acceptance Notifications: March 26, 2018 Early Registration Deadline: April 6, 2018 Hotel Reservation Deadline: April 6, 2018 Program Chair Gregory Parsons North Carolina, State Univ., USA Organizing Committee Adrie Mackus Eindhoven University of Technology, The Netherlands (ASD 2017 Chair) Annelies Delabie IMEC, Belgium (ASD 2016 Chair) Dennis Hausmann Lam Research, USA

AVS | 125 Maiden Lane, 15th Floor, New York, NY 10038

Area-Selective ALD of TiN Using Aromatic Inhibitor Molecules for Metal/Dielectric Selectivity

Just making sure that you have not missed this important and amazing publication from Merkx et al at TU Eindhoven since I missed it for more than a month by now. Selective ALD of TiN  -  woah so beautiful! TiN CVD and ALD is used just about  everywhere in  wafer based-device fabrication:

• Metal diffusion barriers e.g. for Tungsten (NAND, DRAM, Logic)
  
• Metal Gates (HKMG, Workfunction tuning, etc.)
• Capacitor Electrodes (DRAM, ReRAM, FRAM)
• Hard mask in BEOL processing
• And much more 

Please also check out the supporting information on how to create those test samples for the actually selectivity experiments  - I just say it´s done in a very clever way (LINK) .

Area-Selective Atomic Layer Deposition of TiN Using Aromatic Inhibitor Molecules for Metal/Dielectric Selectivity Chemistry of Materials  

Pub Date : 2020-08-13, DOI:10.1021/acs.chemmater.0c02370

Marc J. M. Merkx; Sander Vlaanderen; Tahsin Faraz; Marcel A. Verheijen; Wilhelmus M. M. Kessels; Adriaan J. M. Mackus

Despite the rapid increase in the number of newly developed processes, area-selective atomic layer deposition (ALD) of nitrides is largely unexplored. ALD of nitrides at low temperature is typically achieved by employing a plasma as the coreactant, which is not compatible with most approaches to area-selective ALD. In this work, a plasma-assisted ALD process for area-selective deposition of TiN was developed, which involves dosing of inhibitor molecules at the start of every ALD cycle. Aromatic molecules were identified as suitable inhibitor molecules for metal/dielectric selectivity because of their strong and selective adsorption on transition metal surfaces. A four-step (i.e., ABCD-type) ALD cycle was developed, which comprises aniline inhibitor (step A) and tetrakis(dimethylamino)titanium precursor (step B) dosing steps, followed by an Ar–H₂ plasma exposure (step C), during which a substrate bias is applied in the second half of the plasma exposure (step D). This process was demonstrated to allow for ∼6 nm of selective TiN deposition on SiO₂ and Al₂O₃ areas of a nanoscale pattern with Co and Ru non-growth areas. The TiN deposited using this ABCD-type process is of high quality in terms of resistivity (230 ± 30 μΩ cm) and impurity levels. This developed strategy for area-selective ALD of TiN can likely be extended to area-selective ALD of other nitrides.

 

15 nm resolved patterns in Selective Area Atomic Layer Deposition

Here is an impressive and fundamental paper on selective area atomic layer deposition (SA-ALD)or just area selective deposition (ASD) that some prefer to call it.

The researchers at IBM has devleoped a bottom up approach on 300 mm pattern wafers that had been fabricated using standard trench first metal hardmask damascene scheme to create a line pattern of 36 nm pitch with single EUV exposures using low-k OMCTS 2.7 as the dielectric.

 

By deactivating ond surface with self-assembled monolayers (SAMs, Octadecylphosphonic acid) leaving another surface active for ALD processing (ZnO) they were able to produce 15 nm resolved patterns. One of the biggest challenges in the implementation of SA-ALD is the ability to maintain pattern fidelity and reduce defects during the ALD process (ZnO). 

 

Thank you Henrik Pedersen for sharing this paper!

 

Deactivating material is used to block one surface from ALD film growth. (A) ALD eventually leads to overgrowth of the film onto deactivated areas. (B) Defects in the deactivation layer can lead to the formation of locally deposited material. Published with permission from ACS Appl. Mater. Interfaces, 2018, 10 (44), pp 38630–38637 Copyright 2018 American Chemical Society.

Fifteen Nanometer Resolved Patterns in Selective Area Atomic Layer Deposition—Defectivity Reduction by Monolayer Design

Rudy Wojtecki, Magi Mettry, Noah F. Fine Nathel, Alexander Friz, Anuja De Silva, Noel Arellano, and Hosadurga Shobha
ACS Appl. Mater. Interfaces, 2018, 10 (44), pp 38630–38637
DOI: 10.1021/acsami.8b13896

CALL FOR PAPERS - 4th Area Selective Deposition (ASD) Workshop will be held on April 4th – 5th, 2019 in IMEC, Leuven (Belgium)

 Visit our website:

   https://www.asd2019-workshop.org/

ASM and IMEC are proud to announce that the 4^th Area Selective Deposition (ASD) Workshop will be held on April 4^th – 5^th, 2019 in IMEC, Leuven (Belgium).

This workshop will bring together leading experts from both academia and industry to share their vision and results on ASD. Based on a series of successful workshops at the: North Carolina State University in 2018, Eindhoven University of Technology in 2017 and IMEC in 2016, the two-days program will include invited and contributed speakers, a poster session and a reception on the evening of April 4^th.

The workshop will cover a wide range of topics, including the following:

Area selective epitaxy and area selective chemical vapor deposition: processes and mechanisms, defects control

Intrinsic selectivity of ALD processes: nucleation and interface studies, chemical selectivity in surface reactions, competitive adsorption, precursors design, modeling of surface reactions

Methods for area selective activation / deactivation: use of inhibitors (self-assembled monolayers, polymers), plasma-/beam-induced activation

Processes and mechanisms for area selective atomic layer deposition: deposition of metals or dielectrics, thermal/plasma enhanced ALD, 3D or patterned substrates, substrates preparation, sequential deposition/etching,

Metrology and defects control: surface characterization techniques, selective etching of defects

Applications of area selective deposition: semiconductor industry (integration needs of device makers, solutions proposed by the equipment makers), catalysis, energy generation and storage, etc.

On behalf of the organizing committee, it will be our pleasure to welcome you in Leuven.

Andrea Illiberi

Program chair of the 4th ASD workshop