Surfs are going to be up at the PRiME Symposium G01 on ALD & ALE Applications 20, in Honolulu | Oct. 6-12, 2024

Every four years, the PRiME Joint International Meeting is held under the auspices of the Electrochemical Society (ECS), joint with its sister Societies of Japan and Korea. This fall, PRIME 2024 will be held on Oct. 6-11, 2024 in Honolulu, Hawaii, and is expected to gather over 4000 participants and 40 exhibitors from both academia and industry.

The conference has a strong focus on emerging technology and applications in both solid-state science & technology and electrochemistry.

General information and the Meeting Program can be found here: CALL FOR PAPERS.

The organizers of symposium G01 on “Atomic Layer Deposition & Etching Applications, 20” encourage you to submit your abstract(s) on topics, comprising but not limited to:

1. Semiconductor CMOS applications: development and integration of ALD high-k oxides and metal electrodes with conventional and high-mobility channel materials;

2. Volatile and non-volatile memory applications: extendibility, Flash, MIM, MIS, RF capacitors, etc.;

3. Interconnects and contacts: integration of ALD films with Cu and low-k materials;

4. Fundamentals of ALD processing: reaction mechanisms, in-situ measurement, modeling, theory;

5. New precursors and delivery systems;

6. Optical, photonic and quantum applications; applications aiming at Machine Learning, Artificial Intelligence

7. Coating of nanoporous materials by ALD;

8. Molecular Layer Deposition (MLD) and hybrid ALD/MLD;

9. ALD for energy conversion applications such as fuel cells, photovoltaics, etc.;

10. ALD for energy storage applications;

11. Productivity enhancement, scale-up and commercialization of ALD equipment and processes for rigid and flexible substrates, including roll-to-roll deposition;

12. Area-selective ALD;

13. Atomic Layer Etching (‘reverse ALD’) and related topics aiming at self-limited etching, such as atomic layer cleaning, etc.

FYI: Last year in Gothenburg, our symposium G01 on ALD & ALE Applications 19 attracted a record number of 78 presentations, composing a full 4-day schedule of 66 oral (of which 18 invited), plus 12 poster presentations.

We will traditionally attract more attendants from Far East and expect to be as successful this fall in Hawaii.

Abstract submission

Meeting abstracts should be submitted not later than the deadline of April 12, 2024 via the ECS website: Submission Instructions

Invited speakers

List of confirmed invited speakers (from North America, Asia and Europe):

1. Bart Macco, TU Eindhoven, Netherlands, Review of ALD for solar cells

2. Maarit Karppinen, Aalto University, Finland, ALD/MLD for energy / membrane technology

3. Chad Brick, Gelest, USA, Silanes and silazanes precursors for Area Specific Deposition

4. Makoto Sekine, Nagoya Univ., Japan, Low damage ALE of AlGaN

5. Rong Chen, HUST Univ. Wuhan, China, ALD for Cataysis and other applications

6. Mikhael Bechelany, IEM, Montpellier, France, Recent Advancements and Emerging Applications in ALD on High-Porosity Materials

7. Miika Mattinen, Univ Helsinki, Finland, ALD of dichalcogenides for electrocatalysis

8. Bonggeun Shong, Hongik University, Korea, Theory of area-selective ALD

9. Miin-Jang Chen, National Taiwan Univ., Inhibitor-free Area-Selective ALD

10. Hyungjun Kim, Yonsei University, Korea, ALD of “Group 16 Compounds” for Emerging Applications (2D TMDCs)

11. Agnieszka Kurek, Oxford Instruments, United Kingdom, Faster ALD for Emerging Quantum Applications

12. Matthew Metz, Inte, USA, Keynote on "Materials Challenges in Future Semiconductor Devices"

13. Junling Lu, University of Science and Technology of China, ALD for Catalysis

14. Sung Gap Im, KAIST, Korea, Vapor-phase Deposited Functional Polymer Films for Electronic Device Applications

15. Jason Croy, Argonne National Lab, USA, Next-gen batteries & ALD

16. Mark Saly, Applied Materials, USA, Key Challenges in Area Selective Deposition: from R&D Scale to High Volume Manufacturing

Visa and travel

For more information, see: VISA AND TRAVEL INFORMATION

In addition, Mrs. Francesca Spagnuolo at the ECS (Francesca.Spagnuolo@electrochem.org) can provide you with an official participation letter issued by the Electrochemical Society.

For (limited) general travel grant questions, please contact travelgrant@electrochem.org.

We are looking forward to meeting you all at our symposium G01 on ALD & ALE Applications 20, in Honolulu | Oct. 6-12, 2024 !

ASM International: Spearheading Semiconductor Innovation in ALD, Epitaxy, and CVD Markets

ASM International N.V. (Euronext Amsterdam: ASM) yesterday reported its fourth quarter 2023 operating results (unaudited). Double-digit full-year revenue growth, outperforming softer WFE market in 2023

Investor presentation: 2023_q4_investor-presentation.pdf (asm.com)

“2023 was another successful year for ASM. Sales increased by 13% at constant currencies, despite softening market conditions, and marking the seventh consecutive year of double-digit growth.” said Benjamin Loh, CEO of ASM. “Revenue in Q4 2023 amounted to €633 million, in line with our guidance of €600-640 million and down compared to the level in Q4 2022. Revenue in the quarter was supported by strong sales in the power/analog/ wafer segment. Bookings at €678 million were slightly better than our expectation and were driven by GAA pilot- line orders and continued strength in China demand.

ASM's Leadership in the Growing ALD Market

According to ASM, the single wafer Atomic Layer Deposition (ALD) market is experiencing significant growth, with projections indicating an increase from $2.6 billion in 2022 to a range of $4.2 billion to $5.0 billion by 2027. This growth, characterized by a Compound Annual Growth Rate (CAGR) of 10-14% from 2022 to 2027, underscores the expanding role of ALD technology in semiconductor manufacturing. ASM International, a key player in the semiconductor industry, holds a dominant position in this market, commanding a share of over 55% throughout the forecast period.

Please note that this market assessment, most probably originally from TechInsights (prev. VLSI Research) does not include Large Batch furnace ALD, which historically have been about 30% of the total 300 mm ALD equipment market. The leaders in this segment are Tokyo Electron followed by Kokusai and ASM chose not to compete with its A412 ALD product line.

Driving Forces Behind ALD Market Expansion

The expansion of the ALD market is propelled by a series of technological advancements and increasing demands within the semiconductor sector. Key factors contributing to this growth include the industry's shift towards Gate-All-Around (GAA) technology, the necessity for advanced high-k gate dielectrics, and the precision required for threshold voltage tuning. Additionally, the development of sacrificial layers and the use of high aspect ratio Through-Silicon Vias (TSVs) are critical in advancing semiconductor manufacturing techniques. The application of metals and the adoption of selective ALD processes further accentuate the importance of ALD technology in modern semiconductor fabrication.

ASM's Strategic Positioning and Market Opportunities

ASM is well-positioned to capitalize on the opportunities presented by the burgeoning ALD market. The company's strategic emphasis on innovation, coupled with its comprehensive product portfolio, positions ASM as a frontrunner in meeting the evolving needs of the logic/foundry and memory segments of the semiconductor industry. The transition to advanced manufacturing technologies, such as GAA and high-k metal gate applications, presents significant growth avenues for ALD, with ASM at the forefront of this technological evolution.

To be more specific, the transition to GAA technology and the expansion in FinFET applications are set to significantly increase ASM's served available market by approximately US$400 million for every 100,000 wafer starts per month (WSPM). According to ASM, the equipment orders started to come in in the 2nd half of 2023. We can assume that this are orders from Samsung, TSMC and Intel. It is however about peculiar since Samsung had 3 nm GAA going already with yield in August 2023 and ASM is describing it as GAA pilot lines. Anyhow, come 2028 when all leading foundries including Rapidus in Japan are up and running GAAFETs, this additional market will be + USD 1.5 B as compared to if it would have been "only" FinFET technology - according to my back of the envelope calculations. For a company like ASM, with just below USD 3 B (2.6 B EUR) annual Revenue 2023 this is a huge thing. If this is not enough to go woah - add to that the GAAFET market is an upwards moving target and will continue to grow and looking ahead stacking of NMOS/PMOS will drive further demand for this type of ALD and Epi processes.

Expansion into the Epitaxy and CVD Markets

The Silicon Epitaxy (Si epi) market is also on a growth trajectory, with forecasts suggesting it will reach between $2.3 billion and $2.9 billion by 2027. ASM aims for a market share target of over 30%, focusing on both leading-edge and non-leading-edge segments. The leading-edge growth is driven by transitions to GAA technology and advancements in high-performance DRAM, while the non-leading-edge growth is buoyed by wafer power analog and strong momentum from ASM's Intrepid ESA. The epitaxy market is expected to see a Compound Annual Growth Rate (CAGR) of 3-8% from 2022 to 2027, with the leading-edge segment outpacing the overall market with a CAGR of 10-15%.

Regarding the SiC market, the investor presentation highlighted significant growth in power/analog/wafer revenue, almost doubling, primarily driven by robust demand in China. This growth was positively impacted by the consolidation of LPE (SiC Epitaxy), with sales comfortably exceeding the target of more than €130 million in 2023. This indicates ASM's strong performance in the SiC market and its successful integration and expansion in SiC epitaxy, aligning with the broader industry trend towards more advanced and efficient semiconductor materials.

Chemical Vapor Deposition (CVD) technology is another area of focus for ASM, particularly in the context of transitioning to new materials like Molybdenum, which is replacing traditional materials such as CVD Tungsten and PVD Copper in interconnect applications. This shift is indicative of the evolving needs within the semiconductor manufacturing process and highlights ASM's adaptability to changing market dynamics.

In summary, ASM's strategic initiatives in ALD, Epitaxy, and CVD technologies underscore the company's commitment to innovation and leadership within the semiconductor equipment market. Through a combination of market foresight, technological prowess, and strategic investments, ASM is well-positioned to capitalize on the growth opportunities presented by the evolving semiconductor landscape. 

PRiME 2024: A Global Convergence on Atomic Layer Processing Set for Honolulu This October

The PRiME Joint International Meeting, organized by the Electrochemical Society and sister societies from Japan and Korea, will take place from October 6-11, 2024, in Honolulu, Hawaii. Anticipating over 4000 participants, the conference will focus on solid-state science, technology, and electrochemistry. Symposium G01 invites submissions on Atomic Layer Deposition and Etching, covering topics from semiconductor applications to energy storage. The deadline for abstract submission is April 12, 2024. Last year's event saw 78 presentations, indicating a strong interest in the field. For visa, travel information, and participation letters, contact ECS representatives.

Every four years, the PRiME Joint International Meeting is held under the auspices of the Electrochemical Society (ECS), joint with its sister Societies of Japan and Korea.

This fall, PRIME 2024 will be held on Oct. 6-11, 2024 in Honolulu, Hawaii, and is expected to gather over 4000 participants and 40 exhibitors from both academia and industry.

The conference has a strong focus on emerging technology and applications in both solid-state science & technology and electrochemistry.

General information and the Meeting Program can be found here: CALL FOR PAPERS.

The organizers of symposium G01 on “Atomic Layer Deposition & Etching Applications, 20” encourage you to submit your abstract(s) on topics, comprising but not limited to:

1. Semiconductor CMOS applications: development and integration of ALD high-k oxides and metal electrodes with conventional and high-mobility channel materials;

2. Volatile and non-volatile memory applications: extendibility, Flash, MIM, MIS, RF capacitors, etc.;

3. Interconnects and contacts: integration of ALD films with Cu and low-k materials;

4. Fundamentals of ALD processing: reaction mechanisms, in-situ measurement, modeling, theory;

5. New precursors and delivery systems;

6. Optical, photonic and quantum applications; applications aiming at Machine Learning, Artificial Intelligence

7. Coating of nanoporous materials by ALD;

8. Molecular Layer Deposition (MLD) and hybrid ALD/MLD;

9. ALD for energy conversion applications such as fuel cells, photovoltaics, etc.;

10. ALD for energy storage applications;

11. Productivity enhancement, scale-up and commercialization of ALD equipment and processes for rigid and flexible substrates, including roll-to-roll deposition;

12. Area-selective ALD;

13. Atomic Layer Etching (‘reverse ALD’) and related topics aiming at self-limited etching, such as atomic layer cleaning, etc.

FYI: Last year in Gothenburg, our symposium G01 on ALD & ALE Applications 19 attracted a record number of 78 presentations, composing a full 4-day schedule of 66 oral (of which 18 invited), plus 12 poster presentations.

We will traditionally attract more attendants from Far East and expect to be as successful this fall in Hawaii.

Abstract submission

Meeting abstracts should be submitted not later than the deadline of April 12, 2024 via the ECS website: Submission Instructions

Invited speakers

A list of confirmed invited speakers (from North America, Asia and Europe) will soon be available.

Visa and travel

For more information, see: VISA AND TRAVEL INFORMATION

In addition, Mrs. Francesca Spagnuolo at the ECS (Francesca.Spagnuolo@electrochem.org) can provide you with an official participation letter issued by the Electrochemical Society.

For (limited) general travel grant questions, please contact travelgrant@electrochem.org.

We are looking forward to meeting you all at our symposium G01 on ALD & ALE Applications 20, in Honolulu | Oct. 6-12, 2024 !

Symposium organizers:

F. Roozeboom, (lead), University of Twente; e-mail: f.roozeboom@utwente.nl,
S. De Gendt, IMEC & Catholic University Leuven,
J. Dendooven, Ghent University,
J. W. Elam, Argonne National Laboratory,
O. van der Straten, IBM Research,
A. Illiberi, ASM Europe,
G. Sundaram, Veeco,
R. Chen, Huazhong University of Science and Technology,
O. Leonte, Berkeley Polymer Technology,
T. Lill, Clarycon Nanotechnology Research,
M. Young, University of Missouri,
A. Kozen, University of Vermont.

ASD2024: Uniting the World of Area Selective Deposition in Historic Old Montreal

Announcement for ASD2024 Workshop

Dates: April 15-16, 2024

Location: Old Montreal, Canada

Welcome and bienvenue to the exciting Area Selective Deposition (ASD) workshop to be held in the picturesque Old Montreal. This two-day event, scheduled for April 15 and 16, offers an enriching platform for both academic and industry professionals to exchange groundbreaking ideas in the field of ASD.

Special Sessions:

1. Pre-Workshop Tutorial: A comprehensive half-day tutorial on April 14 (Sunday afternoon). Note: This session requires an additional fee.

2. Atomic Layer Processing Showcase: A half-day event on April 17 (Wednesday morning), highlighting Canada's advancements in atomic layer processing. This session is included in the conference fee.

Conference Venues:

- Hotel Place d'Armes (55 Rue Saint-Jacques): Main sessions and lunches on Monday and Tuesday will be hosted here. This 4-star hotel is conveniently located near a metro stop.

- Hotel Nelligan (106 Saint-Paul St W): A 4-star boutique hotel, the venue for the opening mixer on Sunday evening and the poster session on Monday evening.

Workshop Highlights:

- Single session format over two days featuring invited and contributed talks.

- A panel discussion focusing on the industrial and academic communication of ASD.

- Networking opportunities with leading experts and peers.

Explore Montreal:

Participants are encouraged to experience the charm of Old Montreal, known for its vibrant restaurants, bars, shopping venues, and historical sites like the Notre Dame Basilica and the port. For sports enthusiasts, the Circuit Gilles Villeneuve offers a unique opportunity for running and cycling.

Organizers:

- Prof. Sean Barry, Carleton University

- Prof. Paul Ragogna, Western University

Scientific Committee:

- Adrie Mackus, Eindhoven University of Technology

- Anjana Devi, Ruhr University Bochum

- Annelies Delabie, IMEC

- Anuja DaSilva, Lam Research

- Dennis Hausmann, Lam Research

- Erwin Kessels, Eindhoven University of Technology

- Gregory Parsons, North Carolina State University

- Han-Bo-Ram Lee, Incheon National University

- Ishwar Singh, IBM

- Keyvan Kashefi, Applied Materials

- Kristen Colwell, Intel

- Mark Saly, Applied Materials

- Marko Tuominen, ASM

- Ralf Tonner-Zech, Wilhelm-Ostwald-Institute für Physikalische und Theoretische Chemie

- Ravi Kanjolia, EMD Electronics

- Robert Clark, TEL

- Sang Hoon Ahn, Samsung Electronics

- Seung Wook Ryu, SK hynix

- Stacey F. Bent, Stanford University

Contact Information:

asd2024.ca

Balancing Fundamental and Applied ALD with Stacey Bent – ALD Stories Ep. 26

In Episode 26, Professor Stacey Bent from Stanford University joins to discuss all aspects of her career, including early area selective deposition work, how her different academic appointments in chemistry and engineering have influenced the direction of her work, and how ALD can be used in energy applications. Stacey and Tyler also chat about how Stacey finds the best paths for her students, how being a professor and Vice Provost feedback to each other, and new programs she has initiated in her Vice Provost position. 

In this episode: 

00:00 Introduction 

03:45 Area Selective Work 

15:40 Chemistry & Engineering Backgrounds 

21:20 ALD for energy applications 

33:54 Stacey as an advisor 

36:19 Vice Provost position

 

The Future of Nanoimprint Lithography: Exploring Possibilities and Challenges for High-Volume Production

Nanoimprint lithography (NIL) has emerged as a promising technique for the replication of intricate nano-scale features, offering higher resolution and uniformity compared to traditional photolithography methods. As semiconductor technology advances towards smaller and more complex structures, NIL holds the potential to revolutionize high-volume production processes. In this blog post, we'll delve into the current status of nanoimprint lithography and the possibilities it presents for future high-volume productions, as well as the main issues and concerns that need to be addressed.

NIL utilizes a process where a patterned mask is brought into contact with a resist-coated substrate. The resist fills the relief patterns in the mask through capillary action, creating precise nano-scale features. With a focus on simplicity and cost-effectiveness, NIL doesn't require the complex optics found in traditional photolithography, making it an attractive option for semiconductor memory applications.

Early work on combining NIL and Atomic Layer Etching by AlixLabs Founders

AlixLabs (www.alixlabs.com)  founders and Lund Nano Lab (Lund University, Sweden) collaborated 2018 to exploit Atomic Layer Etching (ALE) for improved NIL quality and resolution. ALE involved Cl2 monoatomic layer adsorption on silicon, followed by controlled Cl2-modified silicon layer removal using argon bombardment. This precision process allowed diverse nanopatterns to be etched onto silicon wafers with electron beam lithography. The treated wafers served as robust nanoimprint stamps in a thermal process, transferring features as small as 30 nm into a poly(methyl methacrylate) layer. ALE's potential for ultrahigh-resolution nanoimprint stamp fabrication advances nanofabrication techniques significantly.

Most Recent Achievements:

Recent study by TEL and Canon have demonstrated NIL's resolution capabilities of better than 10 nm, positioning the technology as a candidate for printing multiple generations of critical memory levels using a single mask. The potential to eliminate material waste by applying resist only where necessary adds to its appeal. Moreover, the simplicity and compactness of NIL equipment allow for clustered setups, enhancing productivity.

NIL Addressing Challenges in DRAM Scaling:

Dynamic Random Access Memory (DRAM) memory faces the challenge of continued scaling, with roadmap targets aiming at half pitches of 14 nm and beyond. The complexities of achieving tighter overlays, greater precision in critical dimensions, and edge placement errors demand innovative solutions. In DRAM fabrication, overlay requirements are even more stringent than in NAND Flash, with an error budget of 15-20% of the minimum half pitch.

Edge Placement Error (EPE):

EPE, the difference between intended and printed features, poses a significant challenge in modern semiconductor manufacturing. The intricacies of multiple patterning schemes and intricate device layouts contribute to EPE's complexity. Ensuring accurate placement of features is critical for maintaining device yield and performance.

The Quasi-Atomic Layer Etch (Quasi-ALE) process

The process is a specialized etching technique employed in advanced semiconductor manufacturing, particularly in processes like Nanoimprint Lithography (NIL). Quasi-ALE combines elements of Atomic Layer Etching (ALE) and conventional etching methods to achieve precise and controlled material removal. In the context of Nanoimprint Lithography, Quasi-ALE is used to etch materials with exceptional precision, targeting nanoscale features while minimizing damage to the surrounding areas. It involves a cyclic process where alternating etching and passivation steps are applied to the substrate. Each cycle removes a controlled layer of material, ensuring highly uniform etching and minimal lateral etch. One can discribe Quasi-ALE as a more productive way of performing ALE.

The key steps of the Quasi-ALE process typically involve:

1. Etch Step: During this step, a reactive gas is introduced into the etch chamber, which chemically reacts with the material to be removed. This reaction results in the selective removal of the material layer.

2. Passivation Step: In this step, a passivating species is introduced, forming a protective layer on the substrate surface. This layer prevents further etching and preserves the material beneath.

3. Purge and Repeat: The chamber is purged to remove any excess gases, and the process is repeated in a cyclical manner. Each cycle removes a controlled atomic layer of material.

Quasi-ALE is particularly advantageous for applications requiring high precision and control, such as in Nanoimprint Lithography, where maintaining accurate pattern dimensions and minimizing damage is critical. By combining the benefits of both ALE and traditional etching, Quasi-ALE enables advanced semiconductor manufacturing processes to achieve unprecedented levels of accuracy and uniformity.

Addressing EPE with Nanoimprint Lithography:

Researchers are actively exploring techniques to mitigate edge placement errors in nanoimprint lithography. This includes focusing on overlay accuracy, critical dimension uniformity (CDU), and local CDU. Compensatory methods such as dose control and reverse tone pattern transfer are being investigated to improve CDU and minimize errors.

The Role of Dose Control:

Varying the exposure dose offers a means of achieving small shifts in critical dimensions. Initial studies suggest that dose variations could lead to CD shifts of one to 2 nm. This strategy holds promise for enhancing CDU in the imprint process.

Reverse Tone Pattern Transfer:

Reverse tone processes, involving spin-on hard mask (SOHM) application and etch-back, offer an alternative approach to pattern transfer. While this method provides advantages such as reduced resist erosion and improved wall angles, trade-offs between CDU and line width roughness (LWR) need to be addressed.

Looking Ahead: The Possibilities and Challenges:

While NIL exhibits impressive potential, there are key challenges to overcome before it can be effectively integrated into high-volume semiconductor manufacturing. Ensuring precise overlay accuracy, managing complex CDU requirements, and effectively addressing edge placement errors remain pivotal. As the industry strives to achieve the roadmap's aggressive scaling targets, the evolution of nanoimprint lithography will undoubtedly play a crucial role.

Nanoimprint lithography is poised to reshape the semiconductor manufacturing landscape, offering higher resolution and cost-efficiency compared to traditional methods. With ongoing research and development, addressing challenges such as overlay accuracy, CDU, and EPE, the path to successful high-volume production through NIL seems promising. As technology continues to advance, the journey towards perfecting nanoimprint lithography is an exciting one, holding the potential to shape the future of chip fabrication.

Tokyo Electron (TEL): 

TEL specializes in Nanoimprint Lithography (NIL) technology, offering precision equipment, advanced etching solutions, and expertise in process control. They excel in alignment, overlay correction, CDU management, and etching technology.

TEL has previously demonstrated that for sub 7  nm CMOS technology, ALE and ALD integration improves SAC and patterning processes, achieving precise CD shrinking and enhanced selectivity.

Canon: 

Canon contributes to Nanoimprint Lithography (NIL) advancement by leveraging TEL's strengths in alignment, overlay correction, CDU management, and advanced etching solutions. They integrate these capabilities with the Reverse Tone Pattern Transfer, ensuring precise pattern replication and fidelity. Canon's focus on innovation drives high-resolution, cost-effective solutions for semiconductor manufacturing.

Canon has introduced a groundbreaking solution in the field of semiconductor technology with the development of the world's first mass-production equipment called the "FPA-1200NZ2C." This innovative tool utilizes nanoimprint lithography, a cutting-edge technique that involves imprinting nanometer-scale mask patterns onto substrates. By adopting this novel approach, Canon aims to overcome the limitations of conventional miniaturization methods. The FPA-1200NZ2C is already in use by Toshiba Memory, a prominent semiconductor memory manufacturer. This advancement marks a significant step forward in semiconductor manufacturing, enabling the creation of more intricate and advanced circuit patterns.

Sources:

High-Definition Nanoimprint Stamp Fabrication by Atomic Layer Etching — Lund University

Nanoimprint post processing techniques to address edge placement error (spiedigitallibrary.org)

Nanoimprint Lithography | Canon Global

FPD Lithography Equipment | Canon Global

Benefits of atomic-level processing by quasi-ALE and ALD technique - IOPscience

www.alixlabs.com

Acknowledgement :

Thanks for sharing the SPIE article on LinkedIn and giving insights Frederick Chen!

Revolutionary Study Unveils Enhanced Uniformity and Selectivity in TiO2 Films for Nanoelectronics Manufacturing

Researchers Achieve 2× Improvement in TiO2 Film Thickness and Pattern-dependent Uniformity in 45 nm Half-pitch Patterns

In a groundbreaking study, researchers have made significant advancements in the area-selective deposition (ASD) of TiO2 films, bringing unprecedented uniformity and selectivity to nanoelectronics manufacturing. The research, led by Rachel A. Nye and her team at imec, KU Leuven, and North Carolina University, demonstrates the successful implementation of passivation + deposition + etch supercycle process in industrially relevant 45 nm half-pitch patterns.

By leveraging the unique capabilities of the DMA-TMS inhibitor, the researchers achieved remarkable results. The TiO2 atomic layer deposition (ALD) process yielded a 2× improvement in film thickness, depositing approximately 8 nm of TiO2 with 88% uniformity and 100% selectivity on SiO2/TiN line/space patterns. Moreover, the study revealed lower defectivity on pattern sidewalls, top surfaces, and corners compared to previous reports.

A key finding was pattern-dependent uniformity, emphasizing the significance of understanding and optimizing processes at specific feature scales. As feature sizes continue to shrink, the researchers anticipate further improvements in uniformity. The study also highlighted the importance of refining passivation, deposition, and etch parameters for enhanced selectivity and uniformity control.

The research opens doors to a wide range of applications for TiO2 thin films in nanoelectronics, including antireflection coatings, sensors, photocatalysts, and etch-resistant layers. The study provides valuable insights into the quantification of uniformity and selectivity in nanoscale patterns, serving as a benchmark for future advancements in nanoscale ASD. The results have significant implications for the design and fabrication of electronic devices on an industrial scale.

Source: Quantified Uniformity and Selectivity of TiO2 Films in 45‐nm Half Pitch Patterns Using Area‐Selective Deposition Supercycles - Nye - Advanced Materials Interfaces - Wiley Online Library

Call for Papers on ALD & ALE Applications, at ECS Fall Meeting / Gothenburg Oct. 2023 ►►DEADLINE EXPIRES APRIL 21◄◄

Call for Papers on ALD & ALE Applications, at ECS Fall Meeting / Gothenburg Oct. 2023 ►►DEADLINE EXPIRES APRIL 21◄◄

The Electrochemical Society (ECS) conference is an international event running every spring and fall, and gathering 2000-4000 participants and 30-40 exhibitors both from academia and industry.

The conference has a strong focus on emerging technology and applications in both electrochemistry and solid-state science & technology.

This fall the event will be held as 244^th ECS Meeting on Oct. 8-12, 2023 in Gothenburg (Sweden).

The full program as well as information on travel assistance for students can be found on https://www.electrochem.org/244.

 

The organizers of symposium G01 on “Atomic Layer Deposition & Etching Applications, 19” encourage you to submit your abstracts on the following (and closely related) topics:

 

1.   Semiconductor CMOS applications: development and integration of ALD high-k oxides and metal electrodes with conventional and high-mobility channel materials;

2.   Volatile and non-volatile memory applications: extendibility, Flash, MIM, MIS, RF capacitors, etc.;

3.   Interconnects and contacts: integration of ALD films with Cu and low-k materials;

4.   Fundamentals of ALD processing: reaction mechanisms, in-situ measurement, modeling, theory;

5.   New precursors and delivery systems;

6.   Optical and photonic applications;

7.   Coating of nanoporous materials by ALD;

8.   MLD and hybrid ALD/MLD;

9.   ALD for energy conversion applications such as fuel cells, photovoltaics, etc.;

10. ALD for energy storage applications;

11. Productivity enhancement, scale-up and commercialization of ALD equipment and processes for rigid and flexible substrates, including roll-to-roll deposition;

12. Area-selective ALD;

13. Atomic Layer Etching (‘reverse ALD’) and related topics aiming at self-limited etching, such as atomic layer cleaning, etc.

 

Abstract submission

Meeting abstracts should be submitted not later than the deadline of April 21, 2023 via the ECS website: Abstract submission instruction

 

List of invited speakers

·   Johan Swerts, (Imec, Belgium) KEYNOTE: ALD challenges and opportunities in the light of future trends in electronics

·   Stephan Wege (Plasway Technology, Germany), Reactor design for combined ALD & ALE

·   Masanobu Honda (TEL, Japan), Novel surface reactions in low-temperature plasma etching

·   Barbara Hughes, (Forge Nano, USA), Dual Coatings, Triple the Benefit; Atomic Armor for Better Battery Performance

·   Juhani Taskinen, (Applied Materials-Picosun, Finland), ALD for biomedicine

·   Alex Kozen (Univ. of Maryland, USA), ALD for improved Lithium Ion Batteries

·   Malachi Noked (Bar-Ilan Univ., Israel), ALD/MLD for batteries

·   Yong Qin (Chinese Academy of Sciences), ALD for catalysis

·   Jan Macák, (Univ. of Pardubice, Czechia), ALD on nanotubular materials and applications

·   Bora Karasulu, Univ. of Warwick, UK), Atomistic Insights into Continuous and Area-Selective ALD Processes: First-principles Simulations of the Underpinning Surface Chemistry

·   Ageeth Bol (Univ. Michigan, USA), ALD on 2D materials

·   Pieter-Jan Wyndaele (KU Leuven-imec, Belgium), Enabling high-quality dielectric passivation on Monolayer WS₂ using a sacrificial Graphene Oxide template

·   Elton Graugnard (Boise State Univ., USA), Atomic Layer Processing of MoS₂

·   Han-Bo-Ram Lee (Incheon National Univ., Korea), Area-Selective Deposition using Homometallic Precursor Inhibitors

·   Ralf Tonner (Univ. Leipzig, Germany), Ab initio approaches to area-selective deposition

·   Nick Chittock (TU Eindhoven, Netherlands), Utilizing plasmas for isotropic Atomic Layer Etching

·   Heeyeop Chae (Sungkyunkwan Univ., Korea), Plasma-enhanced Atomic Layer Etching for Metals and Dielectric Materials

·   Charles Winter (Wayne State Univ., USA), New Precursors and Processes for the Thermal ALD of Metal Thin Films

·   Anjana Devi, Ruhr Univ. Bochum, Germany), Novel precursors dedicated for Atomic Layer Processing

 

Visa and travel

For more information, see: www.electrochem.org/244/visa-travel/

In addition, Mrs. Francesca Spagnuolo at the ECS (Francesca.Spagnuolo@electrochem.org) can provide you with an official participation letter from the site of the Electrochemical Society.

 

We are looking forward to meeting you in Gothenburg !

Recent ALD news on shared on Twitter #ALDep

Area Selective ALD of Ruthenium #ALDep #ASDep https://t.co/LInkrCfXNf

— Jonas Sundqvist 🐳 (@jv3sund) November 7, 2022

TOPCon solar cell achieves 24.2% efficiency via new plasma-assisted atomic layer deposition tech from Nantong University, China#ALDep #solar #solarcell #china #photovoltaic https://t.co/VjMBvz8Ib0

— Jonas Sundqvist 🐳 (@jv3sund) November 7, 2022

Researchers at the @HelsinkiALD are developing thin films needed in new types of halide perovskite solar cells, and matching #ALDep processeshttps://t.co/JzBSalKiuN pic.twitter.com/tWv4WMAgvA

— Jonas Sundqvist 🐳 (@jv3sund) November 4, 2022

University of Erlangen demonstrate sALD of Crystalline Metal–Organic Framework Thin Films (MOFs)#ALDep #MOFs https://t.co/cUgGOWkJjl pic.twitter.com/B1l0S4qQM7

— Jonas Sundqvist 🐳 (@jv3sund) November 4, 2022

Abstract submission is now open for the AVS 23rd International Conference on Atomic Layer Deposition (#ALD2023) and the 10th International Atomic Layer Etching Workshop (#ALE2023). Deadline: Feb. 15, 2023. https://t.co/QvY8bu8KPp #ALDep #ALEtch @AVSALD https://t.co/x2MrKttxk9 pic.twitter.com/BgYxx19FHK

— AVS (@AVS_Members) November 2, 2022

AlixLabs proudly announce its Advisory Board

AlixLabs from Lund, Sweden, has developed a new, innovative method for manufacturing semiconductor components with a high degree of packing, eliminating several steps in the semiconductor manufacturing process - Atomic Layer Etch Pitch Splitting (APS)*. The method makes the components cheaper and less resource-intensive to manufacture in high-volume semiconductor wafer fabrication and can open up a new path for a more sustainable mass production of electronic products. The method also makes it possible to manufacture tiny semiconductor components accurately and efficiently with more manageable wafer fab equipment investments.

The company is pleased to announce an Advisory Board with long-term semiconductor industry and business experts and academic leadership. In a statement from Dr. Jonas Sundqvist, CEO and co-founder of AlixLabs, he said, "Our Advisory Board adds a new level of engagement with the semiconductor industry and leading research centers needed to transfer the APS technology into high volume manufacturing. Besides strategic business decisions, we must build an ecosystem around our disruptive patterning technology. With their support, we will be able to deeply engage the semiconductor ecosystem on all levels and in all supply sectors, from materials and equipment suppliers to the wafer fabs and recognized R&D labs and institutes in this amazing industry".

Lita Shon-Roy – President/CEO and Founder of TECHCET—has worked throughout the semiconductor supply chain, leading strategy, business development, marketing, and sales for chip designers, equipment OEMs, and material suppliers for over 30 years. Her experience spans from process development of SRAMs to business development of gases & precursors. She developed new business opportunities for companies such as RASIRC/Matheson Gases, Air Products & Chemicals, and IPEC/Speedfam, and managed marketing and sales in companies such as Air Products/Schumacher, Brooktree/Rockwell, and Hughes Aircraft. Ms. Shon-Roy is considered one of the leading experts in electronic materials market analysis and business development. She has authored and co-authored 100’s of articles, reports, and texts on semiconductor process materials markets, trends, and worldwide supply chain issues. She holds an Masters Business Administration (MBA) from California State University, Dominguez Hills, a Master of Science (MS) in Electrical Engineering with a specialty in Solid State Physics from the University of Southern California, and a Bachelor of Science (BS) in Chemical Engineering from UC San Diego.

Prof. dr. Fred Roozeboom is emeritus/guest professor in the Inorganic Membranes group at the University of Twente and consultant to the high-tech industry. From 2007 until Dec. 2021 he was a part-time, full professor at TU Eindhoven in the group Plasma & Materials Processing, and from 2009-2021 he was Senior Technical Advisor at TNO Holst Centre, Eindhoven, aiming at new applications in Atomic Layer Deposition and Etching, area-selective ALD, Li-ion micro-batteries, and EUV optical lifetime. From Sept. 2021 - Sept. 2022 he was a Research Fellow at LionVolt, a start-up, working on pilot line production of 3D thin-film Li-batteries on metal foil. Fred is co-/author of >200 publications (h-index 42), 5 book chapters, 39 granted US patents, co-/editor of 51 conference proceedings on semiconductor & microsystems processing, and executive

editor of open access journal Atomic Layer Deposition. He was or is active in conference committees for the Materials Research Society, Electrochemical Society, American Vacuum Society, IEEE, DPS-Japan, and SEMI Europe Semiconductor Technology Programs Committee.

Dr Jacques Kools has over 35 years of experience in nanotechnology R&D, focusing on capital equipment and process for vacuum etch and deposition processes. He started his career at Philips Research, Eindhoven, The Netherlands, working on reactive ion beam and laser etch processes and magnetic materials. He worked in various roles in the semiconductor equipment industry in Silicon Valley, most recently as Vice President of Technology and Director of Strategic Marketing at Veeco Instruments (NASDAQ: VECO). His current position is CEO and founder of Encapsulix, a supplier of Atomic Layer Deposition ( ALD) equipment and process technology. Dr. Kools holds a Ph.D. from the Eindhoven University of Technology. He has published extensively with more than 100 refereed papers, including more than 10 invited reviews and more than 20 US patents (h index of 30 and i10 index of 60).

3D Printing by ALD with Atlant 3D's Maksym Plakhotnyuk - ALD Stories

Episode 16 features Dr. Maksym Plakhotnyuk, the CEO and Founder of Atlant 3D Nanosystems. Atlant 3D produces the world's first reactor for direct writing of ALD - the ultimate area-selective ALD process. Their Nanofabricator tool will could be the enabling technology for on-demand printing of microelectronics. In this episode, Maksym tells Tyler about the company's origins, their deal with NASA to create a 0G ALD reactor and Maksym's own history as an entrepreneur. 

In this episode: 00:00 Introduction 01:53 Maksym's Background & Atlant 3D Roots 19:03 Atlant 3D Name Origins 22:00 Atlant 3D Microreactor 36:28 NASA Deal and 0G Reactor 

Follow Maksym and Atlant 3D on Twitter: @MPlakhotnyuk & @Atlant3d 

Check out the technology at www.atlant3d.com

Resolving the Heat of Trimethylaluminum and Water Atomic Layer Deposition Half-Reactions

Here is a new way that I have not seen before how to monitor the half-reactions in ALD by using The pyroelectric thin-film calorimeter. It offers submillisecond temporal resolution and resolves precursor delivery and reaction kinetics. Thank you, Riikka, for sharing on Twitter.

 

Resolving the Heat of Trimethylaluminum and Water Atomic Layer Deposition Half-Reactions

Ashley R. Bielinski, Ethan P. Kamphaus, Lei Cheng, and Alex B.F. Martinson*
J. Am. Chem. Soc. 2022, 144, 33, 15203–15210
Publication Date:August 9, 2022
https://doi.org/10.1021/jacs.2c05460

Atomic layer deposition (ALD) is a surface synthesis technique that is characterized by self-limiting reactions between gas-phase precursors and a solid substrate. Although ALD processes have been demonstrated that span the periodic table, a greater understanding of the surface chemistry that affords ALD is necessary to enable greater precision, including area- and site-selective growth. We offer new insight into the thermodynamics and kinetics of the trimethylaluminum (TMA) and H2O ALD half-reactions with calibrated and time-resolved in situ pyroelectric calorimetry. The half-reactions produce 3.46 and 2.76 eV/Al heat, respectively, which is greater than the heat predicted by computational models based on crystalline Al2O3 substrates and closely aligned with the heat predicted by standard heats of formation. The pyroelectric thin-film calorimeter offers submillisecond temporal resolution that uniquely and clearly resolves precursor delivery and reaction kinetics. Both half-reactions are observed to exhibit multiple kinetic rates, with average TMA half-reaction rates at least 2 orders of magnitude faster than the H2O half-reaction kinetics. Comparing the experimental heat with published computational literature and additional first-principles modeling highlights the need to refine our models and mechanistic understanding of even the most ubiquitous ALD reactions.

Webinar Atonarp’s Aston in-situ metrology solution for Spatial ALD

 

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Can’t attend the live webcast?  Register and we will send you a link to watch the recording at your convenience.

Overview:   Spatial ALD is emerging as a critical technology for the deposition of thin films for advanced memory and logic selective processing found in gate-all-around FETs, high aspect ratio contacts, DRAM capacitors, advanced NVM technology, and even self-aligned double patterning (SADP) lithography.  It has the promise of high throughput, highly conformal thin films using low temperature and low or no vacuum processing chambers.  However spatial ALD has challenges, gas mixing, platform rotation speed optimization, optimized gas purge flow, the variable concentration of reactant gases and safety considerations are some of the issues process engineers are working to optimize.  Atonarp’s Aston in-situ metrology solution will be reviewed and its key differentiations, being used by several spatial ALD OEMs to address these challenges, will be discussed. What you’ll learn: Spatial ALD advantages and challenges   Why speed with sensitivity and robustness matter in Spatial ALD metrology solutions   Aston Impact and Plasma metrology solutions and differentiation that is leading them to be used as key in-situ process control metrology in spatial ALD applications

ALD/CVD Precursor Markets – Burgeoning Applications

Advanced Logic and Memory Applications require more deposition materials.

San Diego, CA, June 27, 2022: TECHCET—the electronic materials advisory firm providing business and technology information— reports that the Total ALD/CVD precursor market grew 21% in 2021, reaching US$1.39 billion and is forecasted to grow 12% in 2022. The 2022 Precursor market will top US$1.56 billion due to strong industry growth overall, driven by higher production volumes of < 7nm logic devices and higher increased stacking and layers in 3DNAND devices. The transition to EUV lithography for DRAM fabrication will also result in opportunities for increased precursor revenues. More details on these market trends will be revelaed in TECHCET’s presentation given at the 2022 ALD Conference, starting this week in Ghent, Belgium, by Jonas Sundqvist, Ph.D., or can be found in TECHCET’s newly released Critical Materials Reports™ on ALD/CVD Metal Precursors and Dielectric Precursors.

“ALD and CVD are a materials and chemistry rich industry segment with major development efforts in place, with strong prospects for growth, and for the need of new materials”, states Jonas Sundqvist, Sr. Technology Analyst at TECHCET. “New manufacturing solutions designed to meet both cost and performance will rely on ALD precursor materials.”

New materials and related process technologies are being driven by changes in device design. For advanced logic, new precursors are required for transistors to form high-κ gate dielectrics, metal gate electrodes, strain/stress epi of the channel and channel materials. DRAM memory cells continue pushing for higher-κ capacitors. And advanced devices, especially logic, demand improved interconnect wiring, barriers, seed layers, selective via capping and encapsulation, insulators, as well as new and/or more dielectrics to support EUV and advanced ArFi photolithography.

Emerging challenges persist as a result of continued dimensional scaling addressed with materials, especially new materials deposited by ALD. Area selective deposition has been a trend in the past 5 years with a growing R&D community to implement this approach in future devices.

For device specific details on the ALD/CVD Precursor markets & segments get TECHCET’s newly released Critical Materials Report™ here: https://techcet.com/product-category/ald-cvd-precursors/