Reuters: Samsung Electronics builds sixth domestic contract chip-making line

Samsung breaks the ground for building its 6th domestic production line in Pyeongtaek city to expand its 5 nm chip-production capacity, using EUV technology: Samsung has planned to expand its production of logic chips for mobile phones and computers as it looks to cut reliance on the volatile memory chip sector. The new production line is targeted to be operational by 2H21. Last year, Samsung announced to invest 133 trillion won ($107.97 billion) in non-memory chips through 2030, comprising 73 trillion won for domestic R&D and 60 trillion won for production infrastructure.

Source: Reuters LINK

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By Abhishekkumar Thakur

PALD2020 Sundqvist - Roating Drum ALD and LPCVD

The Americans forgot that we have a holiday today and in Germany celebrate something called Männertag (see link below). For all you Europeans that may have fallen asleep after midnight or Germans that had one too many beers - here my presentation upfront at the PALD Summit:

Twitter Movies

Roatating test

https://twitter.com/ald_lab/status/874195674325233664

TiN ALD post deposition:

https://twitter.com/ald_lab/status/874195884455714817

TiN CVD post deposition:

https://twitter.com/ald_lab/status/874196344545714176

Roll-to-roll ALD for lithium-ion batteries by Beneq R2R

In this talk with Dr. Tommi Kääriäinen of Beneq they discuss how ALD can help solve performance and safety issues for ever-evolving lithium-ion battery products. Specifically they compare roll-to-roll ALD, a tool design pioneered by Beneq, with particle ALD technology.

Don´t miss to register and tune in to Forge Nanos PALD Summit today!

LINK: https://www.forgenano.com/pald-summit/

Hafnium, Zirconium: Australian Strategic Materials a step closer to completing commercial pilot plan

Recent semiconductor materials related trade issues between Japan and South Korea have led South Korea to secure alternative sourcing of photoresists and metals for their semiconductor industry. This includes essential minerals for hafnium and zirconium ALD precursors that are used in the manufacturing of DRAM and Foundry logic at SK Hynix and Samsung fabs.

Besides the tension with Japan, China's dominance in the supply of zirconium chemicals and materials has highlighted the additional risk in the critical materials supply change for its important semiconductor and high tech industries.

One such action has been setting up a pilot plant in South Korea for hafnium and zirconium metal in joint development with Australias Alkane and its subsidiary Australian Strategic Materials (ASM). The joint undertaking has now moved to the next phase for a commercial operation of a pilot plant as reported by Alkaine below.

Australian Strategic Materials a step closer to completing commercial pilot plan

Australian Strategic Materials (ASM), a wholly owned subsidiary of Alkane Resources is getting closer to completing the construction of a commercial pilot plant facility in South Korea that will enable critical metal oxides, including zirconium and hafnium, to be converted into metals in clean, carbon-free way.

As the Covid-19 pandemic continues to highlight weaknesses in critical minerals supply chains globally, ASM has confirmed in Alkane Resources' quarterly recently it has received interest in both potential future supply and partnership from a number of parties in South Korea and elsewhere. ...

Read more.

Read more about previous blog about the Alkane Dubbo project in New South Wales, Austrailia:

The Dubbo Project - The High-k mine in Dubbo, NSW Australia

Hafnium product breakthrough consolidates Dubbo Project business case

China’s water crisis stems the flow of zirconium and rare earths for global industries

Alkane Resources reports that zirconium oxychloride (ZOC) prices are up 40% since January 2017

SEMICON West will be a virtual event July 20-23

The microelectronics annual conference, and the flagship event for the semiconductor industry, was due to be held at the Moscone Center, San Francisco, California, but due to the coronavirus (Covid-19) pandemic it has now moved to a virtual format.

Visitors will hear from, and interact with, visionaries and executives from across the microelectronics supply chain and its markets.
Presentations will feature emerging applications that demand the industry’s design and manufacturing expertise. Virtual exhibit booths throughout the detailed, interactive exhibit hall provide the opportunity to network and gather insights just like on a physical show floor.
Attendees can stop by SMART technology pavilions and exhibitors’ booths to view video content, download informative product information, and converse with supplier representatives.
“This will be the deepest, most extensive online global industry event this year,” said David Anderson, President of SEMI Americas and host for the gathering.
“As a virtual conference, SEMICON West 2020 allows us to offer our customers – large and small – A-list speakers and a full exhibition experience, with all the content, interactions and networking opportunities of a physical show – without the associated costs and time of travel.”
Attendees can also join technical sessions, participate in one-on-one or group meetings, and interact with colleagues and industry representatives in networking areas.
Registration opens May 18, 2020; a notification form and detailed information on the event are available at www.semiconwest.org.

ACM Research Enters Dry Processing Market with Launch of CVD/ALD Ultra Furnace

• ACM’s First Furnace Product Targets LPCVD Initially, Oxidation, Annealing and ALD in Future
• ACM Research intends to target customers in China initially, before expanding the offering of the Ultra Furnace into Korea and Taiwan later.
• ACM delivered the first Ultra Furnace tool to a key logic customer’s manufacturing facility in China in early 2020. This tool targets LPCVD, and has been installed in a production environment to begin qualification.

FREMONT, Calif., April 28, 2020 (GLOBE NEWSWIRE) -- ACM Research, Inc. (“ACM” or the “Company”) (NASDAQ:ACMR), a leading supplier of wafer cleaning technologies for advanced semiconductor devices, today unveiled the Ultra Furnace, its first system developed for multiple dry processing applications. Initially optimized to deliver high performance for low-pressure chemical vapor deposition (LPCVD), the Ultra Furnace also leverages the same platform to be used for oxidation and annealing processes, as well as for atomic layer deposition (ALD). This achievement represents a two-year collaboration between ACM’s R&D teams located in China and Korea.

“Advanced technology nodes present ongoing challenges that require innovation from the capital equipment suppliers. This demanding environment provides significant opportunities for ACM,” explained Dr. David Wang, CEO of ACM Research. “Continuous innovation is in our DNA. We saw a market need that could benefit from our technology, and expanded our reach into a new market segment. The addition of the Ultra Furnace to ACM’s established portfolio of wet processing tools, expands our opportunity by providing an integrated solution to our customers’ advanced products.”

“The Ultra Furnace product is the result of collaboration between our talented experts in China and Korea to develop differentiated technology,” stated YY Kim, CEO of ACM Research Korea. “ACM’s team in Korea was established to complement the talents of our world-class Shanghai team, accelerate our time to market, and provide outstanding technical support to our local customers.”

Deposition processes utilize process gases at a high temperature to react with each other on a silicon wafer, forming a silicon oxide or nitride layer on the wafers. The Ultra Furnace system is intended for batch processing of up to 100 12-inch (300mm) wafers. The innovative system design combines newly developed hardware that improves durability, with the company’s proven software technology and a proprietary control system and algorithm. This enables the tool to provide stable control of pressure, gas flow rate and temperature.

While the Ultra Furnace system targets LPCVD processes, with a few changes to the components and layout, each tool can address other target applications. About 85 percent of the hardware configuration remains unchanged, so the alterations for the new application can be achieved efficiently.

ACM Research intends to target customers in China initially, before expanding the offering of the Ultra Furnace into Korea and Taiwan later. ACM delivered the first Ultra Furnace tool to a key logic customer’s manufacturing facility in China in early 2020. This tool targets LPCVD, and has been installed in a production environment to begin qualification.

Pro­fessor Mikko Ritala, in­ventor of ex­traordin­ary coat­ings, awar­ded a prize

The Magnus Ehrnrooth Foundation’s Award in Chemistry in 2020 has been granted to Professor Mikko Ritala, who heads the atomic layer deposition research group at the University of Helsinki.

Mikko Ritala belongs to the most elite level in chemistry in Finland, ranking among the most cited chemists in the country, states the Magnus Ehrnrooth Foundation, an organisation that promotes scientific research in mathematical fields, in its award justification. In recent years, Professor Ritala has been particularly active in developing novel nanostructured materials by employing the method of atomic layer deposition (ALD). The award, worth €20,000, was granted on 29 April 2020, but the ceremony organised by the Finnish Society of Sciences and Letters will be postponed to the autumn.

Another award was bestowed earlier in the year, as Mikko Ritala was granted the ALD 2020 Innovator Award “For Original Work and Leadership in ALD”, a distinguished recognition awarded by the international ALD researcher community.

Ritala, who has been serving as professor of inorganic materials chemistry at the University of Helsinki from 2003, was born in Nokia and currently lives in Espoo. Most of the time he commutes to Kumpula Campus by bicycle. Ritala has played basketball on all league levels, currently representing the team Leppävaaran Pyrintö Faijat in the fourth division. The season interrupted by the corona virus was already 43rd in a row.

LINK to full press release: LINK

Prof. Mikko Ritala

High-index-contrast gratings for III-nitride vertical-cavity surface-emitting laser diodes

Semiconductor Today reports that researchers based in Taiwan and Sweden claim the first demonstration of high-index-contrast grating (HCG) as the top mirror for III-nitride (III-N) vertical-cavity surface-emitting laser (VCSEL) diodes [Tsu-Chi Chang et al, ACS Photonics, published online 26 February 2020]. The team from National Chiao Tung University and Chalmers University of Technology hope that the development will lead to “substantial thickness reduction, polarization-pinning, and setting of the resonance wavelength by the grating parameters”.

Please follow the link below to find out where ALD was used ;-)

Article: High-index-contrast gratings for III-nitride vertical-cavity surface-emitting laser diodes (LINK)

Picture from graphical abstract, ACS Photonics 2020, 7, 4, 861-866 Publication Date:February 26, 2020

https://doi.org/10.1021/acsphotonics.9b01636

IBM has adopted 14 nm FD-SOI FinFET with an ALD deep trench capacitor as eDRAM for its Power9 Processor

EET Asia reports that IBM has adopted 14 nm FD-SOI FinFET combined with a deep trench capacitor for eDRAM L3 cache memory for its Power9 Processors. Thes enables an ultra-dense eDRAM cell array and reportedly IBM is aiming to scale down the next-generation Power10 to 10 nm or even 7 nm for more performance improvement and latency reduction.

Some of the goodiesfabed at Globalfoundries (14HP FD-SOI, I am assuming Fab Malta NY, USA) include:

• 3rd HKMG eDRAM
• 1st FinFET eDRAM with RMG
• 4th Deep Trench Capacitor (DTC) eDRAM
• 0174 µm2 SOI DRAM bit cell with 8F2
• DTC eDRAM cell capacitance (estimated) ~8.1 fF/cell with ULK HfO/SiON high-k dielectrics and DTC depth 3.5 µm
• DTC process for both cell capacitors and decoupling capacitors
• Dual epitaxial layers for eSiC (eDRAM cell word lines and NMOS gates) and eSiGe (PMOS Gates)
• 17 metal levels in total (excluding Al UBM connection layer)
• 64 nm 1X M1 through M5 pitch, 2X M6 through M9, and 4X M10 and M11
• ULK dielectrics for M1 through M9 ILDs, while LK ILDs for M10 through M15

So this is a pretty cool chip using a HfO2 ALD dielctric twice, and I am assuming that the high aspect ration deep rench capacitors is done using a MO-Hf precursor like TEMHf or similar and the HKMG FinFET high-k in a standar ASM Pulsar 3000 chamber using HfCl4. Then the metal electrodes for the DRAM capacitors ar TiN using Batch ALD or pulsed CVD process mode. COuld also be TEL Trias SFD-style process like Qimonda (R.I.P.) would have done it. As for the Metal Gates for the FinFET also ALD based as commonly done in the foundry industry.

Please finde here the link to the article presents a summary of an analysis performed by TechInsights on the IBM 14HP HKMG FD-SOI FinFET eDRAM cell architecture, process, and design recently used in the IBM Power9 processor.

LINK

DT capaciror (Wikichip)

Picosun patents counterfeiting use for ALD coating tech

[Securing Industry, LINK] Finland’s Picosun Oy has been awarded a US patent on a coating technology that it says could become a potent tool in the anti-counterfeit armamentarium.

The company is a pioneer of a coating technique known as atomic layer deposition (ALD) that was invented by Finnish scientist Dr Tuomo Suntola, a board member and one of the owners of Picosun, back in the 1970s. ALD involves depositing alternating monolayers of two or more elements such as metal oxides onto surface, forming a crystal structure, and allows the thickness of the resulting film to be precisely controlled.

It’s already widely used in applications like producing transistors in silicon chips, manufacturing LEDs, and protective layers on high-value goods like luxury watches, but until recently hadn’t been explored extensively for its anti-counterfeit potential.

The new patent (No. 10,600,058) covers the use of ALD to introduce an identifiable signature or code on the film coating a product, such as an integrated circuit, using layers of different predetermined thicknesses that can be detected using a suitable reader device.

The abstract of the patent appears below:

Anti-counterfeit signature

Abstract: A method for applying an anti-counterfeit signature on a product, and an anti-counterfeit signature. The method includes selecting a substrate and a type of signature and forming a signature of the selected type on the substrate with atomic layer deposition, ALD, wherein forming the signature includes applying at least one layer having a predetermined property configured to be detected with an analysis method on the substrate by atomic layer deposition, ALD.

US Patent No. 10,600,058 (LINK)