Tuning the nanopore diameter using ALD

Working on deep deep nano holes and tubes for a long time (DRAM) and for a lab growing nanowires I found this an interesting paper on how ALD can be used to tune the nanopore diameter. Nanopore (NP) technologies have been researched the last 10 years or so. According to the paper "The next major breakthrough" of this technology will depend on :

• the fundamental understanding of the dynamical processes that govern macromolecules translocation through NP
• the availability of methods that allow routine fabrication of nanoscale materials. 

Particles, holes, tubes, wires, pores, ..., transistors etc. - what else could you do nano?

Influence of nanopore surface charge and magnesium ion on polyadenosine translocation

Mathilde Lepoitevin, Pierre Eugène Coulon, Mikhael Bechelany, Julien Cambedouzou, Jean-Marc Janot and Sebastien Balme
Mathilde Lepoitevin et al 2015 Nanotechnology 26 144001
doi:10.1088/0957-4484/26/14/144001

We investigate the influence of a nanopore surface state and the addition of Mg2+ on poly-adenosine translocation. To do so, two kinds of nanopores with a low aspect ratio (diameter ~3–5 nm, length 30 nm) were tailored: the first one with a negative charge surface and the second one uncharged. It was shown that the velocity and the energy barrier strongly depend on the nanopore surface. Typically if the nanopore and polyA exhibit a similar charge, the macromolecule velocity increases and its global energy barrier of entrance in the nanopore decreases, as opposed to the non-charged nanopore. Moreover, the addition of a divalent chelating cation induces an increase of energy barrier of entrance, as expected. However, for a negative nanopore, this effect is counterbalanced by the inversion of the surface charge induced by the adsorption of divalent cations.

Cartoon to illustrate polyA translocation through NP and the electrolyte distribution. (a) Native -NP at NaCl 150 mM (b) native-NP at NaCl 500 mM and (c) TMS-NP at NaCl 150 mM.

Check out The Nanopore Site!

 

 

UPDATED - Workshop on Fundamentals of ALD - June 8 & 9, Eindhoven

Cost Action "HERALD" workshop on Fundamentals of ALD - June 8 & 9, Eindhoven

Organized by Erwin Kessels Professor in Applied Physics at Eindhoven University of Technology. June 8 (start at noon) to June 9 (end mid-afternoon). Please see http://www.nanomanufacturing.nl/

"The aim of the workshop is to spark a discussion about current topics in the field of atomic layer deposition (ALD) by addressing fundamental aspects of the method. It is expected that this discussion will lead to new and refined insights beneficial to further advance the field of ALD. The aim is to serve both scientists who work at the forefront of ALD research as well as newcomers and technologists who want to get a better understanding of ALD."

"Consistent with the aim of the event, this will be a "true" workshop in which participants are encouraged to actively take part in the presentations and discussions. During the workshop, 5 current topics within the field of ALD will be covered with ample time and opportunity for discussion and interaction. Each topic will be introduced by speaker who is an authority in the field. In the introduction, basic aspects will be presented such that non-experts can take part in the discussion while the leading edge of the current understanding will also be presented. Afterwards, a specific case will be addressed in more detail by a researcher who has studied an aspect of the specific topic in depth. This will be followed by presentations from the participants and an open discussion."

Nanomanufacturing: ALD FUNdamentals nanomanufacturing.nl Dates: June 8 & 9 Location: Eindhoven, NL The aim of the workshop is to spark a discussion about current topics in the field of atomic layer deposition (ALD) by addressing fundamental aspects of the method. It is expected that this discussion.

Speakers:

• Dr. Chaitanya Ande (Eindhoven University of Technology, NL)
• Ir. Roger Bosch (Eindhoven University of Technology, NL)
• Prof. dr. ir. Erwin Kessels (Eindhoven University of Technology, NL)
• Dr. ir. Harm Knoops (Oxford Instruments, NL)
• Dr. ir. Adrie Mackus (Stanford University, USA)
• Dr. Paul Poodt (Holst Centre / TNO, NL)
• Dr. Stephen Potts (Queen Mary University of London, UK)
• Ir. Vincent Vandalon (Eindhoven University of Technology, NL)
• Angel Yanguas-Gil, PhD (Argonne National Laboratory & Northwestern University, USA)
• ...

Discussion Leaders

• Low temperature ALD – Suvi Haukka (ASM Microchemistry)
• ALD of nitrides– Riikka Puurunen (VTT Technical Research Centre of Finland)
• ALD of metals – Simon Rushworth (EpiValence)
• ALD of multi-element oxides – Chris Hodson (Oxford Instruments Plasma Technology)
• Spatial ALD vs Temporal ALD – Dennis Hausmann (Lam Research)

Program

Important dates

• March 27 - Workshop Announcement
• April 20 - Detailed program announced
• May 1 Deadline for requesting travel support
• May 29 - Submission deadline for short presentations
• May 29 - Deadline for registration
• June 8 & 9 - Workshop!

Topics

The following topics will be addressed during the workshop:

• Low temperature ALD: what's limiting?
• ALD of nitrides: opportunities for plasmas?
• ALD of metals: what about films or nanoparticles?
• ALD of multi-element oxides: Is 1+1 equal to 2?
• Spatial ALD vs Temporal ALD: What's different?

Available soon: Click on the topics for a more detailed description and submission guidelines on how to contribute to the session.

How to participate?

You can participate actively in the session about low-temperature ALD by giving a short presentation or a pitch after the two presentations that are already scheduled. Please submit a short presentation clearly describing the observation, issue or open question that you would like to discuss to contact@nanomanufacturing.nl. We would like to receive your presentation before the 29th of May, which will allow sufficient time for us to evaluate your contribution. You might receive suggestions from the session coordinators to fit it in better in the session.

If your short-talk is accepted, you can chose to bring a poster in addition to giving the short talk. The poster will receive attention during the breaks and during lunch. The poster will allow you to present more background information and interesting findings which cannot be discussed during the sessions due to time constraints.

Erwin Kessels ‏@ErwinKessels  10. Juni

Too many good questions and discussions to tweet during the ALD Fundamentals workshop. It was a lot of #ALDep FUN!

Stanford GaAs process could yield better solar cells, faster chips

New Stanford manufacturing process could yield better solar cells, faster chips
Silicon isn't the only chip-making material under the sun, just the cheapest. But a new process could make the alternative material, gallium arsenide, more cost effective.

Silicon is typically used in solar cells and computer chips. Gallium arsenide is an alternative material with many advantages. But it costs too much. A new process would reduce manufacturing costs.

"Solar cells that use gallium arsenide hold the record when it comes to the efficiency at which they convert sunlight into electricity," said Bruce Clemens, the professor of materials science and engineering who led this work.

"Once it becomes possible to make gallium arsenide more cost-effectively, other people will jump in to improve other parts of the process,'' Clemens said. "And with each advance, more uses will open up, especially in solar energy generation where gallium arsenide has clear efficiency advantages."

Micron and Intel Unveils 3D NAND

Micron and Intel Unveils 3D NAND : The World’s Highest-Capacity NAND Flash Memory

"The interdependent, growing demands of mobile computing and data centers continue to drive the need for high-capacity, high-performance NAND flash technology. With planar NAND nearing its practical scaling limits, delivering to those requirements has become more difficult with each generation. Enter our new 3D NAND technology, which uses an innovative process architecture to provide 3X the capacity of planar NAND technologies while providing better performance and reliability."

3 times the capacity of existing NAND products—enough to enable 3.5TB gum stick-sized SSDs or more than 10TB in standard 2.5-inch SSDs.

 

Nanoplas’ atomic-layer downstream etching (ALDE) technology explained

 

Nanoplas’ atomic-layer downstream etching (ALDE) technology enables a new class of plasma-based etching and stripping processes that may be used at the 14nm technology node and beyond. Here is a new video that was released recently explaining the technology:

LAM Research - Multiple Patterning Makes Miniaturization Possible

Here is a great blog on Multiple Patterning by LAM Research that explains it all in a straight forward way. The main technologies are pictured below - check ot the blog for details.

 

"Today’s advanced chip designs have smaller and more dense features than can be created using available lithography capability. Fortunately, advanced patterning techniques have been devised to work around these limitations by using multiple patterns of larger dimensions to obtain smaller and/or more tightly packed features."

(1) Convential (Single) Patterning

 

In conventional lithography, a wafer is coated with a light-sensitive material called photoresist. Light is then streamed through a photomask (a pattern of transparent and opaque areas), exposing the photoresist in some places, but not in others. The exposed regions are then etched away, while covered areas remain protected (in the case of positive photoresist). The end result is a set of features whose size and density are determined by the original photoresist pattern.

(2) Double Patterning 

 

One of the most widely adopted double patterning schemes is double exposure/double etch, also known as litho-etch-litho-etch, or LELE.

(3) The Self-Aligned Spacer Technique - Self-Aligned Double Patterning (SADP)

 

Examples of self-aligned double patterning (SADP) applications include formation of fins in FinFET technology, lines and spaces for interconnect levels, and bitline/wordline features in memory devices

(4) Multiple Patterning - Self-Aligned Quadruple Patterning (SAQP)

Self-aligned quadruple patterning (SAQP) can achieve a half-pitch resolution of ~10 nm

Check out this awesome video to understand Atomic Layer Deposition (ALD) and Atomic Layer Etching (ALE), which are two very important processes for driving nano-patterning and scaling further down to below 10 nm.

Picosun and NCTU Launch Industrial ALD Facility in Taiwan

National Chiao Tung University (NCTU), Taiwan, and Picosun Oy, the leading provider of high quality Atomic Layer Deposition (ALD) solutions for global industries, establish a Joint Industrial ALD Research Laboratory at the premises of X-Photonics Interdisciplinary Center at NCTU to enable the next generation of micro- and optoelectronics using ALD technology.

With this collaboration NCTU and Picosun will develop a wide range of interdisciplinary technology solutions for applications such as microelectronic devices for: 

 

• 7 nm technology node
• high-brightness light emitting diodes (HBLED)
• high electron mobility transistors (HEMT)

 

Both fundamental research and advanced device fabrication for industrial applications will be the core objectives of the Joint Industrial ALD Research Laboratory.

"It's obvious that Picosun, with their world-leading experience in ALD system design and process knowhow, has been chosen as our ALD technology provider. We are happy and excited to start this collaboration to realize a whole new generation of micro- and optoelectronic products. Based on the energy of NCTU in the semiconductor field, I think we will achieve lots of success in the near future," summarizes Professor Hao-Chung Kuo, Associate VP of NCTU, and both IEEE and OSA fellow.

"Taiwan is one of the world's leading semiconductor manufacturing hubs. Picosun's state-of-the-art ALD technology is a key enabler for advanced micro- and optoelectronics fabrication. Establishing a partnership and a joint research laboratory with NCTU will provide our existing and future industry customers not only local access to our technology for their applications, but also stronger collaboration ties for future generation products enabled by our ALD technology. This is further supported by our newest subsidiary, Picosun Taiwan, which was established two months ago," states Dr. Wei-Min Li, CEO of Picosun Asia and Applications Director of Picosun Group.

Picosun provides the most advanced ALD thin film technology and enables the industrial leap into the future by novel, cutting-edge coating solutions, with four decades of continuous expertise in the field. Today, PICOSUN™ ALD systems are in daily production use in numerous major industries around the world. Picosun is based in Finland, with subsidiaries in USA, China, Taiwan, and Singapore, and a world-wide sales and support network.