Ferroelectric Field Effect Transistors (FeFETs) Bring Promise And Challenges

It is truly amazing to see the progress of FMC in Dresden and the recent drive in the semiconductor industry for Ferro FETs. Continuously you read about involvement from many of the big names in the industry. Here is a very good overview of the current status written by Bryon Moyer at Semiengineering.

[Article in Semiengineering]: Ferroelectric FETs (FeFETs) and memory (FeRAM) are generating high levels of interest in the research community. Based on a physical mechanism that hasn’t yet been commercially exploited, they join the other interesting new physics ideas that are in various stages of commercialization.

“FeRAM is very promising, but it’s like all promising memory technologies — it takes a while to get beyond promising,” said Rob Aitken, fellow and director of technology on the research team at Arm. “It has the potential to have better benefits than the other new non-volatile memory (NVM) technologies that are on the table today.”

Ferroelectric behaviors are opening up opportunities for non-volatile memory, combined logic/memory functions, and neuromorphic modeling. While it’s still early days for the technology, developers are cautiously optimistic about its future.

Source/Full version: LINK

CEO interview: FMC’s Pourkeramati on roadmaps, turning away investors
https://www.eenewsanalog.com/news/ceo-interview-fmcs-pourkeramati-roadmaps-turning-away-investors

The annealing and zirconium quantity have a strong impact on the crystal arrangement. Source: FMC

Dresden Memory Startup To Debut At Semicon Europa

EETimes reports : A startup company that is working on a ferroelectric non-volatile memory technology based on hafnium oxide is set to make its debut at the Semicon Europa exhibition taking place in Dresden, Germany, October 6 to 8.

The company is in the process of being spun out from the nano- and micro- laboratory (NaMLab) at the Technical University of Dresden. It is currently listed as The Ferroelectric Memory Company (FMC) although CEO Stefan Mueller told EE Times Europe said that the name may change during the formal company creation and registration process.

The company is the product of work at NaMLab on the ferroelectric effect in thin films of silicon-doped hafnium dioxide. That work was, in turn, based on a discovery made in research at now defunct DRAM manufacturer Qimonda in 2007 by Tim Boeske that hafnium dioxide, if prepared in the right way could be made to demonstrate a ferroelectric effect. Hafnium oxide is well known as an insulator material used for high-k metal-gate (HKMG) transistor structures. 

TEM of FeFET processed in 28 nm high-k metal gate CMOS Technology (left) and 2D TCAD-model for device simulation (right). (Picture from NaMLab)

FMC has been formed by NaMLab to commercialize the work and has taken over a publicly-funded program that will provide €500,000 (about $565,000) to cover development over the period April 2015 to September 2016. Meanwhile the small group of engineers that have formed the company are looking for early-stage investment and potential partners, Mueller said.

Full story at EETimes : http://www.eetimes.com/document.asp?doc_id=1327699&page_number=1

Earlier blog posts : http://baldengineering.blogspot.de/2015/07/the-ferroelectric-memory-company-fcm.html

Ferroelectric HfO2 by ALD Key Breakthrough in ITRS “Beyond CMOS” Update 2015

Following the ITRS Summer Meeting, Palo Alto, CA, July 11-12, 2015 Ferroelectric HfO2 by Fraunofer CNT and NaMLab in Dresden Germany is showcased as a "Key Breakthrough" in the ITRS “Beyond CMOS” Update 2015. You can find this presentation in by ITRS Emerging Research Devices (ERD) amongst others in the excellent new ITRS 2.0 website : http://www.itrs2.net/

The Ferroelectric Memory Company - FCM from Dresden

The FeFET is a long-term contender for an ultra-fast, low-power and non-volatile memory technology. In these devices the information is stored as a polarization state of the gate dielectric and can be read non-destructively as a shift of the threshold voltage. The advantage of a FeFET memory compared to the Flash memory is its faster access times, much lower power consumption at high data rates, and the easy integration of the device with common high-k metal gate transistors in complementary metal-oxide-semiconductor (CMOS) technology. 

The basics of the idea of a were already laid in the early 2000s in the research department of the memory manufacturer Qimonda. The discovery of ferroelectricity in doped hafnium led there to the registration of several basic patents, which went to NaMLab gGmbH after the Qimonda insolvency.  

 

In 2013 the proof of principle of a hafnium based ferroelectric field effect transistor (FeFET) memory cell on 28nm technology platform was manufactured at Globalfoundries Fab1 and Fraunhofer CNT in Dresden. There is a hope that the successful commercialization of such an embedded NVM memory technology could have disruptive character.

During the last years the electrical properties of ferroelectric transistors were studied in detail. In the framework of a project together with GLOBALFOUNDRIES and Fraunhofer CNT, which was funded by the Free State of Saxony, silicon doped HfO2 layers were integrated into high-k metal gate transistors in 28 nm CMOS technology. Depending on the polarization state of the ferroelectric gate insulator a memory window in the range of ~1.2 V threshold voltage shift can be reached. Extrapolation of the measured memory window over time indicates a retention time of 10 years with a remaining memory window of 0.4 V. Functional devices with gate length down to ~30 nm were demonstrated.

Today Stefan Müller, Marko Noack and Jörg Andreasas a the team has started The Ferroelectric Memory Company - FCM and currently they are anchored to NaMLab gGmbH and benefits from a The EXIST Research Transfer-financing and support and mentorship by one of the leading semiconductor memory experts Prof. Thomas Mikolajick (Scientific director of NaMLab).

 

TEM of FeFET processed in 28 nm high-k metal gate CMOS Technology (left) and 2D TCAD-model for device simulation (right). (Picture from NaMLab)

 

Source (German) : https://www.futuresax.de/home/fuer-gruender/ideenwettbewerb/nominierte/team-energieeffiziente-speicher-60773.html 

Source (English) : http://www.namlab.com/research/reconfigurable-devices/hafnium-oxide-based-ferroelectric-memory

Ferroelectric HfO2 Based Materials and Devices: Current Status and Future Prospects

Ferroelectric Hafnium Oxide Based Materials and Devices: Assessment of Current Status and Future Prospects [OPEN ACCESS]

J. Müller, P. Polakowski, S. Mueller and T. Mikolajick

ECS J. Solid State Sci. Technol. 2015 volume 4, issue 5, N30-N35

Abstract

Bound to complex perovskite systems, ferroelectric random access memory (FRAM) suffers from limited CMOS-compatibility and faces severe scaling issues in today's and future technology nodes. Nevertheless, compared to its current-driven non-volatile memory contenders, the field-driven FRAM excels in terms of low voltage operation and power consumption and therewith has managed to claim embedded as well as stand-alone niche markets. However, in order to overcome this restricted field of application, a material innovation is needed. With the ability to engineer ferroelectricity in HfO₂, a high-k dielectric well established in memory and logic devices, a new material choice for improved manufacturability and scalability of future 1T and 1T-1C ferroelectric memories has emerged. This paper reviews the recent progress in this emerging field and critically assesses its current and future potential. Suitable memory concepts as well as new applications will be proposed accordingly. Moreover, an empirical description of the ferroelectric stabilization in HfO₂ will be given, from which additional dopants as well as alternative stabilization mechanism for this phenomenon can be derived. 

Comparison of the two major flavors of FRAM. 1T-1C: (a) Working principle illustrating the sensing margin / switched polarization P_sw derived from switched charge Q_sw and non-switched polarization P_nsw in the P-E-hysteresis. (b) DRAM-like architecture of FRAM adding a plateline to word- and bitline for bipolar ferroelectric switching. (c) TEM-micrograph and related P-E-hysteresis of a FE-HfO₂ based deep trench capacitor array proving the concept of 3D-integration capability. To illustrate the advantage of this area enhancement, the polarization density is calculated with respect to the lateral footprint of a comparable planar capacitor. 1T: (d) Illustration of the working principle by a graphical representation of the charge neutrality condition in a MFIS stack. Position 1 and 2 of the insulator-semiconductor loadline represents the transition from the ON-state to the OFF-state of the FeFET or vice versa. Accordingly, the gate voltage difference to turn on/off the FeFET can be approximated by 2 · V_C = 2 · E_c · d_FE, i.e. the memory window MW. (e) Disturb resilient AND architecture of the FeFET. (f) TEM-micrograph and related I_D-V_G-hysteresis of a FE-HfO₂ based 28 nm high-k metal gate transistors proving the concept of advanced 1T FRAM scalability

The recent success of smartphones and tablet computers has accelerated the R&D of fast and energy efficient non-volatile semiconductor memories, capable of replacing the conventional SRAM-DRAM-Flash memory hierarchy. These so called emerging memories usually leverage on the fact that certain materials possess the capacity for remembering their electric, magnetic or caloric history. For the extensively investigated ferroelectrics this ability to memorize manifests in atomic dipoles switchable in an external electric field. This unique property renders them the perfect electric switch for semiconductor memories. Consequently, only a few years after the realization of a working transistor the first ferroelectric memory concepts were proposed.

However, more than 60 years and several iterations later it is now clear that the success or failure of FRAM is mainly determined by the proper choice and engineering of the ferroelectric material. Perovskite ferroelectrics and related electrode systems underwent an extensive optimization process to meet the requirements of CMOS integration and are now considered the front up solution in FRAM manufacturing. Nevertheless, those perovskite systems require complex integration schemes and pose scaling limitations on 1T and 1T-1C memory cells that until now remain unsolved. This creates an unbalance between memory performance on the one side and manufacturing and R&D costs on the other side. This dilemma has ever since restricted FRAM to niche markets. 

With the recent demonstration of ferroelectricity in HfO₂-based systems (FE-HfO₂) a CMOS-compatible, highly scalable and manufacturable contender has emerged, that significantly expands the material choice for 1T and 1T-1C ferroelectric memory solutions as well as nanoscale ferroelectric devices. 

In this paper we will review and expand the current understanding of ferroelectricity in HfO₂, as well as discuss future prospects of ferroelectric HfO₂-based devices with respect to scaling, reliability and manufacturability. Opportunities and drawbacks of this disruptive development in ferroelectric material science will be critically examined. 

Continue reading in the full paper with Open Access here.

Qimonda’s late legacy: 28nm FeRAM using ALD Ferroelectric HfO2

Qimonda’s late legacy: 28nm FeRAM
By Julien Happich
Electronic Engineering Times Europe January 2015 27

CMOS-COMPATIBLE 28 NM FERAM could become commercially available within three to five years, according to research from a collaborative project between NaMLab at TU Dresden, the Fraunhofer Institute for Photonic Micro Systems (IPMS) and GlobalFoundries. Indeed, smashing all prior research claims on FeRAM and scalable to geometries an order of magnitude smaller than today’s 130nm FeRAM commercial offerings, the results are so promising that they are being included in the current version of the International Technology Roadmap for Semiconductors (ITRS).

A result of a sub-project called ‘Cool Memory’ at Saxonys’ cluster Cool Silicon, the technology relies on newly found ferroelectric effects in doped Hafnium oxide (HfO2). Considering that Hafnium oxide is already commonly used as a high-k gate dielectric in CMOS transistors, the processes are pretty much already in place for its ferroelectric variant, readily scalable with CMOS transistors. So why look at doped Hafnium oxide in the first place? We asked Dr. Thomas Mikolajiick, Professor for Nanoelectronic Materials and Director of the NaMLab, coordinator for Cool Silicon.

“This research goes back to 2007 at DRAM maker Qimonda, when a PhD candidate Tim Böscke was doing research to improve HfO2 as a high-k dielectric for capacitors in dynamic random access memories, using dopants to stabilize the material”, explained Mikolajiick. “At certain dopant concentrations and under specific treatments, Böscke noticed that strange peaks occurred in the CV characteristic of the material, and that it behaved as a ferroelectric. This was totally unexpected!

Full story as a PDF can be downloaded here.

ITRS 2013 Emerging Research Devices on HfO2 based ferroelectric devices

ITRS 2013 Emerging Research Devices (ERD) Chapter has been updated on ferroelectric devices (page 13) referring to recent development using ferroelectric hafnium oxide.

From Page 12 : Notably, since 2011, ferroelectricity in a variety of doped and polycrystalline HfO2 has been reported. The HfO2 based FeFETs show promising write speed (down to a few ns), retention (projected to 10 years), and endurance (up to 1012), which all match the best performances of its perovskite counterparts (refer to ERD4a). [65,66,67,68,69], and HfO2-based FeFETs have been fabricated using standard high-k metal gate (HKMG) processes. The use of HfO2-based ferroelectrics significantly reduces the physical thickness of the gate stack, and in turn scales down the channel length to the current technology node [70]. Follow the typical HKMG process, SiO2 serves as the buffer layer between HfO2 and Si with a sub-nanometer thickness, yielding low depolarization field.

"In Ferroelectric FET memory, a ferroelectric dielectric forms the gate insulator of an FET. The main concern on FeFET memory lies in operation reliability. Operational reliability of the FeFET RAM is limited by the time dependant remnant polarization of the ferroelectric gate dielectric reflected in retention loss. Control of the ferroelectric-semiconductor interface is critical for FeFET properties. The scalability of FeFET memory beyond the 22nm generation is uncertain"

 

As a comparasion to RRAM, one of the main contenders for emerging memory technologies:

 

"RRAM include multiple device types and mechanisms with varying level of maturity. The survey is based on rating of the general field rather than specific types. Some recent breakthrough in RRAM significantly enhanced perceived potential of this technology, e.g., 32Gb array demonstration726. Overall RRAM assessment is similar or better than existing CMOS-based nonvolatile memories (Flash). A clear advantage of RRAM is scalability owing to the filamentary conduction and switching mechanisms. The simple device structure and fab-friendly materials also contribute to high rating in CMOS compatibility. One of the major concerns of RRAM is the operation reliability due to the stochastic nature and the defect-related mechanisms. Large variation of RRAM switching parameters has been commonly observed and is considered an intrinsic feature of RRAM mechanisms."

 

Refernces on FeFET:

[65] T. S. Boscke, J. Muller, D. Brauhaus, U. Schroder, and U. Bottger, "Ferroelectricity in hafnium oxide: CMOS compatible ferroelectric field effect transistors," IEDM 2011, pp. 24.5.1–24.5.4.
[66] M. Hyuk Park, H. Joon Kim, Y. Jin Kim, W. Lee, H. Kyeom Kim, and C. Seong Hwang, "Effect of forming gas annealing on the ferroelectric properties of Hf0.5Zr0.5O2 thin films with and without Pt electrodes," Appl. Phys. Lett., vol. 102, no. 11, p. 112914, 2013.
[67] J. Muller, et al, "Ferroelectricity in yttrium-doped hafnium oxide," J. Appl. Phys., vol. 110, no. 11, p. 114113, 2011.
[68] J. Muller, et al, "Ferroelectric Zr0.5Hf0.5O2 thin films for nonvolatile memory applications," Appl. Phys. Lett., vol. 99, no. 11, p. 112901, 2011.
[69] S. Mueller, J. Mueller, A. Singh, S. Riedel, J. Sundqvist, U. Schroeder, and T. Mikolajick, "Incipient Ferroelectricity in Al-Doped HfO2 Thin Films," Adv. Funct. Mater., vol. 22, no. 11, pp. 2412–2417, Jun. 2012.

[70] J. Muller, E. Yurchuk, T. Schlosser, J. Paul, R. Hoffmann, S. Muller, D. Martin, S. Slesazeck, P. Polakowski, J. Sundqvist, M. Czernohorsky, K. Seidel, P. Kucher, R. Boschke, M. Trentzsch, K. Gebauer, U. Schroder, and T. Mikolajick, "Ferroelectricity in HfO2 enables nonvolatile data storage in 28 nm HKMG," 2012 Symp. VLSI Tech., pp. 25–26, 2012

 

Emerging memory taxonomy according to ITRS 2013

For all of you working on emerging memory technologies such as ReRAM, FeRAM, PCM, MRAM etc. this classification scheme in the latest ITRS roadmap should be very useful. Please check out the  ERD - Emerging Research Devices Chapter.

"Figure ERD3 [inserted below] provides a simple visual method of categorizing memory technologies. At the highest level, memory technologies are separated by the ability to retain data without power. Nonvolatile memory offers essential use advantages, and the degree to which non-volatility exists is measured in terms of the length of time that data can be expected to be retained. Volatile memories also have a characteristic retention time that can vary from milliseconds to (for practical purposes) the length of time that power remains on. Nonvolatile memory technologies are further categorized by their maturity. Flash memory is considered the baseline nonvolatile memory because it is highly mature, well optimized, and has a significant commercial presence. Flash memory is the benchmark against which prototypical and emerging nonvolatile memory technologies are measured. Prototypical memory technologies are at a point of maturity where they are commercially available (generally for niche applications), and have a large scientific, technological, and systematic knowledge base available in the literature. These prototypical technologies are covered in Table ERD2 and in the PIDS Chapter. The focus of this section is Emerging Memory Technologies. These are the least mature memory technologies in Fig. ERD4, but have been shown to offer significant potential benefits if various scientific and technological hurdles can be overcome. This section provides an overview of these emerging technologies, their potential benefits, and the key research challenges that will allow them to become viable commercial technologies."

 

Figure ERD3, from the ERD Chapter 2013 - Emerging memory taxonomy (ITRS 2013, Chapter ERD) 

 

If you continue to read from page 8 on you will find a short description of all emerging memory technologies that are being considered by he ITRS. If you´re saturated on resistive technologies you can fast forward to page 12 and read about the new contender FeFET :-)