Highly Selective Directional ALE of Silicon by LAM Research (OPEN ACCESS ARTICLE)

LAM Research, Intel and others are pumping out great publications on Atomic Layer Etching (ALE) at the moment. Here is a good one on Si etchning from LAM Reasearch and I think this is also the first time I come across the term EPC as in "Etching per Cycle" as corresponding to GPC "Growth per Cycle" in ALD. Also the concept of an ALE window is explained. Check out the abstract below or go for the complete article by following the link:

Highly Selective Directional Atomic Layer Etching of Silicon (OPEN ACCESS)

Samantha Tan, Wenbing Yang, Keren J. Kanarik, Thorsten Lill, Vahid Vahedi, Jeff Marks and Richard A. Gottscho

Abstract

Following Moore's Law, feature dimensions will soon reach dimensions on an atomic scale. For the most advanced structures, conventional plasma etch processes are unable to meet the requirement of atomic scale fidelity. The breakthrough that is needed can be found in atomic layer etching or ALE, where greater control can be achieved by separating out the reaction steps. In this paper, we study selective, directional ALE of silicon using plasma assisted chlorine adsorption, specifically selectivities to bulk silicon oxide as well as thin gate oxide. Possible selectivity mechanisms will be discussed. 

As the IC industry approaches sub 10 nm devices, the need for atomic scale fidelity has been recognized. In the field of deposition, atomic layer deposition (ALD) emerged. The driving forces for advancement of ALD were among others conformal deposition in high aspect ratio structures and deposition of dielectrics and metals with atomic layer control. The idea that an analogous technology for removal of material might exist was proposed over 10 years after the discovery of ALD. The number of publications on this so called atomic layer etch (ALE) increased significantly in recent years and now ALE is transitioning from the lab to the fab.

One highly desirable quality of ALE is selectivity. Recently, Hudson et al. verified that a directional oxide ALE process can etch SiO₂ selective to Si₃N₄. Ikeda et al. showed that thermal ALE of germanium can be selective to silicon or SiGe. Thermal etching is isotropic and not directional. Etching of 3D devices requires directionality and selectivity. FinFET gate etching for instance requires overetches of 40 nm and more to clear the silicon between the fins while gate oxide is exposed. As fin heights increase to achieve the required I_on currents while CD's are shrinking further, the amount of overetch is expected to increase even more. During extended plasma exposure, species from the plasma can penetrate into the fin silicon and cause lattice damage and undesired fin recess. This drives the need for new etching approaches such as ALE. 

ALE processes are comprised of single unit steps which repeat in cycles. These single unit steps use the simplest possible chemistry to realize specific surface processes such as activation and removal. In analogy to ALD, ALE single unit steps should have as much self-limitation as possible. Self-limitation or saturation eliminates the influence of transport phenomena which are the root cause of aspect ratio dependent etching or ARDE on a microscopic scale.⁸ On an atomic scale, saturation of the single unit steps should lead to atomic level smoothness of the etching surface.⁵

Another important concept which can be adapted from ALD is the existence of an ideal process window. Figure 1a illustrates the so called “ideal ALD window,” which is defined as the region of nearly ideal ALD behavior between non-ideal regions.³ The graph shows “growth per cycle” or GPC as a function of surface temperature which for chemical surface reactions represents the available energy to overcome reaction barriers. The analogy of an ideal process window for ALE with ion based removal is shown in Fig. 1b. Here, “etch per cycle” or EPC is shown as a function of ion energy. The material to be etched is activated in a first step and the activated layer is removed in a second step by energetic ions. For instance, silicon can be activated by chlorine molecules or radicals and the resulting surface layer of SiCl_x can be removed by low energy noble gas ions. This particular embodiment of ALE is directional since the removal step is directional due to the use of ions that have been accelerated by a plasma sheath or ion beam source. There are other embodiments of ALE as well. For instance, in the absence of directionality in both, the activation and removal step, the result is isotropic ALE. In this case, surface temperature can be used as control variable of the removal step.

Fig. 1. a. Ideal process window for ALD adapted from. Ref. 3 b. Ideal process window for direction ALE. The region called “incomplete removal” in Figure 1b is characterized by ion energies that are insufficient to completely remove the activated surface layer. Under the conditions labeled “ideal ALE window,” the ion energy is chosen to be high enough to remove the activated layer but not the bulk silicon material. A third process regime is labeled “sputtering” and designates a region where the ion energy is high enough to remove bulk material.

The concept of an “ideal ALE window” can be extended to explain etch selectivity. In Fig. 2, material A exhibits an ALE window while material B does not. In the case of material B, the bonding energy of the adsorbed layer is significantly lower than for the bulk material. In this case, the adsorbed species would be removed as atomic species (EPC equals zero) and the removal of the bulk material realized only if the energy reaches the energy needed to sputter the bulk material. If this sputter threshold energy is higher than at least part of the energy range for ideal ALE of material A, high selectivities can be obtained. 

Fig. 2. Schematic of EPC for material A (e.g. silicon) and material B (e.g., silicon oxide) as a function of ion energy.. Hypothetically, infinite etch selectivity can be reached in the energy range that etches material A and not material B.