Sunday, January 21, 2018

The use of ALD in Intel & Globalfoundires leading edge technology

At IEDM 2017 in San Fransisco in December in the Advanced Platform Technologies session Intel and Globalfoundries presented their 10 nm and 7 nm technology, respectively. Intel and Globalfoundries (as well as TSMC) are using different node names, however these two nodes have similar density and can be compared side by side. In a recent article by Scotten Jones in SemiWiki the Intel 10 nm vs. Globalfoundries 7 nm are compared based on previous disclosures, interviews and the IEDM 2017 papers.

This is a very interesting article for those of you who like to dig in deeper into the most leading edge technologies in production 2018 and you can imagine that none of this would have been possible without ALD:
  • Both Intel and Globalfoundries are using SAQP for the fins patterning, presumably using PEALD liners that are on offer from ASM International, Applied Materials and others.
  • Intel is using its fifth generation of high-k metal gates (HKMG). As you know, Intel introduced HKMG in 2007 at 45 nm ahead of the rest of the industry. Whereas Globalfoundries is at its 4th generation, depending on how you count. The IBM Alliance started of with MOCVD High-k (Tokyo Electron at AMD/Globalfoundries and Applied Materials at STMicro) for 32 nm and then moved to ALD high-k (ASM Pulsar 3000) and I am assuming still uses that ALD work horse.
  • In the case of Intel, the contact metal stack also includes a conformal titanium layer and it remains to be seen if this is possibly an ALD process - we know that Prof. Winter has showed amazing progress in thermal ALD of Ti-rich layers, but this could as well be PECVD if the thermal budget allows or some sneaky trics from the Applied Materials PVD magicians in Santa Clara.
  • In the case of Cobalt, we have to assume that the Intel Cobalt vias and lines are not realized by CVD. They are most probably deposited by a Electroless Deposition (ELD) process. ELD Cobalt is claimed to provide void-free bottoms-up pre-filling of vias and contacts as presented by Imec and Lam Research (Solid State Technology LINK) some time ago. In case of the Cobalt liners and Caps used to encapsulate the copper vias and lines by both Intel and Globalfoundries it is safe to assume that these are CVD processes using Applied Materials Cobalt CVD chambers (Endura Volta LINK). Here we know about published work from ALD Cobalt and selective ALD Cobalt that may or may not have come into play (Marissa Kerrigan et al Chem. Mater., 2017, 29 (17), pp 7458–7466)
  • Further up in the Copper layers, the Globalfoundries technology also offer MIM Capacitors that can be either for decoupling or potentially also include embedded DRAM memory cells in a via integration. These have in many cases in older nodes been realized by using low thermal budget ALD or PEALD ZrO2 node dielectric (e.g. from STMicro, Renesas).
  • Adding to all this, there are a multitude of liners, diffusion barriers as well as multiple patterning in BEOL where ALD may have come into play. It is safe to assume that for each node there is more ALD in play.
These speculations are open for debate! :-)

IEDM 2017 - Intel Versus GLOBALFOUNDRIES at the Leading Edge 

by Scotten Jones Published on 12-22-2017 08:00 AM

Article: LINK

Intel 10 nm vs. Globalfoundries 7 nm Fins beautifully conformally coverd by ALD High-k/Metal Gate stacks (SemiWiki).

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