Monday, March 24, 2014

Good news for ALD "Triple patterning seems like it maybe too expensive to be worth it."

28nm is the last process node that does not require double patterning. At 20nm and below, at least some layers require double patterning, according to Paul McLellan at SemiWiki. Furthermore, he says that SADP/SIT is needed for 10nm for a few layers and then double patterning will be used above that. "Triple patterning seems like it maybe too expensive to be worth it." The same goes for EUV "either there is a miracle in improvement of the power of the light source (and some other problems are solved). Or 10nm slips out several years."

So why is this good news for ALD fanatics? SADP means a good opportunity for conformal ALD processes!  Many cool options are out there, such as ow temperature PEALD or catalytic ALD processes for example. Most commonly SiO2 or Si3N4 is used but assuming selctivity is given you could also use other materials. Check out the last picture below for the process flow for SAPD

Paul McLellan explains the terminology for the future patterning options:
  • double patterning is called LELE (as in Litho-etch-litho-etch or DPT)
  • triple patterning called LELELE (as in Litho-etch-litho-etch-litho-etch or TPT)
  • self-aligned double patterning (SADP) also sometimes called sidewall image transfer (SIT)
  • EUV, 14nm wavelength instead of 193nm, so we can go back to single exposure

 
"Examples of metal routing configuration in design and with double (DPT) and triple patterning technology (TPT), showing the potentially large benefit for pattern density of triple patterning for 1D features. The different colors of the polygon in the decomposed layouts represent the different mask target layouts (two masks for DPT, three masks for TPT)." [Source SPIE/Synopsys Inc.]
 
 
Process flow for multiple patterning process: self-aligned (spacer) double pattering a) features after the photolithographic patterning, b) conformal Si3N4 deposition, c) Spacer production by anisotropic etching, d) removing the resist mask, e) anisotropic etching of the underlying layer (eg poly-Si), f) Final hard mask for the removal of the spacer material with denser lines [Source Wikipedia]