Self assembly of 15,000 semiconductor chips per hour

The Next Big Future Blog reports on a A first automated reel-to-reel fluidic self-assembly process for macroelectronic applications. The system enables high speed assembly of semiconductor dies (15,000 chips per hour using a 2.5 cm wide web) over large area substrates. The optimization of the system (hour 99% assembly yield) is based on identification, calculation, and optimization of the relevant forces. As an application the production of a solid state lighting panel is discussed involving a novel approach to apply a conductive layer through lamination.

A First Implementation of an Automated Reel-to-Reel Fluidic Self-Assembly Machine 

Se-Chul Park , Jun Fang , Shantonu Biswas , Mahsa Mozafari , Thomas Stauden , and Heiko O. Jacobs

Adv. Mater. 2014, DOI: 10.1002/adma.201401573 (Free down load)

In this communication, we report on recent progress towards a fi rst implementation of a self-assembly machine that is based on surface-tension-directed-self-assembly. The reported assembly process is no longer a discontinuous smallbatch hand-operated process but resembles an automated machine like process involving a conveyer belt and a reel-to-reel (RTR) type assembly approach with automated agitation. As a comparison, the assembly rate of conventional chip level pick-and-place machines depends on the cost of the system and number of assembly heads that are used. For example, a highend FCM 10000 (Muehlbauer AG) fl ip chip assembly system can assemble approximately 8000 chips per hour achieving a placement accuracy of 30 μm. 

Our current design achieves 15 k chips per hour using a 2.5 cm wide assembly region which is only a factor of 2 better than one of the faster pick-and-place machines; scaling to 150 k chips per hour, however, would be possible using a 25 cm wide web, which would be a factor of 20 faster. 

In principle, scaling to any throughput should be possible considering the parallel nature of self-assembly. In terms of placement accuracy our precision increase with a reduction of chip and solder bump size. Generally, it exceeds the 30 μm limits for the components that have been used. Under optimized operational conditions, we achieved an assembly yield of 99.8% using the self-assembly process. As an application the assembly machine is applied to the realization of area lighting panels incorporating distributed inorganic light emitting diodes (LEDs).