Here is a recent Area Selective Deposition (ASD) paper by Veeco and Imec that got to be the Editor's Pick in JVSTA. ASD is important in scaling down semiconductor devices since it is a self aligned process meaning that you will not have an alignment issues with the previous patterning process when you continue to build your nano-electronic device layer by layer.
This paper is about growing hafnium nitride selectively by ALD on low-k dielectrics but not on copper. Hf3N4 is a decent high-k dielectric and can be transformed into HfSiON etc by annealing in oxygen atmosphere. Another option would be to let it act as a nucleation layer and barrier for e.g. a metal process by ALD, CVD or ELD. Here Imec and Veeco use vapor-deposited octadecanethiol as a masking layer on copper to enable area selective Hf3N4 atomic layer deposition on dielectrics studied by in-situ spectroscopic ellipsometry.
This type of process could become an important tool in future bottom up fabricated process modules. As an example a process that is already in production is area selective CVD of Co on copper lines by using CoCOCp. Her Co metal only grows on the exposed copper lines and not on the low-k and thereby encapsulates the copper lines which reduces the risk for electromigration that leads to interconnect line fails.
Please check out the paper which is available as open sources : LINK