Friday, June 16, 2017

ALD Lab Saxony, Cool Silicon e.v. participation and Exhibition at EuroCVD-Baltic ALD 2017 in Linköping, Sweden


ALD Lab Saxony  participated in the EuroCVD-Baltic ALD 2017 Conference in Linköping, Sweden 11th to 14th of June 2017. The ALD Lab Saxony members (IHM, TU Dresden), Fraunhofer ENAS and Fraunhofer IKTS) gave presentations and posters in the following fields:
  • Precursors (design, synthesis and delivery)
  • Process Equipment (reactors)
  • Nanomaterials (particles, 2D-materials, nano structures)
  • In-situ monitoring (QCM, Ellipsometry, IR, syncrotron)
  • Nitrides (semiconductors, conductors, hard coatings)
  • Carbides (hard coatings, semiconductors)
  • Elemental films (metals, amorphous carbon)
  • Emerging materials (hybrid MLD/ALD, sulfides)
ALD Lab Saxony also took active part in the exhibition with a joint table together with Colnatec the QCM Sensor company from Arizona USA and PillarHall(TM) team from VTT Finland presenting silicon wafers and chips that enable easy analysis of thin film conformality using well-defined, record-demanding microscopic 3-D structures.


Christoph Hossbach, now at Picosun Germany (a member of ALD Lab Saxony) taking the grand stage presenting on Area Selective ALD (Photo credit: Professor Henrik Pedersen, Twitter)




Marcel Junige (TU Dresden) presenting a poster on ALD Gold precursor candidates (photo credit: Marcel Junige)

 

Joint exhibition table with Colnatec USA (Wendy Jameson) and VTT Finland (Photo credit: Colin Georgi)



Fraunhofer IKTS (Jonas Sundqvist) presented via video link the latest developments on Hard coatings by CVD and ALD on WC Powder (Photo Credit Jonas Sundqvist)






Advanced Materials Special Issue: Materials Platform at Aalto University

Aalto University Reports (LINK):Advanced Electronic Materials, an academic peer-reviewed high-impact materials science journal, has published a special issue dedicated to materials research at Aalto University, in Espoo (near Helsinki), Finland.



Link to special issue: http://onlinelibrary.wiley.com/doi/10.1002/aelm.201770023/full

Some selected papers interestig for the Atomic Layer Community:

Ozone-Based Atomic Layer Deposition of Al2O3 from Dimethylaluminum Chloride and Its Impact on Silicon Surface Passivation - Yameng Bao,* Mikko Laitinen, Timo Sajavaara, and Hele Savin

Band Bending Engineering at Organic/Inorganic Interfaces Using Organic Self-Assembled Monolayers - Oliver T. Hofmann* and Patrick Rinke

Flexible Thermoelectric ZnO-Organic Superlattices on Cotton Textile Substrates by ALD/MLD - Antti J. Karttunen,* Liisa Sarnes, Riikka Townsend, Jussi Mikkonen, and Maarit Karppinen

Enhanced p-Type Transparent Semiconducting Characteristics for ALD-Grown Mg-Substituted CuCrO2 Thin Films - Tripurari S. Tripathi and Maarit Karppinen*



Wednesday, June 14, 2017

LATE POSTER: 20170614 Process development of ALD and CVD of MoOx and MoS2 employing Mo(CO)6

Here is a LATE POSTER, 20170614 for EuroCVD-BalticALD 2017 in Linköping - Process development of ALD and CVD of MoOx and MoS2 employing Mo(CO)6.


VTT Finland method accelerates the development of microelectronics in three dimensions

Press Release: VTT Technical Research Centre of Finland has developed the unique PillarHall test structures to accelerate the market entry of three-dimensional, small, efficient and low-power but high-performance electronic components. This will benefit developers of challenging thin film and related manufacturing processes, and thereby the entire electronics industry value network.

There has been occasional speculation on whether Moore's Law remains valid. Transistors are already being packed into squares so small that their rate of shrinkage is accelerating in three dimensions. For example, the equivalent of 4 billion 72-storied skyscrapers on a dime has enabled the creation of a 256 GB memory chip.

Picture source VTT Finland Media release.

VTT has developed record-high aspect ratios on an extremely challenging scale (10,000:1 and 100 nm) for the 3D test structures on silicon chips and wafers, to meet the requirements of the most challenging applications. Such applications include in addition to semiconductor circuits, also optics, MEMS, sensors, thin film batteries and photovoltaics.

"What makes our chips special is that we have turned the analysis 90 degrees and adopted a lateral rather than the traditional vertical approach, which enables much faster data production and lead times than current methods. For example, cross-sectional analysis of microscopic vertical structures can take weeks, whereas Pillar Hall provides data without delay. Other advantages include accuracy, versatility and compatibility with varying process conditions," says inventor and Senior Scientist Riikka Puurunen (D.Sc. (Tech.)) of VTT.

The PillarHall test structure also introduces a new parameter space into the analysis, which allows more efficient thin-film R&D, adoption of new industrial applications and process control.

PillarHall is being funded under Tekes' Research Commercialisation Programme. This involves developing silicon chips for quantifying thin-film conformality, which is a key value proposition of ALD (Atomic Layer Deposition) technology. ALD has originally been developed in Finland and Finland's key ALD technology players are involved in the Project Advisory Group: ASM, Beneq, Picosun, the University of Helsinki and Okmetic Oy.

VTT is currently working with PillarHall's 3rd-generation prototypes, which have been successfully tested by Finnish partners and a number of research institutes. VTT is now seeking international partners, in particular, as test users to push forward with the testing and commercialisation of the chips.

"The interest shown by industry and the positive experiences of users build confidence in our vision that PillarHall chips and wafers could one day become the conformality standard and be commercially available," says Project Manager Mikko Utriainen (D.Sc. (Tech.).

More information about the project:

http://pillarhall.com

VTT Blog: Moore's law - is it a spring of productivity? https://vttblog.com/2017/05/30/moores-law-is-it-a-spring-of-productivity/

Day 3 (Tuesday) EuroCVD-Baltic ALD 2017 in Linköping, Sweden

Here is a collection of tweets from Day 3 (Tuesday) EuroCVD-Baltic ALD 2017 in Linköping; Sweden.





Atomic Scale Processing Webinar with Oxford Instruments

Last chance to register! FREE webinar tomorrow:
Atomic Scale Processing | 15th June, 3:30pm BST


In this webinar, our experts Dr Ravi Sundaram and Dr Harm Knoops discuss the processing of atomic scale materials and devices including Graphene and 2D materials, atomic layer etching and atomic layer deposition. The webinar will comprise of two talks, with a Q&A session at the end:

• Atomic scale processing: Atomic Layer Deposition & Etching
Dr Harm Knoops

• Processing of atomic scale materials & devices: Graphene & 2D
materials | Dr Ravi Sundaram


Tuesday, June 13, 2017

Atomic layer deposition for device integration of graphene (Review)

Just published by Prof. Kessels: A brief and easy-to-read synopsis of our new review paper about ALD for device integration of graphene as published in Advanced Materials Interfaces (Atomic Layer Deposition for Graphene Device Integration, 26 May 2017, DOI: 10.1002/admi.201700232).

Atomic Limitts Blog: LINK

Picture from AtomicLimits.com
 


Day 2 (Monday) EuroCVD-Baltic ALD 2017 in Linköping, Sweden

Here is a collection of tweets from Day 2 (Monday) EuroCVD-Baltic ALD 2017 in Linköping; Sweden.

First invited speaker of Martin Magnusson from on aerotaxy.



Monday, June 12, 2017

Atomic Layer Deposition Market Set to Cross USD 5 Billion by 2022 at a CAGR of 31.27%

According to the new report, “Atomic Layer Deposition Market - By Type (Equipment & Materials); By Application (Gate Dielectrics, Gate Electrodes, Metal Interconnects, Diffusion Barriers, Memory Chips, Multilayer Capacitors, OLED Layers, Solar Cells, Fuel Cells, MEMS and Others); By Geography – Forecast (2016-2022)”, published by IndustryARC, the atomic layer deposition market to cross USD 5 Billion by 2022 at a high CAGR.


Atomic Layer Deposition in increasingly being used in manufacturing of electronic products where thickness of the film is absolutely imperative such as; smart phones, printers, data storage devices, displays, different types of small electronic components and many others products. It is mainly responsible for semiconductor fabrication and nanomaterial synthesis. Growing application of thin film coatings is the major driving factor for atomic layer deposition market. Through atomic layer deposition, ultra-thin films can be created in a sequential and self-limiting way depending on the material or product, which needs the layer to be applied on. Atomic layer Deposition process is especially favored because of its ability to control the film thickness in nanometer thickness regime. Atomic layer deposition is a perfect deposition method for applications where the surface area of the base material is very small.

According to a recent study from IndustryARC the global market value of atomic layer deposition was $910 million in 2015. Atomic layer deposition instruments are expensive as compared to conventional techniques such as MOCVD and PVD, consequently the equipment used for atomic layer deposition accounted for more than 60% of the global market revenue share.

Inquiry before Buying Report @ http://www.industryarc.com/inquiry-before-buying.php?id=15340