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Semiconductor process engineers would love to develop successful process recipes without the guesswork of repeated wafer testing: Process modeling is a powerful technique to predict process results quickly and locate potential process issues without wafer-based testing. These process-modeling capabilities are fully-integrated in the Coventor's (a Lam Research Company) SEMulator3D software platform. Once a process model is built in SEMulator3D, any changes to a proposed integration scheme or device design (such as layout or hardmask thickness changes) can be easily visualized and quantified, without the time and expense of wafer testing.
The process of building a 3D device using a process model (instead of physical wafers) is called “virtual fabrication”. Using virtual fabrication in conjunction with calibration cycles, process engineers and integration engineers can easily develop a process and integration model. The accuracy and predictability of any model is dependent on the quality of the input data, but SEMulator3D is able to model a wide range of physical process behavior with great accuracy and can solve highly-advanced process problems.
Source: An Introduction to Semiconductor Process Modeling: Process Specification and Rule Verification (LINK)
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By Abhishekkumar Thakur
