The IEDM 2025 T3 tutorial session titled “Atomic-layer-deposited atomically thin In₂O₃ transistors for BEOL logic and memory applications” will focus on recent progress in oxide semiconductor thin-film transistor (TFT) technologies designed for back-end-of-line (BEOL) 3D integration. The work is closely associated with Professor Peide (Peter) Ye’s group at Purdue University, which has been leading research on atomic-layer-deposited (ALD) indium oxide (In₂O₃) as a channel material for low-temperature, monolithically integrated logic and memory devices. The presentation will likely consolidate several years of development in ALD In₂O₃ transistors and ferroelectric field-effect transistors (Fe-FETs), demonstrating how these devices can be integrated above silicon CMOS layers in BEOL-compatible processes.
In terms of device performance, ALD In₂O₃ transistors have achieved channel lengths as short as 8 nm with channel thicknesses under 1 nm, demonstrating on-currents of about 3 A/mm at 0.5 V and transconductance values near 1.5 S/mm. On/off current ratios exceeding 10⁷ have been reported, alongside good subthreshold slopes and uniformity across wafers. Planar BEOL-compatible TFT versions of these devices exhibit electron mobilities above 100 cm²/Vs and current densities exceeding 2 mA/µm at low operating voltages. Some experimental devices have also demonstrated radio-frequency performance with cutoff frequencies around 36 GHz in sub-1 V operation, highlighting their potential for low-power, high-performance logic circuits integrated on top of CMOS wafers.
The memory aspect of this research involves combining ALD In₂O₃ channels with ferroelectric HfZrO₂ (HZO) gate dielectrics to realize In₂O₃-based Fe-FETs. These devices achieve channel lengths as small as 7 nm and exhibit memory windows around 2.2 V, with retention projected beyond 10 years and endurance exceeding 10⁸ switching cycles. Importantly, these Fe-FETs are also fabricated entirely within BEOL-compatible temperature budgets. This enables their use as embedded non-volatile memories in monolithic 3D integration schemes or as building blocks for in-memory computing architectures. The combination of logic FETs and Fe-FETs based on the same material platform offers a streamlined approach to constructing stacked computing tiers with both logic and memory functionality.
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