Amazing - Samsung has now introduced of EUV lithography into their 7LPP process used in the Exynos 9825. In a direct comparison, it shows the increased density achieved compared to TSMC’s N7 7.5T 3/3-fin layout
In addition, Samsung has introduced a Self Aligned Diffusion Break (SA DB) that likely reduces performance variation caused by the local layout effect of PMOS transistor.
Source: TechInsight https://www.techinsights.com/blog/techinsights-confirms-samsungs-true-7lpp-process-samsung-exynos-990
With a 27nm fin pitch, this disruptive innovation enables a smaller
standard cell height of 270nm while maintaining high drive current with a
3/3-fin layout for both NMOS and PMOS transistors. Credit: TechInsight
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