NCD to deliver Lucida GD series ALD system for OLED encapsulation with Chinese display manufacturer, TIANMA

NCD reports today (8/31 2016) :The OLED market is going to prospect fast gigantic growing in the near future because OLED has the possibilities of bending, folding and various forms like circle, therefore it will be applied for flexible and wearable devices. Flexible OLEDs need excellent thin encapsulation layers in order to keep the property from the permeation of water and oxygen under the external environment using repeated bending, folding and rolling of devices. However, the current encapsulation based on PECVD is not satisfied with future flexible OLEDs, so new encapsulation technology would absolutely be required.

Many OLED manufactures are currently reviewing to use ALD technology because of obtaining the highest property from the encapsulation layers of OLED, but they have not been solving the low throughput and particle issues followed by using their ALD systems.

In order to clear these problems, NCD has completed to develop the 6th ALD equipment for thin film encapsulation which satisfies high quality, large area and high throughput applying for the inventive ALD technology, and we have been also continuously testing customer’s samples. NCD’s ALD encapsulation layer shows much better properties than that of PECVD, and the encapsulation capability on application for foldable products has been confirmed from the customers. As a result, NCD has recently entered into the contract with Chinese display manufacturer, TIANMA to supply the 5.5th generation class ALD system of Lucida GD series for thin film encapsulation of OLED. It apparently shows that NCD’s core technologies and the result of developments have been approved by the oversea customer.

NCD will keep doing our best to set Lucida GD series as the standard of all of flexible OLED encapsulation equipment with this achievement and become the number one global ALD Company with the best competitiveness making new challenges and developments.

Lucida™ GD Series ALD

High throughput atomic layer deposition system for OLED displays 

Cluster system for Lucida™ GD series

Applications

• Barrier layer(Al2O3, TiO2) for flexible substrate
• WVTR(water vapor transmission rate) 5.3x10-5g/m2·day (tritiated water test @30nm Al2O3/PEN substrate)
• Encapsulation layer(Al2O3,TiO2) for OLED
• Applications of mass-product

Benefits

• High throughput : > 30 panels/hour
• Substrate size : > 6G (1500 x 1850mm2)

Features

• Advanced process kit and small volume chamber for short gas cycle times
• Extremely materialize ALD mechanism
• Small foot print
• Totally integrated process module
• Easy process control

Technical specifications

 

Ultra-High Aspect Ratio InP Junctionless FinFETs by a Novel Wet Etching Method

Readers of this blog may have noticed that I got a new hobby and that I´ve been looking into some etching (ALE) on the side. Here is some interesting new results in etching InP Fins for future CMOS by a chemical method "enabled by inverse metal-assisted chemical etching". All recently published by University of Illinois researchers in Silicon Semiconductors and in the IEEE ElectronDevice Letter below. (Thanks Nicklas Nilsson for sharing this one).

A cross-sectional microscope image of a fin transistor. The indium phosphide semiconductor fin is overlaid with insulators and metals to make a working transistor. Image by Yi Song (as published in Silicon Semiconductors)

Ultra-High Aspect Ratio InP Junctionless FinFETs by a Novel Wet Etching Method

Yi Song et al
IEEE Electron Device Letters > Volume: 37 Issue: 8 

DOI: 10.1109/LED.2016.2577046

Abstract:
Junctionless FinFETs with an array of ultra-high aspect ratio (HAR) fins, enabled by inverse metal-assisted chemical etching, are developed to achieve high on-current per fin. The novel device fabrication process eliminates dry etching-induced plasma damage, high energy ion implantation damage, and subsequent high-temperature annealing thermal budget, ensuring interface quality between the high-k gate dielectric and the HAR fin channel. Indium phosphide junctionless FinFETs, of record HAR (as high as 50:1) fins, are demonstrated for the first time with excellent subthreshold slope (63 mV/dec) and ON/OFF ratio (3 × 105). Published in: IEEE Electron Device Letters ( Volume: 37, Issue: 8, Aug. 2016 )

Picosun joins A*STAR Cost-Effective Interposer Consortim in Singapore

ESPOO, Finland, 30th August, 2016 – Picosun Oy, the leading supplier of advanced Atomic Layer Deposition (ALD) manufacturing solutions, partners with A*STAR’s Institute of Microelectronics (IME) in Singapore and global, prominent semiconductor industries to develop next generation chip packaging technology. 

 

 

A*STAR 2.5D interposer Multi-Project Wafer supported by state-of-the-art Through-Silicon Via (TSV) engineering lines in both 200mm and 300mm [A*STAR]
 

Higher and higher performance, speed, multifunctionality, reliability, and compact size are required from today’s microelectronics, to answer the customers’ demands, while the manufacturing costs must remain low to retain competitiveness.

The Cost-Effective Interposer Consortium brings together frontline semiconductor manufacturers and research institutes to address these challenges. Picosun joins forces with e.g. IME, Inotera Memories, STATS ChipPAC Pte. Ltd., Teradyne Corporation, Tessolve Semiconductor Pvt. Ltd., UMC, and Veeco Instruments to develop advanced, high volume manufacturing solutions for cost-efficient packaging of the chip components.

“We are happy to have Picosun as a member in the Cost-Effective Interposer Consortium. This collaborative partnership will harness the expertise of our partners, including Picosun’s strong know-how in ALD, and IME’s deep R&D experience to accelerate the development and time-to-market of cost-efficient next-generation electronic devices,” says Prof. Dim-Lee Kwong, Executive Director of IME.

“ALD is a central manufacturing method in today’s semiconductor industries, and the very technology that enables the future developments in the field. For Picosun, this is clearly our most important market area, where several world-leading IC industries already rely on our production-proven ALD solutions. We are excited to collaborate with such a number of prominent microelectronics industries and our long-time partner and valued customer, IME, in the Cost-Effective Interposer Consortium,” states Juhana Kostamo, Managing Director of Picosun.

A central approach to solve many key challenges in modern microelectronics development is wafer-level 3D-integration of the components, which enables continued downscaling of the chip size while retaining high performance and reliability. Cost savings are obtained when larger number of chips can be manufactured on the same wafer. ALD is a key technology to realize the ultra-thin active layers crucial for the chip component functionality, such as high-k dielectrics for MIM (metal-insulator-metal) capacitors and high aspect ratio liners.