Device Engineer at Petabyte in Shanghai for FRAM Cell/Array engineering

Job Description

This position is for a Device/Testing Engineer working on FRAM Cell/Array engineering. The engineer is responsible for leading research and development of next generation VFRAM to support Petabyte Technology Inc’s (PBT) growing business in storage and memory solutions. Primary responsibilities include silicon experimentation, cell and array characterization, data analysis, modelling of the device, array, circuits and system behavior to meet complete product requirements and system needs. The engineer is also responsible for developing innovative device solutions and memory operation algorithms to continue technology scaling. Successful candidate will collaborate with process integration engineers, circuit designers, product engineers to understand the critical issues and inter-dependencies and engineer solutions to address them.

Location: Shanghai, China
Traveling: <20%
Salary: TBD
Language: English/Chinese

Qualifications

Education:Candidate should possess an MS degree with at least 4 years additional experience, or a PhD with at least 2 years additional experience, in Electrical Engineering or Physics, with an emphasis in Physics of Semiconductor Materials or Devices/Testing related areas.

Hands on experience with FRAM/FEFET in device and testing are strongly preferred!!

Bench testing experience is preferred but not required.

Device modeling is preferred but no required.

Minimum Requirements:
- 4+ years' experience in the area of Semiconductor and Device Physics, or device processing, electrical characterization, and device and circuit models.
- 4+ years' experience in technical problem solving.

About PBT

Petabyte Technologies is a high-tech enterprise focusing on the R&D and sales of new memory chip - FRAM, a new kind of NVM(Non-Volatile Memory). The project team brings together the world's top experts in memory development, with an average of more than 15 years of cutting-edge technology experience.

The FRAM technology, Petabyte’s proprietary intellectual property, adopts brand new material and architecture. The FRAM memory is designed to fill the gap between the two main stream memories, DRAM and Flash. It is equipped with fast read-write speed, accurate addressing to byte, high durability, flash-like non-volatility and low power consumption. Petabyte’s FRAM can immensely increase storage density current memories.

FRAM has a wide application such as future smart market (including household, office, instrumentation, automotive electronics) and AI chips market.

About Our Group

The Cell development Group is responsible for delivering new memory Cell solutions to PBT’s (Petabyte Technology. Inc) most advanced memory products. As part of the cell development team, we develop the best-in-class materials solutions and partner with process integration, product and Design teams to introduce these solutions into new memory products. As an enabler of head performance and reliability advances through cell innovation, we help PBT lead in technology and time-to-market.

Contact:

Sharon Yin

E-mail： xryin@petabytetech.com

Mobile：（+86）18914135998

Wechat：13921177520