In a recent interview with Daniel Nenni, Jonas Sundqvist, CEO and co-founder of AlixLabs, discussed the company’s pioneering role as the world’s only pure-play Atomic Layer Etch (ALE) equipment provider. Drawing on his academic background in ALD and CVD from Uppsala University, Sundqvist explained how AlixLabs’ APS (ALE Pitch Splitting) technology enables atomic-scale precision in semiconductor patterning. APS helps chipmakers reduce process complexity, lower costs by up to 40% per mask layer, and improve yield, particularly in advanced logic and memory manufacturing. As the industry pushes toward sub-10 nm nodes, APS offers a scalable and sustainable alternative to traditional multi-patterning and EUV lithography.
Sundqvist emphasized that AlixLabs addresses critical pain points in semiconductor production, such as increasing lithography costs, complexity, and sustainability concerns. By minimizing energy use, reducing fluorinated gas emissions, and improving process efficiency, APS supports a greener and more cost-effective manufacturing path. AlixLabs differentiates itself from giants like ASML and proponents of self-aligned multi-patterning by offering a complementary technology that simplifies patterning. The company is currently collaborating with major chipmakers and research institutes, preparing a Beta tool for pilot testing by late 2025 and targeting high-volume manufacturing between 2027 and 2029.
Introducing AlixLabs AB (Sweden): one of our selected companies to participate on the EU Business Hub at Semicon Japan 2024.
During the recent EU Business Hub at Semicon Japan 2024 business mission that took place between the 9th and 13th of December, we witnessed the spark of global collaboration in action. European and Japanese companies participating in the mission shared their impressions – and their feedback reveals exciting opportunities on the horizon.
The EU Business Hub at Semicon Japan 2024 mission stood out for its comprehensive approach to supporting European businesses seeking to enter the Japanese market:
Tailored B2B Matchmaking: European companies had the chance to meet with key Japanese industry players through personalized B2B meetings, fostering future partnerships.
Market Intelligence & Local Expertise: Participants received valuable market insights and coaching on business culture, provided by the programme team, helping them navigate the Japanese market with ease.
Cultural & Linguistic Support: Expert interpreters and briefings on Japanese business culture ensured that each interaction was smooth and effective.
EU-Branded Pavilion: A platform for European companies at Semicon Japan 2024, showcasing cutting-edge solutions and elevating visibility among global tech leaders.
This fall, the 248th ECS Meeting will be held on Oct. 12-16, 2025 in Chicago (IL, USA), and is expected to gather some 3,000 participants and 40 exhibitors from both academia and industry.
The conference has a strong focus on emerging technology and applications in both solid-state science & technology and electrochemistry.
For more information about our annual symposium G01 and the conference website: Meeting Information.
The organizers of symposium G01 on “Atomic Layer Deposition & Etching Applications, 21” encourage you to submit your abstract(s) on topics, comprising but not limited to:
1. Semiconductor CMOS applications: development and integration of ALD high-k oxides and metal electrodes with conventional and high-mobility channel materials;
2. Volatile and non-volatile memory applications: extendibility, Flash, MIM, MIS, RF capacitors, etc.;
3. Interconnects and contacts: integration of ALD films with Cu and low-k materials;
5. New precursors, delivery systems & sustainability issues;
6. Optical, photonic and quantum applications; applications aiming at Machine Learning, Artificial Intelligence
7. Coating of nanoporous materials by ALD;
8. Molecular Layer Deposition (MLD) and hybrid ALD/MLD;
9. ALD for energy conversion applications such as fuel cells, photovoltaics, etc.;
10. ALD for energy storage applications;
11. Productivity enhancement, scale-up and commercialization of ALD equipment and processes for rigid and flexible substrates, including roll-to-roll and spatial processing;
12. Area-selective ALD;
13. Atomic Layer Etching (‘reverse ALD’) and related topics aiming at self-limited etching, such as atomic layer cleaning, etc.
FYI: Last year at the PRiME 2024 Meeting in Honolulu, our symposium G01 on ALD & ALE Applications 20 attracted some 80 participants,
attending a full 3-days schedule with 50 presentations (42 oral, of which 16 invited, plus 8 poster presentations).
We expect to be at least as successful this Fall in Chicago.
Abstract submission
Meeting abstracts should be submitted not later than the deadline of March 28, 2025 via the ECS website: Submission Instructions
Submission Instructions
Invited speakers
A list of invited speakers follows below:
In addition, ECS’ Francesca Di Palo (francesca.dipalo@electrochem.org) can provide you with an official participation letter issued by the Electrochemical Society.
For (limited) general travel grant questions, please contact travelgrant@electrochem.org.
As in the past years, we expect also our symposium to be able provide some partial travel allowance to selected speakers.
We are looking forward to meeting you all at our symposium G01 on ALD & ALE Applications 21, in Chicago | Oct. 12-16, 2025!
Scaling Atomic Layer Deposition (ALD) from laboratory research to high-volume semiconductor manufacturing presents numerous challenges, particularly as the industry moves towards more complex 3D structures like 3D NAND, Through-Silicon Vias (TSVs), and nanosheet transistors. One major hurdle is the disparity between lab-scale process development and industrial fabrication, where variations in chamber design and wafer size can lead to unexpected process deviations. Additionally, throughput and cost considerations play a critical role, as slow deposition rates can hinder industrial adoption due to high operating expenses. Defect control is another key concern, as even minuscule particle contamination can significantly impact yield, yet many research facilities lack the advanced defect detection capabilities necessary for high-volume manufacturing. Furthermore, test structure availability is a limiting factor, with sub-100 nm, high-aspect-ratio structures often restricted to leading semiconductor manufacturers, creating barriers for process validation and qualification.
Chipmetrics' PillarHall® metrology chips offer an innovative solution to these challenges by providing dedicated test structures with aspect ratios up to 10,000:1, allowing for rapid and cost-effective ALD validation without the need for complex cross-sectional analysis. These metrology chips facilitate the development of high-aspect-ratio thin film depositions by enabling researchers and manufacturers to evaluate process performance in a scalable manner, ensuring compatibility with industrial requirements. Beyond technical validation, the ability to conduct precise, non-destructive measurements enhances efficiency and reduces development costs, accelerating the transition from lab to fab. As semiconductor manufacturing continues to evolve, tools like PillarHall play a crucial role in streamlining the process transfer while maintaining the precision and reliability demanded by the industry.
PillarHall LHAR4 Test Chip in animated presentation. How to use the PillarHall chip in characterizing 3D thin film process conformality. Lateral High Aspect Ratio, Ultra High Aspect Ratio, Thin Film, Conformal, Deposition, Atomic Layer Processing, Atomic Layer Deposition, Chemical Vapor Deposition, ALD, CVD, HAR, 3D, metrology, Atomic Layer Etching, ALE
In this insightful presentation given by the inventor of PillarHall test chips, Professor Riikka Puurunen from the School of Chemical Engineering, Department of Chemical and Metallurgical Engineering at Aalto University, talks about "Recent Progress in Analysis of the Conformality of Film by Atomic Layer Deposition.
The 8th International Conference "ALD for Industry" took place in Dresden from March 11 to 12, 2025, bringing together experts to discuss advancements in Atomic Layer Deposition (ALD) technology. In addition to the previously mentioned presentations, the conference featured several notable talks:
Prof. Fred Roozeboom
AlixLabs and Aether Semiconductor
Silicon Austria Labs
ASM International
The handshake
Prof. Riikka Puurunen
"Fundamentals of Atomic Layer Deposition: A Tutorial" by Prof. Riikka Puurunen
Prof. Riikka Puurunen from Aalto University, Finland, delivered a comprehensive tutorial on the fundamentals of ALD. She covered the history of ALD, its underlying surface chemistry, typical reaction mechanisms, and growth modes. Prof. Puurunen also discussed the role of diffusion in 3D structures and provided insights into surface reaction kinetics.
In her tutorial titled "Fundamentals of Atomic Layer Deposition," Prof. Riikka Puurunen of Aalto University provided a comprehensive overview of ALD, a nanotechnology technique for precise surface modifications and thin coatings.She traced ALD's dual origins: Atomic Layer Epitaxy (ALE) developed by Tuomo Suntola in 1974, and Molecular Layering (ML) introduced by Valentin Aleskovskii and Stanislav Koltsov in the 1960s.The tutorial delved into the core principles of ALD, emphasizing its reliance on repeated, self-terminating reactions between gaseous reactants and surfaces.Prof. Puurunen categorized typical reaction mechanisms, discussed factors influencing saturation and growth modes, and highlighted "growth per cycle" (GPC) as a fundamental characteristic of ALD processes.She also explored the role of diffusion in complex 3D structures, noting how diffusion-limited growth can provide insights into surface reaction kinetics. The presentation available at Fundamentals of ALD: tutorial, at ALD for Industry, Dresden, by Puurunen 2025-03-11 | PPT
"Spatial ALD of IrO₂ and Pt Films for Green H₂ Production by PEM Electrolysis" by Dr. Paul Poodt
Dr. Paul Poodt, Chief Technology Officer at SparkNano, presented on the application of spatial ALD in fabricating iridium dioxide (IrO₂) and platinum (Pt) films. These materials are crucial for enhancing the efficiency of proton exchange membrane (PEM) electrolyzers used in green hydrogen production. Dr. Poodt highlighted how spatial ALD enables precise control over film thickness and composition, leading to improved performance and durability of electrolyzer components.
SparkNano’s CTO, Paul Poodt, presented on Spatial ALD of IrO₂ and Pt Films for Green H₂ Production by PEM Electrolysis on March 12 at 10:20 AM during the Emerging Applications session. Attendees had the opportunity to connect with him to discuss SparkNano’s spatial ALD technology.
"Advancements in ALD for Next-Generation Semiconductor Devices" by Dr. Christoph Hossbach
Dr. Christoph Hossbach from Applied Materials / Picosun Europe discussed recent progress in applying ALD techniques to next-generation semiconductor devices. His presentation covered the integration of ALD processes in manufacturing advanced transistors and memory devices, emphasizing the role of ALD in achieving atomic-scale precision and conformality required for modern microelectronics.
"ALD Applications in Quantum Technology" by Dr. Martin Knaut
Dr. Martin Knaut of TU Dresden explored the utilization of ALD in developing components for quantum technologies. He highlighted how ALD's ability to deposit uniform and defect-free thin films is essential for fabricating qubits and other quantum devices, potentially leading to more stable and scalable quantum computing systems.
"Emerging Applications of ALD in the Medical Field" by Dr. Mira Baraket
Dr. Mira Baraket from Atlant 3D presented on the potential of ALD in medical applications, including the development of biocompatible coatings for implants and drug delivery systems. She discussed how ALD can enhance the performance and safety of medical devices by providing precise control over surface properties.
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