Wednesday, August 3, 2022

Swagelok supports semiconductor manufacturers with new ALD valve

New Swagelok® ALD7 UHP Valve Enables Semiconductor Manufacturers to Improve Chip Yield
Advanced diaphragm valve provides maximum dosing precision, fast actuation, and consistent performance over tens of millions of production cycles.

Solon, Ohio (August 2, 2022) — Swagelok, a leading provider of fluid system products, assemblies, and related services, has announced the release of the Swagelok® ALD7 ultrahigh-purity (UHP) diaphragm valve—a product capable of delivering the consistency and long service life necessary for semiconductor fabricators to improve chip yields. Compared to Swagelok’s current top-of-the-line ALD6 valve, the ALD7 provides better flow consistency, flow capacity, and actuator speed. It also offers the performance at high temperatures necessary to allow chip fabricators to overcome limitations in current production processes and keep up with demand.




ALD7 valves can be integrated into either new tools or legacy equipment to provide improved flow capacity (up to 0.7 Cv) in the same 1.5-inch (38.1mm) footprint as existing valves, helping fabricators keep up with the strong global demand for chips that power advanced technology. ALD7 valves deliver precise dosing over tens of millions of ALD (atomic layer deposition) production cycles by actuating more quickly and consistently than even its ALD6 predecessor. The actuator’s open and close response time can be less than 5ms. The actuator is immersible to 150°C (302°F) and the valve body is rated to 200°C (392°F), allowing the valve to better support low-vapor-pressure precursors that require high temperature delivery. This gives fabricators the control needed to maximize throughput and yield.

ALD7 valves feature a compact design with an integrated thermal isolator, allowing system designers to maximize limited space near the reaction chamber of chip production tools. The valves are also highly resistant to corrosive gases used in ALD processes, with valve bodies comprised of proprietary ultrahigh-purity Swagelok 316L VIM-VAR stainless steel. As a result, semiconductor tool manufacturers can rely on ALD7 valves to provide consistent performance under variable process conditions, enhancing productivity for customers without increasing operating costs.

“Since developing the industry’s first fit for purpose ALD valve nearly 20 years ago, we have worked with semiconductor customers to better understand the levels of performance needed from our UHP valves as chip manufacturers continue shrinking process nodes and maximizing chip yields,” explains Ben Olechnowicz, product manager at Swagelok. “This has resulted in pursuing innovative thinking and developing valves to actuate faster, perform in more extreme conditions, and allow higher coefficients of flow in demanding atomic layer processes. We designed the ALD7 as a reliable round-the-clock production valve that checks all those boxes, giving our customers the consistency of performance necessary to stay ahead in an industry that is seemingly always changing and demanding more from manufacturers.”

The ALD7 is available today in a modular surface-mount configuration with a high-flow C-seal or in straight configurations with a tube butt weld, and Swagelok VCR® face seal fitting end connections. High-temperature electronic position sensors, optical position sensors, or solenoid pilot valve configurations are also available as add-on components.

For more information on Swagelok’s new ALD7 UHP diaphragm valve, visit swagelok.com or contact your local Swagelok sales and service center.

Sunday, July 17, 2022

Chipmetrics High Aspect Ratio Test Chip launched at ALD2022 in Ghent

At the recent AVS ALD2022 Conference in Ghent, Belgium, I made several rounds in the ALD industrial exhibition and met up with Chipmetrics Oy from Finland. Chipmetrics produce test structures, chips, and wafer concepts for advanced materials and microelectronics manufacturing, many specifically for ALD. Their main product – PillarHall test chip – is developed for advanced thin film process conformality characterization to accelerate applications of conformal 3D thin films. The Pillar Hall test chip has a lateral, very high aspect ratio structure to determine conformality when developing new ALD hardware, processes, and precursors.


Chipmetrics at AVS ALD2022 in Ghent, Belgium (Lower photo: Zahra Ghaderi, Mikko Utriainen and James Song)

What caught my eye this time was their new vertical high aspect ratio test chip - VHAR1 silicon test chip which consists of an array of vertical high aspect ratio holes. The holes have a constant hole diameter of 1 μm, and a depth of 200 μm over the whole chip area 15 × 15 mm. The deposited film penetration depth profile can be measured by cross-sectioning as normally done with the vertical high aspect ratio test structures.

This structure resembles the situation in semiconductor devices such as DRAM, 3DNAND, and TSVs. It can undoubtedly get valuable information and understanding when developing ALD processes for large surface areas with high aspect ratios. Anyone that has developed new ALD processes knows that not only the aspect ratio plays a role but also the total surface area since you need to achieve a sufficient dose of the precursors at the right process conditions to achieve perfect conformality very fast to be productive and minimize precursor decomposition, "CVD effects" and have effective purging of precursors and ALD process byproducts.

For more information, please find contact information here to Chipmetrics: LINK





Links

PillarHall – introduction in SlideShare

PillarHall – introduction in YouTube

PillarHall – short introduction in YouTube

Video: How to use PillarHall test chip

PillarHall Web Site

About Chipmetrics:

Chipmetrics is a forerunner in productizing test structures, test chips, and wafer concepts for advanced materials and microelectronics manufacturing.

We are experts in thin film conformality characterization. Our main product – PillarHall test chip – is developed for advanced thin film process conformality characterization to accelerate applications of conformal 3D thin films.

Chipmetrics Oy is a part of the emerging Atomic Layer Deposition (ALD) industry and research community. Our headquarters are in Finland – in the country of the origin of ALD.


Friday, July 15, 2022

Global Total Semiconductor Equipment Sales On Track to Record $118 Billion in 2022

SAN FRANCISCO, July 12, 2022 /PRNewswire/ -- Global sales of total semiconductor manufacturing equipment by original equipment manufacturers are forecast to reach a record $117.5 billion in 2022, rising 14.7% from the previous industry high of $102.5 billion in 2021, and increase to $120.8 billion in 2023, SEMI announced today in releasing its Mid-Year Total Semiconductor Equipment Forecast – OEM Perspective at SEMICON West 2022 Hybrid.

The following results reflect market size by segment and application in billions of U.S. dollars:




Both the front-end and back-end semiconductor equipment segments are contributing to the market expansion. The wafer fab equipment segment, which includes wafer processing, fab facilities, and mask/reticle equipment, is projected to expand 15.4% to a new industry record of $101 billion in 2022, followed by a 3.2% increase to $104.3 billion in 2023.

"In line with the semiconductor industry's determined push to increase and upgrade capacity, the wafer fab equipment segment is poised to reach the $100 billion milestone for the first time in 2022," said Ajit Manocha, president and CEO of SEMI. "Secular trends across a diverse range of markets, coupled with strong investments in digital infrastructure, are powering another record year."

Driven by demand for both leading-edge and mature process nodes, the foundry and logic segments are expected to increase 20.6% year-over-year to $55.2 billion in 2022 and another 7.9%, to $59.5 billion, in 2023. The two segments account for more than half of total wafer fab equipment sales.

Strong demand for memory and storage continues to contribute to DRAM and NAND equipment spending this year. The DRAM equipment segment is leading the expansion in 2022 with expected growth of 8% to $17.1 billion. The NAND equipment market is projected to grow 6.8% to $21.1 billion this year. DRAM and NAND equipment expenditures are expected to slip 7.7% and 2.4%, respectively, in 2023.

After surging 86.5% in 2021, the assembly and packaging equipment segment is expected to grow 8.2% to $7.8 billion in 2022 and edge down 0.5% to $7.7 billion in 2023. The semiconductor test equipment market is forecast to grow 12.1% to $8.8 billion in 2022 and another 0.4% in 2023 on demand for high-performance computing (HPC) applications.

Regionally, Taiwan, China, and Korea are projected to remain the top three equipment buyers in 2022. Taiwan is expected to regain the top position in 2022 and 2023, followed by China and Korea. Equipment spending for other regions tracked, except for Rest of World (ROW), is expected to grow in 2022 and 2023.

Source: SEMI July 2022, Equipment Market Data Subscription


ASM International launches TENZA ALD Quad Chambers for silicon oxide gap-fill and liners on the XP8 platform

New process technology addresses 300mm advanced memory and logic/foundry applications with best film quality, highest productivity and lowest cost of ownership in its class.

San Francisco, USA – ASM International N.V. (Euronext Amsterdam: ASM) today announced TENZATM ALD, an innovative single wafer atomic layer deposition (ALD) process technology for 300mm wafers. TENZATM ALD is optimized for gap-fill applications and provides the best film quality, conformal coverage through the full trench and highest productivity in its class.

Quad chamber modules (QCMs) 30, 32, 34, and 36 are connected to four side surfaces of the vacuum chamber 22. Each QCM is a module having four reactor chambers (RC1 to RC4). Processing such as plasma film forming processing is performed on a substrate in each reactor chamber. (ASM Patent application US20170278074A1) LINK: BALD Engineering - Born in Finland, Born to ALD: ASM International enhances ALD productivity with new 300 mm XP8 Quad Chamber Module

TENZATM ALD is offered on ASM’s high productivity quad chamber module (QCM) architecture, with four tightly integrated reactors on each QCM. In a compact configuration, up to 4 QCMs running the TENZATM ALD process can be attached to the XP8 platform, enabling processing of up to 16 wafers at a time.

“TENZATM ALD leverages ASM’s production proven QCM quad chamber module architecture and XP8® platform, which have been in high volume manufacturing fabs for several years, to bring enhanced process capability at the lowest cost of ownership to the market. TENZATM ALD enables ultra-high aspect ratio (>100:1) gap-fill for advanced memory devices”, said Hichem M’Saad, Chief Technology Officer and Member of the Management Board.

TENZATM ALD utilizes a novel design optimized for ALD reactions, minimizing process volume for maximum precursor utilization efficiency, reducing precursor consumption up to 50% and increasing productivity more than double compared to conventional ALD approaches. Each reactor chamber controls the RF plasma power supply and matching system individually to improve process reproducibility. The small volume reactor also provides excellent defect performance and extended reactor life (run time before preventive maintenance). Process reactions are confined within each small volume reactor space to minimize consumable parts, making maintenance very easy and less costly.

TENZATM ALD enables a variety of silicon oxide applications for gap-fill and liners for a range of structures in advanced transistors, memory devices and interconnects. The industry can count on TENZATM ALD to deliver a high quality, reliable, repeatable, production proven gap-fill process with the lowest cost of ownership on the market today.

Deliveries of TENZATM ALD have begun to multiple global customers, among them leaders in memory device manufacturing. ASM’s mature compact ALD quad chamber module architecture has a proven track record with more than 2,000 reactors shipped to customers.

Thursday, July 14, 2022

Lam Research, Entegris, Gelest Team Up to Advance EUV Dry Resist Technology Ecosystem

Collaboration provides robust chemical supply chain for global chipmakers using the breakthrough technology and supports R&D for next-generation EUV applications


SEMICON WEST 2022, SAN FRANCISCO, July 12, 2022 – Lam Research Corp. (NASDAQ: LRCX), Entegris, Inc. (NASDAQ: ENTG), and Gelest, Inc, a Mitsubishi Chemical Group company, today announced a strategic collaboration that will provide semiconductor manufacturers worldwide with reliable access to precursor chemicals for Lam’s breakthrough dry photoresist technology for extreme ultraviolet (EUV) lithography, an innovative approach used in the production of next-generation semiconductors. The parties will work together on EUV dry resist technology research and development (R&D) for future device generations of logic and DRAM products that will help enable everything from machine learning and artificial intelligence to mobile devices.


A robust supply chain for process chemicals is critical to EUV dry resist technology integration into high-volume manufacturing. This new long-term collaboration further broadens the growing ecosystem for dry resist technology and will provide dual-source supply from semiconductor material leaders with provisions for continuity of delivery in all global markets.


LAM is a semiconductor processing and fabrication equipment designer and manufacturer who has announced a new dry photoresist technology in collaboration with IMEC and ASML. This new dry technology differs from the wet photoresist currently used in all commercial semiconductor foundries such as TSMC, Intel, Samsung, Micron, Global Foundries and SK Hynix. (source: SemiAnalysis LINK)




These stochastic defects lead to a variety of issues with the future 3nm/2nm nodes. One of these issues that can be mitigated by moving to dry deposit and develop is line collapse. When the solvent is washed away, the lines can become unstable and collapse. Other issues such as line edge roughness are also mitigated when moving to a dry deposit and develop flow. (source: SemiAnalysis LINK)

In addition, Lam, Entegris, and Gelest will work together to accelerate the development of future cost-effective EUV dry resist solutions for high numerical aperture (high-NA) EUV patterning. High-NA EUV is widely seen as the patterning technology that will be required for continued device scaling and advancement of semiconductor technology over the coming decades. Dry resist provides the high etch resistance and tunable thickness scaling of deposition and development necessary to support high-NA EUV's reduced depth of focus requirements. "Dry resist technology is a breakthrough that shatters the biggest barriers to scaling to future DRAM nodes and logic with EUV lithography," said Rick Gottscho, executive vice president and chief technology officer of Lam Research. "This collaboration brings together Lam's dry resist expertise and cutting-edge solutions with material science capabilities and trusted supply channels from two industry precursor chemical leaders. This important expansion of the dry resist ecosystem paves the way for exciting new levels of innovation and high-volume manufacturing with the technology." First developed by Lam in collaboration with ASML and IMEC, dry resist extends the resolution, productivity, and yield of EUV lithography, thereby addressing key challenges associated with creation of next-generation DRAM and logic technologies. It provides superior dose-to-size and dose-todefectivity performance, enabling higher EUV scanner productivity and lower cost of ownership. In addition, Lam's dry resist process offers key sustainability benefits by consuming less energy and five to ten times less raw materials than traditional resist processes. "Lam's dry resist approach reflects key innovations at the material level and offers a wide range of advantages, including better resolution, improved cost-efficiency and compelling sustainability benefits," said Bertrand Loy, chief executive officer of Entegris. "We are proud to be a part of this innovative collaboration to accelerate dry resist adoption and to be a trusted process materials supplier for customers as they push to create the next generation of semiconductors with this important technology." "Our collaboration with Lam and Entegris to advance dry resists for EUV lithography demonstrates our commitment to support chipmakers as they innovate in materials science," said Jonathan Goff, president of Gelest, a Mitsubishi Chemical Group company. "We've seen EUV demonstrate exceptional value in recent years, and we're pleased to be part of the growing ecosystem to extend its potential."

Tuesday, July 12, 2022

ASM Internaltional launces new 300 mm Vertical batch for LPCVD and ALD

New system addresses 300mm advanced logic/foundry and memory applications with highest productivity and lowest cost of ownership in its class

San Francisco, USA – ASM International N.V. (Euronext Amsterdam: ASM) today introduced the SONORA® vertical furnace system with dual reactor chambers for 300mm wafers. The system’s dual boat reactors produce the highest available throughput in its class, increasing reactor utilization to virtually 100%, while ensuring the lowest capex.


SONORA is named after the blossoming Sonoran desert near Phoenix, Arizona. The look and feel of the SONORA system reflects the colors of the Saturn rockets from the Space Age - a time when semiconductor technology was given a huge boost. It is also the era that gave birth to ASM, and so the SONORA® color scheme creates a link to ASM’s more than 50-year legacy in semiconductor processing equipment. LINK: SONORA_vertical_furnace (asm.com)

“The introduction of the novel SONORA® system is part of our strategy to selectively grow our vertical furnace presence in the market. The new SONORA® ensures that ASM will be strengthening its offering in advanced logic/foundry and memory applications as well as extend our leadership position in the market for More than Moore (such as analog and power) applications,” said Hichem M’Saad, Chief Technology Officer and Member of the Management Board.

The new SONORA® is fully compatible with the original A412™, so existing process recipes are easily transferred, accelerating system qualification and ramp up. System deliveries have begun to multiple customers globally, among them leaders in advanced logic, and power device manufacturing.

ASM’s predecessor A412™ vertical furnace system has a proven track record of more than 1,000 reactors shipped to customers worldwide and over 22 years of maturity in semiconductor manufacturing. The new SONORA® has a novel system architecture that maximizes floor space productivity as well as service area. Its dedicated process modules have individually controlled high purity mini environments. Our innovative gas injection system for low pressure processing provides the best uniformities of deposited films between the individual wafers at larger load sizes. These larger process wafer load sizes combined with the updated control system, new robots, faster wafer cooldown, faster boat exchange modules generate up to 30% more productivity, compared to its predecessor. Higher productivity also results in lower energy and chemical usage per wafer. Special attention was given to the design for serviceability leading to a spacious access for all maintenance activities. The new system has been further modernized with an intuitive graphical user interface, predictive maintenance by advanced control diagnostics, and plug & play installation. Customers can count on the SONORA® delivering increased reliability and better ease of use with production output that achieves better repeatability, productivity, and time utilization.


The A412 PLUS is for 300mm wafers, while the A400 is for 200mm and smaller wafers sizes

Like its predecessor, the SONORA® offers a comprehensive portfolio of process applications including low pressure chemical vapor deposition (LPCVD) processes like doped silicon and silicon nitride films, diffusion processes such as wet oxidation and anneal processes, as well as a leading portfolio of atomic layer deposition (ALD) materials.

Supply chain limited by Russia / US CHIPS Act a game changer

San Diego, CA, July 6, 2022: TECHCET—the electronic materials advisory firm providing business and technology information— is forecasting semiconductor manufacturing materials to top US$65 B for 2022, a healthy 8% above 2021. “Semiconductor demand has remained strong through the first part of the year and average selling prices for materials are trending upwards,” cited Lita Shon-Roy, TECHCET’s President/CEO. In anticipation of slower market conditions, semiconductor materials market growth is currently forecasted to increase just over 2% in 2023 before further improving in 2024. “This is in keeping with cycles in demand and inventory volumes,” said Shon-Roy, as “per the latest TECHCET Critical Materials Reports™,” shown in the figure below.


While demand remains strong in 2022, a number of issues are impacting materials supply and pricing. The Russia/Ukraine region is a major part of the oil and natural gas supply chain, of which energy, specialty gases and helium are dependent. It was a region expected to play a significant role in the supply of helium this year, in addition to supporting neon and fluorocarbon production used for semiconductor manufacturing. Due to the turmoil in this area, alongside related economic sanctions against Russia, supply of these and other key gases have been curtailed, straining supply-chains around the world. Additionally, energy costs have steeply risen creating cost escalation of materials production worldwide.

Monday, July 11, 2022

AlixLabs at AVS ALD ALE 2022 in Ghent, Belgium

AlixLabs AB participated and presented at The AVS 22nd International Conference on Atomic Layer Deposition (ALD 2022) featuring the 9th International Atomic Layer Etching Workshop (ALE 2022) in Ghent, Belgium June 27 to 29.

Yoana gave her oral presentation in session LE1-TuA-4 In-situ Optical Emission Spectroscopy as a Tool to Characterize Cyclic Quasi-Atomic Layer Etching, Yoana Ilarionova, Lund University, Sweden; M. Karimi, AlixLabs, Sweden; D. Lishan, D. Geerpuram, Plasma-Therm LLC, USA; R. Jafari Jam, D. Suyatin, J. Sundqvist, AlixLabs, Sweden; I. Maximov, Lund University, Sweden

Jonas gave an invited talk for TECHCET LLC CA in: AA2-TuM2-1 High ALD Equipment and Precursor Demand and 5-Year Forecast Due to Continued Semiconductor Device Scaling and Fab Expansions.

Dmitry as part of the AVS ALE Scientific Committee moderated the session ALE1-TuA In situ Studies, Mechanisms, and Modeling of ALE. We had a fantastic time and met a lot of old friends and made new ones!


Team photo: Reza Jafari Jam, Jonas Sundqvist, Yoana Ilarionova and Dmitry Suyatin.


Reza and Yoana taking on the ALD / ALE industrial exhibition.


Ghent by night, view from the Beneq party in the main castle - Gravensteen.


Dinner in a Castle.

Boat trip in beautiful Ghent


New slim line of MFCs and Valves from Fujikin.


Dmitry and Jonas met up with AlixLabs' long-time supporters Prof. Fred Roozeboom and Dr. Jacques Kools.


Yoana getting questions from Prof. Steven .M. Geroge himself.


Yoanas title slide.


ALE - the icing on the cake


Angélique Raley from Tokyo Electron USA giving the best ALE talk!


AlixLabs sponsored the Social Media Chair 2022 - please check Twitter by the Social Media Chairs @Mick__geek and @hacp81
 for more famous ALD and ALE people 


AVS ALD ALE 2022 Page: ald2022.avs.org/

New world records: perovskite-on-silicon-tandem solar cells

EPFL and CSEM smash through the 30% efficiency barrier for perovskite-on-silicon-tandem solar cells —setting two certified world records 

Neuchâtel, July 7, 2022 – For the first time, an efficiency of 30% for perovskite-on-silicon-tandem solar cells has been exceeded thanks to a joint effort led by scientists at EPFL’s Photovoltaics and Thin Film Electronics Laboratory in partnership with the renowned innovation center, CSEM. Independently certified by the National Renewable Energy Laboratory (NREL) in the United States, these results are a boost to high-efficiency photovoltaics (PV) and pave the way toward even more competitive solar electricity generation.


Left and right panels: Schematics of perovskite-on-silicon tandems that are either flat or textured on their front side. Upper central panels: scanning electron microscopy images of the two types of devices developed by EPFL and CSEM. Lower central panels: corresponding picture. Credit: D. Türkay (EPFL), C. Wolff (EPFL), F. Sahli (CSEM), Q. Jeangros (CSEM).

More information: LINK

By Abhishekkumar Thakur 

Thursday, June 30, 2022

Back to Basics: Understanding Conformality with Riikka Puurunen – ALD Stories Ep. 14

Back for her second episode, Professor Riikka Puurunen is bringing us back to the basics with a deep dive on conformality. Recorded live from the Harald Herlin Learning Center at Aalto University, Tyler and Riikka talk about the all-important property of ALD. In this episode, Riikka explains the history of conformality in ALD, her recent paper on modeling collaboration, the origins of the PillarHall conformality test structures, and a conversation on open science.


One question came up, when was ALD first used for high aspect-ratio DRAM capacitors? It was 2004 by Samsung Samsung begins making DRAMs on 90-nm process - EETimes

Chipmetrics has commercialized the PillarHall test chip and more information can be found here: Chipmetrics

PillarHall – introduction in SlideShare

PillarHall – introduction in YouTube

PillarHall – short introduction in YouTube

Video: How to use PillarHall test chip

PillarHall Web Site


Chipmetrics at ALD 2022 in Ghent.





Monday, June 27, 2022

ALD/CVD Precursor Markets – Burgeoning Applications

Advanced Logic and Memory Applications require more deposition materials.

San Diego, CA, June 27, 2022: TECHCET—the electronic materials advisory firm providing business and technology information— reports that the Total ALD/CVD precursor market grew 21% in 2021, reaching US$1.39 billion and is forecasted to grow 12% in 2022. The 2022 Precursor market will top US$1.56 billion due to strong industry growth overall, driven by higher production volumes of < 7nm logic devices and higher increased stacking and layers in 3DNAND devices. The transition to EUV lithography for DRAM fabrication will also result in opportunities for increased precursor revenues. More details on these market trends will be revelaed in TECHCET’s presentation given at the 2022 ALD Conference, starting this week in Ghent, Belgium, by Jonas Sundqvist, Ph.D., or can be found in TECHCET’s newly released Critical Materials Reports™ on ALD/CVD Metal Precursors and Dielectric Precursors.


“ALD and CVD are a materials and chemistry rich industry segment with major development efforts in place, with strong prospects for growth, and for the need of new materials”, states Jonas Sundqvist, Sr. Technology Analyst at TECHCET. “New manufacturing solutions designed to meet both cost and performance will rely on ALD precursor materials.”

New materials and related process technologies are being driven by changes in device design. For advanced logic, new precursors are required for transistors to form high-κ gate dielectrics, metal gate electrodes, strain/stress epi of the channel and channel materials. DRAM memory cells continue pushing for higher-κ capacitors. And advanced devices, especially logic, demand improved interconnect wiring, barriers, seed layers, selective via capping and encapsulation, insulators, as well as new and/or more dielectrics to support EUV and advanced ArFi photolithography.

Emerging challenges persist as a result of continued dimensional scaling addressed with materials, especially new materials deposited by ALD. Area selective deposition has been a trend in the past 5 years with a growing R&D community to implement this approach in future devices.

For device specific details on the ALD/CVD Precursor markets & segments get TECHCET’s newly released Critical Materials Report™ here: https://techcet.com/product-category/ald-cvd-precursors/

Friday, June 24, 2022

Hydrogen Peroxide Gas on the road from R&D to HVM for superior HZO films

Device shrinkage, three-dimensional and High Aspect Ratio (HAR) structures, and lower thermal budgets drive the continued search for new materials. A by-product of this search is a need for better oxidants for atomic layer deposition (ALD) and other thin film deposition processes.

While metal usage is rapidly expanding across the periodic table, oxidant choices are few: water, O2, ozone, and oxygen plasma being the leading choices for thin-film processing.

Each oxidant has its strengths and weaknesses. Plasma has limitations with the line of sight and may damage underlying sensitive channel materials or metal interconnects. Ozone is too aggressive with most metals. Water and oxygen are not reactive enough for today’s lower thermal budgets and more demanding precursors. Therefore, new oxidants could help address low-temperature thermal applications and simplify precursor design and selection.

At RASIRC, the investigation began for alternative oxidants when water vapor proved too limited for many ALD applications. Interest in delivering gas generated from hydrogen peroxide liquid began in 2007, with the first commercial sales in 2011 and 2012.

While the perception of the semiconductor industry is one of rapid innovation, the adoption of new technology is a slow process. If successful, it can frequently exceed a decade to reach high volume manufacturing.

Recently, RASIRC presented (April 2022 CMC2022, AZ, USA) benchmarking hydrogen peroxide vs. water and ozone in ALD of ferroelectric hafnium zirconium oxide (HZO). HZO is one of the primary candidate materials for new non-volatile memory using a capacitor device; it can be integrated into both Logic devices and as a stand-alone memory chip similar to Flash memory.

RASIRC and UT Dallas fabricated capacitor structures (MIM) and deposited HZO using water, ozone, or hydrogen peroxide at comparable process conditions.

The first finding was that the growth rate per cycle (GPC, below left) was considerably higher in the hydrogen peroxide case, essentially lowering the overall process time and precursor consumption of rather expensive Hafnium and Zirconium precursors. The hydrogen peroxide HZO films also proved to have a higher density (XRR, below middle) and lower etch rate (wet etch rate below right).


Growth rate per cycles, density by X-ray Reflectivity (XRR) and wet etch rate determination of HZO films deposited by ALD using either hydrogen peroxide, water or ozone.

Higher density metal oxide films are a sure sign of better electrical performance regarding high-k dielectrics and ferroelectrics. First, the hydrogen peroxide films showed a comparably higher effective k-value, lower leakage current (Jg), and could withstand a higher breakdown voltage (VBD), as seen below right. Water results were inferior to both ozone and hydrogen peroxide are not shown for clarity.

Indicative for ferroelectric phase content is a peak at approx. 2T= 30.3 deg and 35.8 (below right). In X-ray diffractograms, when comparing hydrogen peroxide vs. ozone, it[JS1] was shown that the hydrogen peroxide films could show a higher orthorhombic (ferroelectric) phase content at a lower thermal budget, i.e., the onset temperature for crystallization. Even though the orthorhombic ferroelectric phase is metastable over preferred tetragonal and monoclinic HfO2 and ZrO2 most stable phases, this can be understood that the atoms in higher density and purer hydrogen peroxide films will find their optimum positions under given conditions in the lattice faster due to less disturbance from contamination species that has to diffuse out of the lattice before a ferroelectric phase content can crystalize quenching the HZO films into the metastable ferroelectric phase.


Leakage (Jg) vs breakdown voltage (VBD) and gracing incidence x-ray diffraction (GI-XRD) after post deposition anneals for hydrogen peroxide HZO films compared to ozone HZO films.

The promising results above for higher quality ferroelectric films were then proven by complete ferroelectric electric characterization sweeping the current and voltage across the capacitor structures accordingly. As seen below in the P-E hysteresis curves, a clearly defined hysteresis response curve could be verified for hydrogen peroxide HZO films at a lower RTA temperature than for ozone films, the onset of 325 vs. 350 deg C. It may seem like a slight difference, but please keep in mind that the overall thermal budget for device integration in copper interconnect layers is in the range 350 to 390 deg.C depending on layer and technology node, and it is critical to stay below this temperature and as can be seen below this study yielded beautiful ferroelectric hysteresis at 350 deg. C for hydrogen peroxide, whereas ozone films had to go up to the danger zone of 400 deg. To do the same.

P-E hysteresis curves for hydrogen peroxide (right) and ozone (left) ferroelectric HZO films for different RTA thermal budgets.

Finally, TEM analysis showed that films could be downscaled to 5 nm film thickness and most probably below, staying perfectly intact even though a high roughness metal bottom electrode was used. 


High-resolution transmission electron microscopy (HR-TEM) of ferroelectric HZO films deposited by ALD and using RASIRC hydrogen peroxide technology.

To conclude, HZO ferroelectric films showed many advantages when hydrogen peroxide was employed compared to water and ozone:

· Higher device yield as measured in the number of functional ferroelectric capacitors

· Higher density films with lower wet etch rate

· Higher effective k-value

· Faster growth (ALD GPC)

· Lower film thickness for yielding films in electrical testing

· Lower leakage current and higher breakdown voltage

· Crystallization onset for ferroelectric phase content for lower thermal budgets (RTA temperature)

Next you can meet RASIRC at the AVS 22nd International Conference on Atomic Layer Deposition (ALD 2022), will be a three-day meeting 26-29th of July in Ghent Belgium, dedicated to the science and technology of atomic layer-controlled deposition of thin films and now topics related to atomic layer etching. Jeff Spiegelman, CEO of RASIRC will be presenting “Higher Effective Dielectric Constant of Hafnium Oxide When Grown with Hydrogen Peroxide Compared to Water Vapor” in session AF-MoP18 on 27th of June.

About RASIRC

RASIRC transforms liquids into dynamic gases that power process innovation in semiconductor and adjacent markets. By commercializing molecules for lower temperature processes, RASIRC patented technology enables the manufacture of atomic-scale oxides, nitrides, and metals. Innovative products such as BRUTE Peroxide, BRUTE Hydrazine, the Peroxidizer®, and Rainmaker® Humidification Systems are being used to develop solutions for 5G, AI, IOT, and advanced automation.

What makes RASIRC a unique industry leader is our technical expertise and commitment to solving complex industry challenges for our customers. Our team of industry experts has a proven track record of being first to market by efficiently delivering state of the art technology that reduces cost, improves quality, and dramatically improves safety. With our customers at the forefront of all we do, we continue to research, develop, and design innovative products that purify and deliver ultra-pure gas from liquids for the semiconductor and related markets. Contact RASIRC to help solve your complex problems. P: 858-259-1220, email info@rasirc.om or visit http://www.rasirc.com

Thursday, June 23, 2022

TANAKA Establishes New Ruthenium Film Deposition Process That Contributes Toward Improved Durability Of Semiconductors

TANAKA Kikinzoku Kogyo K.K. (Head office: Chiyoda-ku, Tokyo; Representative Director & CEO: Koichiro Tanaka), which operates the TANAKA Precious Metals manufacturing business, announced today that TANAKA has established a two-stage film deposition process using the liquid ruthenium (Ru) precursor "TRuST." TRuST is a precursor that has excellent reactivity with both oxygen and hydrogen and can form high-quality ruthenium films. This process is a two-stage atomic layer deposition (ALD) process that uses hydrogen film formation to create a thin anti-oxidation film and oxygen for the deposition of a high-quality ruthenium film. It eradicates concerns that the substrate will become oxidized and, at the same time, can prevent the drop in ruthenium purity that occurs during hydrogen film deposition


The film deposition process was proposed by Professor Soo-Hyun Kim from the School of Materials Science and Engineering, College of Engineering, Yeungnam University in South Korea. The development and evaluation of the film deposition process were jointly conducted by Professor Kim and TANAKA Kikinzoku Kogyo.

This technology is expected to achieve greater miniaturization and improved durability of semiconductors. It can therefore be expected to be used in data centers and smartphones - which require even greater data processing capabilities - and contribute toward advanced technologies such as IoT and autonomous driving, which require sophisticated technological innovations.

Two-Stage Film Deposition Process Using Oxygen And Hydrogen

TANAKA Kikinzoku Kogyo is developing high-purity precious metal precursors centered on ruthenium for next-generation semiconductors. So far, single-stage film deposition using oxygen has been the mainstream process for film deposition. However, the company has now succeeded in a two-stage film deposition process using oxygen and hydrogen.

This two-stage film deposition process reduces the risk of surface oxidation of the base caused by hydrogen film deposition and allows high-purity film deposition that maintains ruthenium purity at almost 100% using oxygen film deposition. Furthermore, by forming the base first using hydrogen film deposition, the ruthenium film on top of the base created using oxygen film deposition will be smooth and dense, achieving a lower resistance than before.

Generally, specific resistivity increases when film thickness decreases, which is an issue in film deposition of semiconductors. With this new process, it was confirmed that an even lower resistance results from a two-stage film deposition that uses hydrogen in addition to oxygen film deposition, especially in the range of 10 nm and below. As semiconductors become even smaller in scale in the future, demand for thinner film deposition with low resistance is also expected for ruthenium films, and a two-stage film deposition allows this issue to be resolved. In addition, the new low-resistance, high-purity ruthenium film created by the two-stage film deposition can be achieved using the same raw materials and film deposition temperature for both stages. Therefore, film deposition is possible using the same film deposition equipment, allowing capital investment costs to be suppressed. Details will be announced at the AA2-TuA: ALD for BEOL session of the ALD 2022 conference being held in Ghent, Belgium, on June 28, 2022.

TANAKA Kikinzoku Kogyo's Liquid Ruthenium Precursor "TRuST"

In the past, the most common thin film and wiring materials used for semiconductors were copper, tungsten, and cobalt, but there are increasing expectations for the precious metal ruthenium to promote greater miniaturization of semiconductors because of its lower resistance and higher durability. Therefore, TANAKA Kikinzoku Kogyo developed TRuST - a liquid ruthenium precursor for chemical vapor deposition (CVD) and ALD that achieved the world's highest vapor pressure value - and started providing samples in 2020.

By increasing to the world's highest vapor pressure value, which is more than 100 times higher than existing precursors, this precursor raises the concentration of precursor in the film deposition chamber and the adsorption density of precursor molecules on the substrate surface, achieving excellent step coverage and improved film deposition speed.

State of the Semiconductor Industry and Background

The progress of advanced technologies such as IoT, AI, 5G, and the metaverse has led to rapidly increasing volumes of digital data used by digital devices such as smartphones. Therefore, in the development of semiconductors, the need for even greater miniaturization is increasing to enable the creation of devices with higher performance and lower energy consumption. In the aspect of durability, degradation due to base oxidation is also a major issue in semiconductor development. Furthermore, the development of electric vehicles and self-driving cars requires similar needs for the miniaturization of automotive semiconductors along with further improvement in durability.

In the semiconductor industry, which will require greater miniaturization and improved durability in the future, TANAKA Kikinzoku Kogyo seeks to further reduce costs and achieve higher quality by improving the film deposition speed of liquid ruthenium precursors. At the same time, the company will contribute to greater miniaturization and improved durability of semiconductors to support the development of new advanced technologies enabled by semiconductors.

How Forge Nano is Engineering the Future, One Atom at a Time

Utilizing proprietary nano-coating technology, Forge Nano is able to fundamentally improve nearly any material on earth at the atomic level.

THORNTON, Colo., June 23, 2022 (Newswire.com) – Forge Nano, leaders in atomic layer deposition (ALD) technology and equipment, are working to unlock the next generation of materials science. Through a full product line of ALD equipment addressing large scale manufacturing all the way down to fundamental R&D, Forge Nano has developed nano-coating solutions that are cost-effective, and can improve nearly any product from the atoms up.

“For decades, ALD has been relegated to bench-top exercises and the world of peer-reviewed articles,” says James Trevey, Ph.D., CTO of Forge Nano. “It’s like we’re selling wireless internet in a world of Cat 5 ethernet cables. ALD delivers greater performance for a lower cost than incumbent technology for nearly any application, and now we have brought this technology to the commercial environment at true manufacturing scale.”


Atomic Layer Deposition (ALD) is a surface engineering technique whereby an extremely thin coating (as thin as a single layer of atoms) is applied to a wide range of materials, powders, or objects. This process can be repeated to build up multiple layers on nearly any surface, producing robust coatings that can be engineered to enhance or add to the characteristics of the material being coated.

Conventional coating techniques such as physical vapor deposition (PVD) and chemical vapor deposition (CVD) have been the standard techniques used in many industries in the past, but as ALD is now available for any material at commercial scale, their time is limited. Forge Nano’s team of scientists and engineers have developed a line of ALD tools that make the technology cost-effective and practical to apply in small-scale lab environments all the way up to full-scale commercial manufacturing settings. Case in point – Forge Nano has already demonstrated commercial success in many markets, including batteries, pharmaceuticals, and semiconductors.

Batteries – Making better, longer lasting, safer batteries

Forge Nano ALD coatings have been demonstrated to improve energy density, lifetime, safety, and cost of batteries. In an electric vehicle these benefits would translate to a lower cost, longer range, faster-than-fuel recharge times, and an EV battery that can last for at least 20 years and is better suited for recycling than current EV batteries. Forge Nano’s ALD techniques have also been shown to be more cost effective, more efficient, more precise, and more environmentally friendly than batteries made with other coating techniques.

Pharmaceuticals – Imagine controlled, single-dose, temperature-stable vaccines that can be effectively distributed around the globe without the fear of spoilage.

Forge Nano ALD coatings have been used by pharmaceutical companies to apply various characteristics to medications or vaccines. ALD coatings can make a vaccine thermostable, eliminating the need for refrigeration. Time release properties can be applied as well, allowing multiple doses to be combined into a single treatment or injection. This can make the medication or vaccine easier to distribute to rural areas and eliminates the need for additional doses or boosters.

Semiconductors – Optimizing Next-Gen devices at the atomic scale.

Forge Nano ALD coatings can be applied to semiconductor wafers and components to create hermetic, pin-hole free, low stress thin films that offer excellent uniformity and precision required by semiconductor manufacturers. In addition to producing superior coatings, Forge Nano tools can produce ALD coatings faster and more efficiently than anyone else, making Forge-enabled semiconductors

Thanks to the scalability of Forge Nano’s extensive research and development, ALD technology that was once thought of as too expensive is now accessible and practical even at the smallest of scales. Forge Nano is using its manufacturing expertise to provide R&D equipment to universities, national labs, and centers of excellence, establishing ALD as a viable commercial pathway for materials science researchers. This is contrasted by the many companies Forge Nano has worked with to integrate ALD into their manufacturing processes, installing high-volume equipment capable of coating enormous amounts of materials, powders or objects.

For those not ready to make the investment in Forge Nano’s ALD equipment, R&D and toll coating services are available as well. Forge Nano offers their world-class ALD technical team to develop coating solutions and run proof of concept tests. Forge Nano is also uniquely equipped to offer toll coating services, where an organization may entrust Forge Nano to produce the ALD coatings with their in-house equipment.

To find out more about Forge Nano’s proprietary atomic layer deposition (ALD) processes and equipment, visit ForgeNano.com.

Wednesday, June 22, 2022

Solar Energy Research Institute of Singapore (SERIS) Opts for SALD

The Solar Energy Research Institute of Singapore (SERIS) gears up perovskite solar cells for industrial tandem cell production

Eindhoven/Netherlands, Singapore, 18 June 2022 - The Solar Energy Research Institute of Singapore (SERIS) at the National University of Singapore (NUS) announces that it will upgrade its "Spatial Atomic Layer Deposition" (SALD) equipment. SoLayTec and SERIS have been working closely together for over a decade in the field of silicon solar cells. Now, SERIS states that SoLayTec will upgrade its existing ALD system using the latest technology of SALD BV, a Dutch technology start-up, for development of scalable perovskite-silicon tandem solar cells.



"Upgrading to the new SALD equipment brings us significant advantages," explains Dr. Shubham Duttagupta, Deputy Director of the Next-Generation Industrial Solar Cells & Modules Cluster at SERIS. The Dutch company SALD BV has developed a unique, patented technology for applying precise coatings on an industrial scale that can be as thin as a single atom. These so-called nanocoatings are promising to revolutionize numerous industrial manufacturing processes, and thus entire branches of industry. In the solar industry, SALD coatings are key for perovskite-silicon tandem solar cells, which can achieve efficiencies far above the theoretical limit of silicon-only solar cells, which are the most widely used solar cells today. It is precisely in this new area where SERIS aims to use the new SALD technology. Thanks to the SALD process, new solar cell materials can be used, including tin oxide and transparent conductive oxides, as well as novel passivation and tunnel recombination layers. The technologies developed by SERIS will be made available to industrial solar cell manufacturers through licensing agreements.



Perovskite solar cells are highly efficient, easy to process and inexpensive to produce, but still face technical challenges regarding their long-term stability. An atomically thin coating, as can be achieved with the SALD technology, makes the cells significantly more robust. SERIS wants to take the leap “from lab to fab”, i.e., from the laboratory environment to large-volume production with the new SALD machine. The potential for perovskite-silicon solar cells is great: According to forecasts, the global market is expected to exceed two billion dollars by 2027.

SALD BV has developed a unique worldwide patented technology for applying coatings that are as thin as a single atom on an industrial scale, termed "Spatial Atomic Layer Deposition" or SALD (www.spatialald.com). These atomically-thin coatings can bring revolutions to entire industries, such as the manufacturing of batteries for cars and smart devices, and the solar energy industry.

Further information: SALD BV, PO Box 520, 5600 AM Eindhoven, The Netherlands,
Web: www.spatialald.com, E-Mail: info@spatialald.com, Tel: +31 40 23 80 500,

contact: Lonneke van Wel, Tel. +31 40 238 05 00, E-mail: lonneke.vanwel@spatialald.com

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