Thursday, September 1, 2022

Supply Tightening Expected for Specialty Electronic Gases

Demand to outpace supply for NF3 and WF6 unless alternatives come into play

San Diego, CA, August 31, 2022: TECHCET—the electronic materials advisory firm providing business and technology information— reports that the supply of Specialty Gases, nitrogen trifluoride (NF3) and tungsten hexafluoride (WF6) for electronics could tighten amongst high projected demand by 2025-2026. This forecasted steep trajectory will challenge supply-chains to keep pace. However, alternatives being developed could interrupt this trend. Both NF3 and WF6 are part of a larger US$5 billion specialty gas segment forecasted to grow 30% over the next 5 years, to total US$6.5 billion by 2026. As shown below, NF3 is expected to grow even more steeply, 72% over the forecast period (as highlighted in TECHCET’s 2022 Critical Materials Report™ on Electronic Gases).


Alternatives for these gases are currently in development which could cause a shift in growth trends. The increasing demand for NF3 in electronic manufacturing, including flat-panel displays, has triggered concern among atmospheric scientists over emissions of nitrogen trifluoride, a potent greenhouse gas. Particularly, NF3 gas has a high Global Warming Potential (GWP) compared to other gases. Consequently, the electronics industry is looking at and considering processes for on-site fluorine generation that can use F2, in place of NF3, for chamber cleaning.

...

To read the full article, click here: https://lnkd.in/g25Fa3f2

For more information on the electronic gases market outlook, check out our newest Gases Critical Materials Report™ here: https://lnkd.in/gb95EBC

Wednesday, August 31, 2022

Webinar Atonarp’s Aston in-situ metrology solution for Spatial ALD

 

Register
Can’t attend the live webcast?  Register and we will send you a link to watch the recording at your convenience.

Overview:
 
Spatial ALD is emerging as a critical technology for the deposition of thin films for advanced memory and logic selective processing found in gate-all-around FETs, high aspect ratio contacts, DRAM capacitors, advanced NVM technology, and even self-aligned double patterning (SADP) lithography.  It has the promise of high throughput, highly conformal thin films using low temperature and low or no vacuum processing chambers.  However spatial ALD has challenges, gas mixing, platform rotation speed optimization, optimized gas purge flow, the variable concentration of reactant gases and safety considerations are some of the issues process engineers are working to optimize.  Atonarp’s Aston in-situ metrology solution will be reviewed and its key differentiations, being used by several spatial ALD OEMs to address these challenges, will be discussed.

What you’ll learn:
  • Spatial ALD advantages and challenges
     
  • Why speed with sensitivity and robustness matter in Spatial ALD metrology solutions
     
  • Aston Impact and Plasma metrology solutions and differentiation that is leading them to be used as key in-situ process control metrology in spatial ALD applications

Equipment Suppliers Brace For GaN Market Explosion - including Atomic Layer Etch (ALE)

According to a recent article in Semiengineering Power Electronics and RF will drive volume for equipment suppliers, with many new uses underway. According to industry experts interviewed, also ALD and ALE will benefit

“Through an ongoing development program, Lam Research has been establishing a suite of enabling process solutions for GaN semiconductor device fabrication,” said David Haynes, vice president of specialty technologies in Lam Research’s Customer Support Business Group. 

“Key to these capabilities is an atomic layer etch-based process that can provide ultra-low damage, atomic scale precision etching of GaN and related materials. The new, optimized processes can reduce the post etch sheet resistance of the as-etched GaN/AlGaN [aluminum gallium nitride] whilst the surface roughness of the etched material remains comparable to that of the incoming epitaxial layers. Such high-precision, low-damage etch capabilities are critical to the formation of p-GaN or recessed gate high electron mobility transistor (HEMT) architectures used to fabricate normally off GaN devices for power electronics applications.”



Lam’s Kiyo45 reactive ion etch (RIE) tool offering ALE processes of GaN and SiC materials Source: Lam Research

According to the article, Lam has developed proprietary solutions to speed up the ALE process and its ALE chambers can be used in both RF and power GaN fabrication.

Lam sees GaN on SiC RF devices as well established and will remain very important for high power applications in telecommunications infrastructure and defense. Fast development of GaN-on-Si epitaxy will move towards high volume applications for consumer products according to Haynes and explained further: “These will evolve alongside GaN-on-Si power devices that share many of the same process challenges. Today, most GaN-on-SiC RF devices are still made on 150mm or even 100mm wafers. The opportunity for GaN-on-Si devices to be readily processed on 200mm and in the future 300mm wafers, as well as the potential to use complementary metal-oxide semiconductor (CMOS) foundry capacity and even develop integrated solutions with CMOS, will all be key drivers for this transition.”

The Lam Research was early in high volume manufacturing with ALE (2016 BALD Engineering - Born in Finland, Born to ALD: Lam Research - New Atomic Layer Etching Capability Enables Continued Device Scaling) ALE chambers are now also part of their Kyo45 reactive ion etch product platform and offers (lamreserch.com):
  • Superior uniformity and repeatability enabled by a symmetrical chamber design, industry-leading electrostatic chuck technology, and independent process tuning features
  • High productivity with low defectivity on multi-film stacks enabled by in-situ etch capability, continuous plasma, and advanced waferless auto-clean technology
  • Improved critical dimension uniformity using proprietary Hydra® technology that corrects for incoming patterning variability
  • Corvus® plasma sheath tuning for maximum yield of wafer-edge dies
  • Atomic-scale variability control with production-worthy throughput enabled by plasma-enhanced ALE capability
  • Upgradable products for low cost of ownership over several device generations
Sources: 

- Equipment Suppliers Brace For GaN Market Explosion

- Lam Research www.lamresearch.com

Tuesday, August 30, 2022

Comparison confirms that SMIC reaches 7nm without access to western equipment & technologies

Similarities with TSMC 7nm have been found

After TechInsights revealed their initial findings on the SMIC MinerVa Bitcoin mining processor, their team did further analysis and comparison against TSMC 7nm. This new analysis confirms that despite current sanctions restricting access to the most advanced equipment technologies, Chinese Semiconductor Manufacturing International Corporation (SMIC) has used 7nm technology to manufacture the MinerVa Bitcoin Miner application-specific integrated circuit (ASIC).

The TechInsights analysis also uncovered many similarities between the SMIC 7nm and the TSMC 7nm, which are available in our comparison brief.




According to the SeekingAlpha assessment earlier this year (Applied Materials: SMIC Move To 7nm Node Capability Another Headwind (NASDAQ:AMAT) | Seeking Alpha) SMIC is using a large amount of multiple pattering mask layers like in the first TSMC and Samsung 7 nm nodes (N7). 

"At 7nm, normally 15 DUV systems and 5 EUV systems are demanded, depending on chip type and company. However, since SMIC is not permitted to use EUV, then they will be substituted by DUV, and 20 DUV systems will be used.

In both cases, multiple patterning is done to delineate that pattern, whether it is 28nm or 7nm. This multiple patterning process is more or less a trick to reach even the 28nm dimensions. The multiple patterning is typically a combination of deposition, etch, and lithography steps.

If we look at Chart 3 below, using immersion DUV (ArF-1) at the 20nm node there are 13 mask layers, each of which uses multiple dep-etch steps. If we move across the top of the chart, at 10nm there are 18 mask layers, an increase of 50% in the use of deposition-etch steps.

Multiple patterning at the 7nm node, as shown in the bottom left of the chart, requires 27 mask layers. However, by switching to EUV (bottom right) at 7nm, only 14 mask layers are required, similar to the 20nm node with DUV.

The terminology is as follows in switching from DUV to EUV:Double litho, double etch (LELE) process will be eliminated

While ArF-I would continue to be used for the self-aligned double patterning (SADP) and
Self-aligned quadruple patterning (SAQP) processes."
 

Table from SeekingAlpha as cited above

From an ALD point of view, the FEOL and metallization up to M2 use 19 in the case of Immersion Lithography (N7) vs 10 in the case of EUV (N7+) ALD spacer-defined multiple patterning masks (SADP or SAQP). However, the bigger difference is in etch for LELE etc., where EUV N7+ uses only 2 such masks.


Monday, August 29, 2022

Materion to develop advanced chemicals for EV batteries, semiconductor chips at new facility

Materion Corporation (NYSE: MTRN), a world leader in high-performing advanced materials, announced today that it has established a new facility in Milwaukee, Wisconsin to accelerate the growth of advanced chemical solutions for the semiconductor and electric vehicle (EV) battery markets.

The new 150,000 square foot facility expands the company’s capacity to produce Atomic Layer Deposition (ALD) materials for the most sophisticated semiconductor chips and provide advanced chemicals for the development of next-generation battery technology for EV’s. Production capabilities are expected to ramp up during the first half of next year.

“This expansion is in direct response to the confidence that our customers have in Materion as a critical partner in the development of game-changing technologies to advance growth aligned with these exciting megatrends,” President and CEO Jugal Vijayvargiya said. “We are proud of the role that we will play in the development of the most technically advanced semiconductor chips for a wide variety of applications as well as next-generation batteries that will support the broader adoption of electric vehicles globally.”

Building on Materion’s existing portfolio of electronic materials and premium thin film target solutions, the expansion of its ALD capabilities will significantly enhance the company’s position as a leading global supplier to the high-growth semiconductor industry. The move follows the company’s successful 2021 acquisition of the HCS-Electronic Materials business, which added tantalum- and niobium- based solutions to Materion’s portfolio of precious and non-precious metal targets, extending the company’s global reach and expanding its position with leading semiconductor chip manufacturers.

On the EV front, Materion is working with a number of leading battery manufacturers on the development of inorganic chemicals to be used in their next-generation battery solutions focused on enabling longer range, faster-charging and enhanced safety. Following a multi-year R&D partnership, one specific customer is funding $6 million to establish a prototype line in the new Milwaukee facility. Materion’s relationships with next-generation battery customers are expected to further strengthen the company’s already strong position as a critical supplier to the automotive market, as today the company develops advanced materials for use in a wide variety of applications that include battery and electric connectors and lidar optics.

About Materion

Materion Corporation is headquartered in Mayfield Heights, Ohio. Materion, through its wholly owned subsidiaries, supplies highly engineered advanced enabling materials to global markets. Products include precious and non-precious specialty metals, inorganic chemicals and powders, specialty coatings, specialty engineered beryllium alloys, beryllium and beryllium composites, and engineered clad and plated metal systems.

Source: Materion Corporation - Materion Establishes New Facility to Accelerate Growth in the Semiconductor and Electric Vehicle Markets




Sunday, August 14, 2022

ALD IGZO application for Monolithic 3D Integration

Improvement of device performance and decrease of power consumption by scaling down in the semiconductor industry have almost reached the physical limit. Additionally, the possibility of memory’s capacitor collapsing has been increasing due to capacitors becoming narrower and higher so it can lead to reduced device reliability.

To escape the limit of scaling down, Monolithic 3D (M3D) technology which stacks layer by layer third dimension integration, would be available instead of planar scaling. Because it is scalable, performable, and economic, lots of companies, institutes, and universities are actively developing for its commercialization.

There is a limitation of upper layer process temperature because dopant diffusion, property degradation, and dimensional change in the lower device can happen during M3D integration. Therefore, to prevent the lower device from deteriorating, the process temperature for upper channel materials must be limited to not more than 450℃. IGZO has great properties and can be processed at low temperature so applying IZGO to M3D devices has been studied and developed, such as IGZO OSFET stacking on CMOS devices or RRAMs.



< Diagram of Monolithic 3D IC & Lucida™ S300 ALD >

Recently, IGZO is being applied to capacitor-less DRAM (2T0C) because IGZO TFT has very low off current (Ioff) by long retention time.

ALD IGZO enables conformal deposition and excellent thickness controllability. Also, composition control by cycle number ratio is accurate, so the bilayer structure can be easily deposited. It is expected to be applied for superb M3D devices.

NCD has been developing IGZO batch IGZO-ALD system with its creative technology, and it shows excellent film properties and high throughput with large area processing. LucidaTM S Series is available for developing M3D integration of Logic, Memory and electro-optics, etc.

LucidaTM S Series for semiconductor is a high throughput ALD system with thermal or plasma process for 300 mm wafers and is able to deposit various oxides (HfO2, ZrO2) and metals (TiN, TaN, Ru) with excellent property and film uniformity.

Source: www.ncdtech.co.kr

Wednesday, August 3, 2022

Swagelok supports semiconductor manufacturers with new ALD valve

New Swagelok® ALD7 UHP Valve Enables Semiconductor Manufacturers to Improve Chip Yield
Advanced diaphragm valve provides maximum dosing precision, fast actuation, and consistent performance over tens of millions of production cycles.

Solon, Ohio (August 2, 2022) — Swagelok, a leading provider of fluid system products, assemblies, and related services, has announced the release of the Swagelok® ALD7 ultrahigh-purity (UHP) diaphragm valve—a product capable of delivering the consistency and long service life necessary for semiconductor fabricators to improve chip yields. Compared to Swagelok’s current top-of-the-line ALD6 valve, the ALD7 provides better flow consistency, flow capacity, and actuator speed. It also offers the performance at high temperatures necessary to allow chip fabricators to overcome limitations in current production processes and keep up with demand.




ALD7 valves can be integrated into either new tools or legacy equipment to provide improved flow capacity (up to 0.7 Cv) in the same 1.5-inch (38.1mm) footprint as existing valves, helping fabricators keep up with the strong global demand for chips that power advanced technology. ALD7 valves deliver precise dosing over tens of millions of ALD (atomic layer deposition) production cycles by actuating more quickly and consistently than even its ALD6 predecessor. The actuator’s open and close response time can be less than 5ms. The actuator is immersible to 150°C (302°F) and the valve body is rated to 200°C (392°F), allowing the valve to better support low-vapor-pressure precursors that require high temperature delivery. This gives fabricators the control needed to maximize throughput and yield.

ALD7 valves feature a compact design with an integrated thermal isolator, allowing system designers to maximize limited space near the reaction chamber of chip production tools. The valves are also highly resistant to corrosive gases used in ALD processes, with valve bodies comprised of proprietary ultrahigh-purity Swagelok 316L VIM-VAR stainless steel. As a result, semiconductor tool manufacturers can rely on ALD7 valves to provide consistent performance under variable process conditions, enhancing productivity for customers without increasing operating costs.

“Since developing the industry’s first fit for purpose ALD valve nearly 20 years ago, we have worked with semiconductor customers to better understand the levels of performance needed from our UHP valves as chip manufacturers continue shrinking process nodes and maximizing chip yields,” explains Ben Olechnowicz, product manager at Swagelok. “This has resulted in pursuing innovative thinking and developing valves to actuate faster, perform in more extreme conditions, and allow higher coefficients of flow in demanding atomic layer processes. We designed the ALD7 as a reliable round-the-clock production valve that checks all those boxes, giving our customers the consistency of performance necessary to stay ahead in an industry that is seemingly always changing and demanding more from manufacturers.”

The ALD7 is available today in a modular surface-mount configuration with a high-flow C-seal or in straight configurations with a tube butt weld, and Swagelok VCR® face seal fitting end connections. High-temperature electronic position sensors, optical position sensors, or solenoid pilot valve configurations are also available as add-on components.

For more information on Swagelok’s new ALD7 UHP diaphragm valve, visit swagelok.com or contact your local Swagelok sales and service center.

Sunday, July 17, 2022

Chipmetrics High Aspect Ratio Test Chip launched at ALD2022 in Ghent

At the recent AVS ALD2022 Conference in Ghent, Belgium, I made several rounds in the ALD industrial exhibition and met up with Chipmetrics Oy from Finland. Chipmetrics produce test structures, chips, and wafer concepts for advanced materials and microelectronics manufacturing, many specifically for ALD. Their main product – PillarHall test chip – is developed for advanced thin film process conformality characterization to accelerate applications of conformal 3D thin films. The Pillar Hall test chip has a lateral, very high aspect ratio structure to determine conformality when developing new ALD hardware, processes, and precursors.


Chipmetrics at AVS ALD2022 in Ghent, Belgium (Lower photo: Zahra Ghaderi, Mikko Utriainen and James Song)

What caught my eye this time was their new vertical high aspect ratio test chip - VHAR1 silicon test chip which consists of an array of vertical high aspect ratio holes. The holes have a constant hole diameter of 1 μm, and a depth of 200 μm over the whole chip area 15 × 15 mm. The deposited film penetration depth profile can be measured by cross-sectioning as normally done with the vertical high aspect ratio test structures.

This structure resembles the situation in semiconductor devices such as DRAM, 3DNAND, and TSVs. It can undoubtedly get valuable information and understanding when developing ALD processes for large surface areas with high aspect ratios. Anyone that has developed new ALD processes knows that not only the aspect ratio plays a role but also the total surface area since you need to achieve a sufficient dose of the precursors at the right process conditions to achieve perfect conformality very fast to be productive and minimize precursor decomposition, "CVD effects" and have effective purging of precursors and ALD process byproducts.

For more information, please find contact information here to Chipmetrics: LINK





Links

PillarHall – introduction in SlideShare

PillarHall – introduction in YouTube

PillarHall – short introduction in YouTube

Video: How to use PillarHall test chip

PillarHall Web Site

About Chipmetrics:

Chipmetrics is a forerunner in productizing test structures, test chips, and wafer concepts for advanced materials and microelectronics manufacturing.

We are experts in thin film conformality characterization. Our main product – PillarHall test chip – is developed for advanced thin film process conformality characterization to accelerate applications of conformal 3D thin films.

Chipmetrics Oy is a part of the emerging Atomic Layer Deposition (ALD) industry and research community. Our headquarters are in Finland – in the country of the origin of ALD.


Friday, July 15, 2022

Global Total Semiconductor Equipment Sales On Track to Record $118 Billion in 2022

SAN FRANCISCO, July 12, 2022 /PRNewswire/ -- Global sales of total semiconductor manufacturing equipment by original equipment manufacturers are forecast to reach a record $117.5 billion in 2022, rising 14.7% from the previous industry high of $102.5 billion in 2021, and increase to $120.8 billion in 2023, SEMI announced today in releasing its Mid-Year Total Semiconductor Equipment Forecast – OEM Perspective at SEMICON West 2022 Hybrid.

The following results reflect market size by segment and application in billions of U.S. dollars:




Both the front-end and back-end semiconductor equipment segments are contributing to the market expansion. The wafer fab equipment segment, which includes wafer processing, fab facilities, and mask/reticle equipment, is projected to expand 15.4% to a new industry record of $101 billion in 2022, followed by a 3.2% increase to $104.3 billion in 2023.

"In line with the semiconductor industry's determined push to increase and upgrade capacity, the wafer fab equipment segment is poised to reach the $100 billion milestone for the first time in 2022," said Ajit Manocha, president and CEO of SEMI. "Secular trends across a diverse range of markets, coupled with strong investments in digital infrastructure, are powering another record year."

Driven by demand for both leading-edge and mature process nodes, the foundry and logic segments are expected to increase 20.6% year-over-year to $55.2 billion in 2022 and another 7.9%, to $59.5 billion, in 2023. The two segments account for more than half of total wafer fab equipment sales.

Strong demand for memory and storage continues to contribute to DRAM and NAND equipment spending this year. The DRAM equipment segment is leading the expansion in 2022 with expected growth of 8% to $17.1 billion. The NAND equipment market is projected to grow 6.8% to $21.1 billion this year. DRAM and NAND equipment expenditures are expected to slip 7.7% and 2.4%, respectively, in 2023.

After surging 86.5% in 2021, the assembly and packaging equipment segment is expected to grow 8.2% to $7.8 billion in 2022 and edge down 0.5% to $7.7 billion in 2023. The semiconductor test equipment market is forecast to grow 12.1% to $8.8 billion in 2022 and another 0.4% in 2023 on demand for high-performance computing (HPC) applications.

Regionally, Taiwan, China, and Korea are projected to remain the top three equipment buyers in 2022. Taiwan is expected to regain the top position in 2022 and 2023, followed by China and Korea. Equipment spending for other regions tracked, except for Rest of World (ROW), is expected to grow in 2022 and 2023.

Source: SEMI July 2022, Equipment Market Data Subscription


ASM International launches TENZA ALD Quad Chambers for silicon oxide gap-fill and liners on the XP8 platform

New process technology addresses 300mm advanced memory and logic/foundry applications with best film quality, highest productivity and lowest cost of ownership in its class.

San Francisco, USA – ASM International N.V. (Euronext Amsterdam: ASM) today announced TENZATM ALD, an innovative single wafer atomic layer deposition (ALD) process technology for 300mm wafers. TENZATM ALD is optimized for gap-fill applications and provides the best film quality, conformal coverage through the full trench and highest productivity in its class.

Quad chamber modules (QCMs) 30, 32, 34, and 36 are connected to four side surfaces of the vacuum chamber 22. Each QCM is a module having four reactor chambers (RC1 to RC4). Processing such as plasma film forming processing is performed on a substrate in each reactor chamber. (ASM Patent application US20170278074A1) LINK: BALD Engineering - Born in Finland, Born to ALD: ASM International enhances ALD productivity with new 300 mm XP8 Quad Chamber Module

TENZATM ALD is offered on ASM’s high productivity quad chamber module (QCM) architecture, with four tightly integrated reactors on each QCM. In a compact configuration, up to 4 QCMs running the TENZATM ALD process can be attached to the XP8 platform, enabling processing of up to 16 wafers at a time.

“TENZATM ALD leverages ASM’s production proven QCM quad chamber module architecture and XP8® platform, which have been in high volume manufacturing fabs for several years, to bring enhanced process capability at the lowest cost of ownership to the market. TENZATM ALD enables ultra-high aspect ratio (>100:1) gap-fill for advanced memory devices”, said Hichem M’Saad, Chief Technology Officer and Member of the Management Board.

TENZATM ALD utilizes a novel design optimized for ALD reactions, minimizing process volume for maximum precursor utilization efficiency, reducing precursor consumption up to 50% and increasing productivity more than double compared to conventional ALD approaches. Each reactor chamber controls the RF plasma power supply and matching system individually to improve process reproducibility. The small volume reactor also provides excellent defect performance and extended reactor life (run time before preventive maintenance). Process reactions are confined within each small volume reactor space to minimize consumable parts, making maintenance very easy and less costly.

TENZATM ALD enables a variety of silicon oxide applications for gap-fill and liners for a range of structures in advanced transistors, memory devices and interconnects. The industry can count on TENZATM ALD to deliver a high quality, reliable, repeatable, production proven gap-fill process with the lowest cost of ownership on the market today.

Deliveries of TENZATM ALD have begun to multiple global customers, among them leaders in memory device manufacturing. ASM’s mature compact ALD quad chamber module architecture has a proven track record with more than 2,000 reactors shipped to customers.

Thursday, July 14, 2022

Lam Research, Entegris, Gelest Team Up to Advance EUV Dry Resist Technology Ecosystem

Collaboration provides robust chemical supply chain for global chipmakers using the breakthrough technology and supports R&D for next-generation EUV applications


SEMICON WEST 2022, SAN FRANCISCO, July 12, 2022 – Lam Research Corp. (NASDAQ: LRCX), Entegris, Inc. (NASDAQ: ENTG), and Gelest, Inc, a Mitsubishi Chemical Group company, today announced a strategic collaboration that will provide semiconductor manufacturers worldwide with reliable access to precursor chemicals for Lam’s breakthrough dry photoresist technology for extreme ultraviolet (EUV) lithography, an innovative approach used in the production of next-generation semiconductors. The parties will work together on EUV dry resist technology research and development (R&D) for future device generations of logic and DRAM products that will help enable everything from machine learning and artificial intelligence to mobile devices.


A robust supply chain for process chemicals is critical to EUV dry resist technology integration into high-volume manufacturing. This new long-term collaboration further broadens the growing ecosystem for dry resist technology and will provide dual-source supply from semiconductor material leaders with provisions for continuity of delivery in all global markets.


LAM is a semiconductor processing and fabrication equipment designer and manufacturer who has announced a new dry photoresist technology in collaboration with IMEC and ASML. This new dry technology differs from the wet photoresist currently used in all commercial semiconductor foundries such as TSMC, Intel, Samsung, Micron, Global Foundries and SK Hynix. (source: SemiAnalysis LINK)




These stochastic defects lead to a variety of issues with the future 3nm/2nm nodes. One of these issues that can be mitigated by moving to dry deposit and develop is line collapse. When the solvent is washed away, the lines can become unstable and collapse. Other issues such as line edge roughness are also mitigated when moving to a dry deposit and develop flow. (source: SemiAnalysis LINK)

In addition, Lam, Entegris, and Gelest will work together to accelerate the development of future cost-effective EUV dry resist solutions for high numerical aperture (high-NA) EUV patterning. High-NA EUV is widely seen as the patterning technology that will be required for continued device scaling and advancement of semiconductor technology over the coming decades. Dry resist provides the high etch resistance and tunable thickness scaling of deposition and development necessary to support high-NA EUV's reduced depth of focus requirements. "Dry resist technology is a breakthrough that shatters the biggest barriers to scaling to future DRAM nodes and logic with EUV lithography," said Rick Gottscho, executive vice president and chief technology officer of Lam Research. "This collaboration brings together Lam's dry resist expertise and cutting-edge solutions with material science capabilities and trusted supply channels from two industry precursor chemical leaders. This important expansion of the dry resist ecosystem paves the way for exciting new levels of innovation and high-volume manufacturing with the technology." First developed by Lam in collaboration with ASML and IMEC, dry resist extends the resolution, productivity, and yield of EUV lithography, thereby addressing key challenges associated with creation of next-generation DRAM and logic technologies. It provides superior dose-to-size and dose-todefectivity performance, enabling higher EUV scanner productivity and lower cost of ownership. In addition, Lam's dry resist process offers key sustainability benefits by consuming less energy and five to ten times less raw materials than traditional resist processes. "Lam's dry resist approach reflects key innovations at the material level and offers a wide range of advantages, including better resolution, improved cost-efficiency and compelling sustainability benefits," said Bertrand Loy, chief executive officer of Entegris. "We are proud to be a part of this innovative collaboration to accelerate dry resist adoption and to be a trusted process materials supplier for customers as they push to create the next generation of semiconductors with this important technology." "Our collaboration with Lam and Entegris to advance dry resists for EUV lithography demonstrates our commitment to support chipmakers as they innovate in materials science," said Jonathan Goff, president of Gelest, a Mitsubishi Chemical Group company. "We've seen EUV demonstrate exceptional value in recent years, and we're pleased to be part of the growing ecosystem to extend its potential."

Tuesday, July 12, 2022

ASM Internaltional launces new 300 mm Vertical batch for LPCVD and ALD

New system addresses 300mm advanced logic/foundry and memory applications with highest productivity and lowest cost of ownership in its class

San Francisco, USA – ASM International N.V. (Euronext Amsterdam: ASM) today introduced the SONORA® vertical furnace system with dual reactor chambers for 300mm wafers. The system’s dual boat reactors produce the highest available throughput in its class, increasing reactor utilization to virtually 100%, while ensuring the lowest capex.


SONORA is named after the blossoming Sonoran desert near Phoenix, Arizona. The look and feel of the SONORA system reflects the colors of the Saturn rockets from the Space Age - a time when semiconductor technology was given a huge boost. It is also the era that gave birth to ASM, and so the SONORA® color scheme creates a link to ASM’s more than 50-year legacy in semiconductor processing equipment. LINK: SONORA_vertical_furnace (asm.com)

“The introduction of the novel SONORA® system is part of our strategy to selectively grow our vertical furnace presence in the market. The new SONORA® ensures that ASM will be strengthening its offering in advanced logic/foundry and memory applications as well as extend our leadership position in the market for More than Moore (such as analog and power) applications,” said Hichem M’Saad, Chief Technology Officer and Member of the Management Board.

The new SONORA® is fully compatible with the original A412™, so existing process recipes are easily transferred, accelerating system qualification and ramp up. System deliveries have begun to multiple customers globally, among them leaders in advanced logic, and power device manufacturing.

ASM’s predecessor A412™ vertical furnace system has a proven track record of more than 1,000 reactors shipped to customers worldwide and over 22 years of maturity in semiconductor manufacturing. The new SONORA® has a novel system architecture that maximizes floor space productivity as well as service area. Its dedicated process modules have individually controlled high purity mini environments. Our innovative gas injection system for low pressure processing provides the best uniformities of deposited films between the individual wafers at larger load sizes. These larger process wafer load sizes combined with the updated control system, new robots, faster wafer cooldown, faster boat exchange modules generate up to 30% more productivity, compared to its predecessor. Higher productivity also results in lower energy and chemical usage per wafer. Special attention was given to the design for serviceability leading to a spacious access for all maintenance activities. The new system has been further modernized with an intuitive graphical user interface, predictive maintenance by advanced control diagnostics, and plug & play installation. Customers can count on the SONORA® delivering increased reliability and better ease of use with production output that achieves better repeatability, productivity, and time utilization.


The A412 PLUS is for 300mm wafers, while the A400 is for 200mm and smaller wafers sizes

Like its predecessor, the SONORA® offers a comprehensive portfolio of process applications including low pressure chemical vapor deposition (LPCVD) processes like doped silicon and silicon nitride films, diffusion processes such as wet oxidation and anneal processes, as well as a leading portfolio of atomic layer deposition (ALD) materials.

Supply chain limited by Russia / US CHIPS Act a game changer

San Diego, CA, July 6, 2022: TECHCET—the electronic materials advisory firm providing business and technology information— is forecasting semiconductor manufacturing materials to top US$65 B for 2022, a healthy 8% above 2021. “Semiconductor demand has remained strong through the first part of the year and average selling prices for materials are trending upwards,” cited Lita Shon-Roy, TECHCET’s President/CEO. In anticipation of slower market conditions, semiconductor materials market growth is currently forecasted to increase just over 2% in 2023 before further improving in 2024. “This is in keeping with cycles in demand and inventory volumes,” said Shon-Roy, as “per the latest TECHCET Critical Materials Reports™,” shown in the figure below.


While demand remains strong in 2022, a number of issues are impacting materials supply and pricing. The Russia/Ukraine region is a major part of the oil and natural gas supply chain, of which energy, specialty gases and helium are dependent. It was a region expected to play a significant role in the supply of helium this year, in addition to supporting neon and fluorocarbon production used for semiconductor manufacturing. Due to the turmoil in this area, alongside related economic sanctions against Russia, supply of these and other key gases have been curtailed, straining supply-chains around the world. Additionally, energy costs have steeply risen creating cost escalation of materials production worldwide.

Monday, July 11, 2022

AlixLabs at AVS ALD ALE 2022 in Ghent, Belgium

AlixLabs AB participated and presented at The AVS 22nd International Conference on Atomic Layer Deposition (ALD 2022) featuring the 9th International Atomic Layer Etching Workshop (ALE 2022) in Ghent, Belgium June 27 to 29.

Yoana gave her oral presentation in session LE1-TuA-4 In-situ Optical Emission Spectroscopy as a Tool to Characterize Cyclic Quasi-Atomic Layer Etching, Yoana Ilarionova, Lund University, Sweden; M. Karimi, AlixLabs, Sweden; D. Lishan, D. Geerpuram, Plasma-Therm LLC, USA; R. Jafari Jam, D. Suyatin, J. Sundqvist, AlixLabs, Sweden; I. Maximov, Lund University, Sweden

Jonas gave an invited talk for TECHCET LLC CA in: AA2-TuM2-1 High ALD Equipment and Precursor Demand and 5-Year Forecast Due to Continued Semiconductor Device Scaling and Fab Expansions.

Dmitry as part of the AVS ALE Scientific Committee moderated the session ALE1-TuA In situ Studies, Mechanisms, and Modeling of ALE. We had a fantastic time and met a lot of old friends and made new ones!


Team photo: Reza Jafari Jam, Jonas Sundqvist, Yoana Ilarionova and Dmitry Suyatin.


Reza and Yoana taking on the ALD / ALE industrial exhibition.


Ghent by night, view from the Beneq party in the main castle - Gravensteen.


Dinner in a Castle.

Boat trip in beautiful Ghent


New slim line of MFCs and Valves from Fujikin.


Dmitry and Jonas met up with AlixLabs' long-time supporters Prof. Fred Roozeboom and Dr. Jacques Kools.


Yoana getting questions from Prof. Steven .M. Geroge himself.


Yoanas title slide.


ALE - the icing on the cake


Angélique Raley from Tokyo Electron USA giving the best ALE talk!


AlixLabs sponsored the Social Media Chair 2022 - please check Twitter by the Social Media Chairs @Mick__geek and @hacp81
 for more famous ALD and ALE people 


AVS ALD ALE 2022 Page: ald2022.avs.org/

New world records: perovskite-on-silicon-tandem solar cells

EPFL and CSEM smash through the 30% efficiency barrier for perovskite-on-silicon-tandem solar cells —setting two certified world records 

Neuchâtel, July 7, 2022 – For the first time, an efficiency of 30% for perovskite-on-silicon-tandem solar cells has been exceeded thanks to a joint effort led by scientists at EPFL’s Photovoltaics and Thin Film Electronics Laboratory in partnership with the renowned innovation center, CSEM. Independently certified by the National Renewable Energy Laboratory (NREL) in the United States, these results are a boost to high-efficiency photovoltaics (PV) and pave the way toward even more competitive solar electricity generation.


Left and right panels: Schematics of perovskite-on-silicon tandems that are either flat or textured on their front side. Upper central panels: scanning electron microscopy images of the two types of devices developed by EPFL and CSEM. Lower central panels: corresponding picture. Credit: D. Türkay (EPFL), C. Wolff (EPFL), F. Sahli (CSEM), Q. Jeangros (CSEM).

More information: LINK

By Abhishekkumar Thakur 

Thursday, June 30, 2022

Back to Basics: Understanding Conformality with Riikka Puurunen – ALD Stories Ep. 14

Back for her second episode, Professor Riikka Puurunen is bringing us back to the basics with a deep dive on conformality. Recorded live from the Harald Herlin Learning Center at Aalto University, Tyler and Riikka talk about the all-important property of ALD. In this episode, Riikka explains the history of conformality in ALD, her recent paper on modeling collaboration, the origins of the PillarHall conformality test structures, and a conversation on open science.


One question came up, when was ALD first used for high aspect-ratio DRAM capacitors? It was 2004 by Samsung Samsung begins making DRAMs on 90-nm process - EETimes

Chipmetrics has commercialized the PillarHall test chip and more information can be found here: Chipmetrics

PillarHall – introduction in SlideShare

PillarHall – introduction in YouTube

PillarHall – short introduction in YouTube

Video: How to use PillarHall test chip

PillarHall Web Site


Chipmetrics at ALD 2022 in Ghent.





Monday, June 27, 2022

ALD/CVD Precursor Markets – Burgeoning Applications

Advanced Logic and Memory Applications require more deposition materials.

San Diego, CA, June 27, 2022: TECHCET—the electronic materials advisory firm providing business and technology information— reports that the Total ALD/CVD precursor market grew 21% in 2021, reaching US$1.39 billion and is forecasted to grow 12% in 2022. The 2022 Precursor market will top US$1.56 billion due to strong industry growth overall, driven by higher production volumes of < 7nm logic devices and higher increased stacking and layers in 3DNAND devices. The transition to EUV lithography for DRAM fabrication will also result in opportunities for increased precursor revenues. More details on these market trends will be revelaed in TECHCET’s presentation given at the 2022 ALD Conference, starting this week in Ghent, Belgium, by Jonas Sundqvist, Ph.D., or can be found in TECHCET’s newly released Critical Materials Reports™ on ALD/CVD Metal Precursors and Dielectric Precursors.


“ALD and CVD are a materials and chemistry rich industry segment with major development efforts in place, with strong prospects for growth, and for the need of new materials”, states Jonas Sundqvist, Sr. Technology Analyst at TECHCET. “New manufacturing solutions designed to meet both cost and performance will rely on ALD precursor materials.”

New materials and related process technologies are being driven by changes in device design. For advanced logic, new precursors are required for transistors to form high-κ gate dielectrics, metal gate electrodes, strain/stress epi of the channel and channel materials. DRAM memory cells continue pushing for higher-κ capacitors. And advanced devices, especially logic, demand improved interconnect wiring, barriers, seed layers, selective via capping and encapsulation, insulators, as well as new and/or more dielectrics to support EUV and advanced ArFi photolithography.

Emerging challenges persist as a result of continued dimensional scaling addressed with materials, especially new materials deposited by ALD. Area selective deposition has been a trend in the past 5 years with a growing R&D community to implement this approach in future devices.

For device specific details on the ALD/CVD Precursor markets & segments get TECHCET’s newly released Critical Materials Report™ here: https://techcet.com/product-category/ald-cvd-precursors/

Friday, June 24, 2022

Hydrogen Peroxide Gas on the road from R&D to HVM for superior HZO films

Device shrinkage, three-dimensional and High Aspect Ratio (HAR) structures, and lower thermal budgets drive the continued search for new materials. A by-product of this search is a need for better oxidants for atomic layer deposition (ALD) and other thin film deposition processes.

While metal usage is rapidly expanding across the periodic table, oxidant choices are few: water, O2, ozone, and oxygen plasma being the leading choices for thin-film processing.

Each oxidant has its strengths and weaknesses. Plasma has limitations with the line of sight and may damage underlying sensitive channel materials or metal interconnects. Ozone is too aggressive with most metals. Water and oxygen are not reactive enough for today’s lower thermal budgets and more demanding precursors. Therefore, new oxidants could help address low-temperature thermal applications and simplify precursor design and selection.

At RASIRC, the investigation began for alternative oxidants when water vapor proved too limited for many ALD applications. Interest in delivering gas generated from hydrogen peroxide liquid began in 2007, with the first commercial sales in 2011 and 2012.

While the perception of the semiconductor industry is one of rapid innovation, the adoption of new technology is a slow process. If successful, it can frequently exceed a decade to reach high volume manufacturing.

Recently, RASIRC presented (April 2022 CMC2022, AZ, USA) benchmarking hydrogen peroxide vs. water and ozone in ALD of ferroelectric hafnium zirconium oxide (HZO). HZO is one of the primary candidate materials for new non-volatile memory using a capacitor device; it can be integrated into both Logic devices and as a stand-alone memory chip similar to Flash memory.

RASIRC and UT Dallas fabricated capacitor structures (MIM) and deposited HZO using water, ozone, or hydrogen peroxide at comparable process conditions.

The first finding was that the growth rate per cycle (GPC, below left) was considerably higher in the hydrogen peroxide case, essentially lowering the overall process time and precursor consumption of rather expensive Hafnium and Zirconium precursors. The hydrogen peroxide HZO films also proved to have a higher density (XRR, below middle) and lower etch rate (wet etch rate below right).


Growth rate per cycles, density by X-ray Reflectivity (XRR) and wet etch rate determination of HZO films deposited by ALD using either hydrogen peroxide, water or ozone.

Higher density metal oxide films are a sure sign of better electrical performance regarding high-k dielectrics and ferroelectrics. First, the hydrogen peroxide films showed a comparably higher effective k-value, lower leakage current (Jg), and could withstand a higher breakdown voltage (VBD), as seen below right. Water results were inferior to both ozone and hydrogen peroxide are not shown for clarity.

Indicative for ferroelectric phase content is a peak at approx. 2T= 30.3 deg and 35.8 (below right). In X-ray diffractograms, when comparing hydrogen peroxide vs. ozone, it[JS1] was shown that the hydrogen peroxide films could show a higher orthorhombic (ferroelectric) phase content at a lower thermal budget, i.e., the onset temperature for crystallization. Even though the orthorhombic ferroelectric phase is metastable over preferred tetragonal and monoclinic HfO2 and ZrO2 most stable phases, this can be understood that the atoms in higher density and purer hydrogen peroxide films will find their optimum positions under given conditions in the lattice faster due to less disturbance from contamination species that has to diffuse out of the lattice before a ferroelectric phase content can crystalize quenching the HZO films into the metastable ferroelectric phase.


Leakage (Jg) vs breakdown voltage (VBD) and gracing incidence x-ray diffraction (GI-XRD) after post deposition anneals for hydrogen peroxide HZO films compared to ozone HZO films.

The promising results above for higher quality ferroelectric films were then proven by complete ferroelectric electric characterization sweeping the current and voltage across the capacitor structures accordingly. As seen below in the P-E hysteresis curves, a clearly defined hysteresis response curve could be verified for hydrogen peroxide HZO films at a lower RTA temperature than for ozone films, the onset of 325 vs. 350 deg C. It may seem like a slight difference, but please keep in mind that the overall thermal budget for device integration in copper interconnect layers is in the range 350 to 390 deg.C depending on layer and technology node, and it is critical to stay below this temperature and as can be seen below this study yielded beautiful ferroelectric hysteresis at 350 deg. C for hydrogen peroxide, whereas ozone films had to go up to the danger zone of 400 deg. To do the same.

P-E hysteresis curves for hydrogen peroxide (right) and ozone (left) ferroelectric HZO films for different RTA thermal budgets.

Finally, TEM analysis showed that films could be downscaled to 5 nm film thickness and most probably below, staying perfectly intact even though a high roughness metal bottom electrode was used. 


High-resolution transmission electron microscopy (HR-TEM) of ferroelectric HZO films deposited by ALD and using RASIRC hydrogen peroxide technology.

To conclude, HZO ferroelectric films showed many advantages when hydrogen peroxide was employed compared to water and ozone:

· Higher device yield as measured in the number of functional ferroelectric capacitors

· Higher density films with lower wet etch rate

· Higher effective k-value

· Faster growth (ALD GPC)

· Lower film thickness for yielding films in electrical testing

· Lower leakage current and higher breakdown voltage

· Crystallization onset for ferroelectric phase content for lower thermal budgets (RTA temperature)

Next you can meet RASIRC at the AVS 22nd International Conference on Atomic Layer Deposition (ALD 2022), will be a three-day meeting 26-29th of July in Ghent Belgium, dedicated to the science and technology of atomic layer-controlled deposition of thin films and now topics related to atomic layer etching. Jeff Spiegelman, CEO of RASIRC will be presenting “Higher Effective Dielectric Constant of Hafnium Oxide When Grown with Hydrogen Peroxide Compared to Water Vapor” in session AF-MoP18 on 27th of June.

About RASIRC

RASIRC transforms liquids into dynamic gases that power process innovation in semiconductor and adjacent markets. By commercializing molecules for lower temperature processes, RASIRC patented technology enables the manufacture of atomic-scale oxides, nitrides, and metals. Innovative products such as BRUTE Peroxide, BRUTE Hydrazine, the Peroxidizer®, and Rainmaker® Humidification Systems are being used to develop solutions for 5G, AI, IOT, and advanced automation.

What makes RASIRC a unique industry leader is our technical expertise and commitment to solving complex industry challenges for our customers. Our team of industry experts has a proven track record of being first to market by efficiently delivering state of the art technology that reduces cost, improves quality, and dramatically improves safety. With our customers at the forefront of all we do, we continue to research, develop, and design innovative products that purify and deliver ultra-pure gas from liquids for the semiconductor and related markets. Contact RASIRC to help solve your complex problems. P: 858-259-1220, email info@rasirc.om or visit http://www.rasirc.com