Beneq unveils Transform(TM), a versatile automated ALD platform for More-than-Moore device fabrication

Combination of thermal and plasma ALD, single wafer or batch processing, and a unique preheating module maximize options for flexible volume production

25 September, 2019, Grenoble, France – Beneq, a leading provider of ALD R&D and production technology, today announced the BENEQ TransformTM, a versatile ALD platform dedicated to More-than-Moore device fabrication.

The brand-new cluster design offers customers unparalleled flexibility by combining both thermal and plasma ALD with single wafer and batch processing, on a single automated platform. Fully compliant with industry quality and SEMI standards the BENEQ TransformTM is a one-stop ALD solution for Power Electronics, MEMS and Sensors, RF, LED, Photonics, and Advanced Packaging applications.

“Among hundreds of application requests brought to us by customers today, we are most excited by GaN devices for RF and Power applications as well as Photonics, both III-V and Silicon,” said Dr. Patrick Rabinzohn, Beneq’s Semiconductor Business Executive. “In particular surface passivation, gate dielectrics, nucleation layers and encapsulation layers are all well addressed with the BENEQ TransformTM.”

Truly Versatile

More than Moore (MtM) applications are evolving at a phenomenal pace. To be competitive manufacturers are adopting advanced thin film technologies. Often, they need to combine surface preparation, interfacial layer and functional layer deposition sequences - all in one tool.

Currently available ALD production systems offer only one type of ALD process - either thermal or plasma enhanced. This creates the need for a versatile tool that supports multiple deposition capabilities.

The BENEQ TransformTM confidently combines thermal and plasma ALD processing, on a single wafer or in batches, while easily configurable. It is capable of surface pre-treatment and can coat substrate materials at wafer sizes from 3 to 8 inches.

It works well for R&D, prototyping, as well as volume production. With the BENEQ TransformTM customers now have the option to run several different ALD processes on multiple devices and applications, all on a single footprint!

The most complete configuration offers two ALD process modules, pre-heating station, surface plasma treatment and wafer cooling.

Designed for the Fab

Unlike ALD production platforms featuring vertical flip functions, the TransformTM loads wafers in a horizontal position and seamlessly integrates with the rest of your production line. Such a loading mechanism is also proven to minimize handling issues, and particle generation associated with non-standard cassette batch loading systems.

The BENEQ TransformTM features a proprietary preheating module that eliminates hours of waiting time and boosts throughput to a whole new level (15 wph @50 nm Al2O3, in thermal mode). Throughput can be further increased by adding up to 2 more process modules, thermal or plasma.

The BENEQ TransformTM produces a wide range of oxides including Al2O3, HfO2, Ta2O5, TiO2, and SiO2, and nitrides such as AIN and TiN. What sets the TransformTM apart from other tools is its ability to scale up throughput and maintain the same uniformity regardless of the temperature, e.g. >400°C.

SEMI Certified

The BENEQ TransformTM shortens cycle time and speeds up fab adaptation by implementing SECS/GEM standards. It is fully compliant with SEMI S2/S8 for environmental, ergonomics and safe operations.

To learn more, visit www.beneq.com/transform.

About Beneq

Beneq is the home of ALD, offering a wide portfolio of equipment products and development services. Today Beneq leads the market with innovative solutions for flexible high-volume manufacturing (BENEQ TransformTM), advanced R&D (TFS 200, R2), ultra-fast high precision spatial ALD coatings (C2R), roll-to-roll thin film coating of continuous webs (WCS 600), and specialized batch production for thicker film stacks (P400, P800). Headquartered in Espoo, Finland Beneq is dedicated to making ALD technology accessible for researchers and providing the invisible advantage in emerging semiconductor applications.

Press Contact
Lie Luo
Beneq
lie.luo@beneq.com

 

Moore's Law graphed vs real CPUs & GPUs 1965 - 2019

(Youtube: https://www.youtube.com/watch?v=7uvUiq_jTLM) Moore's Law has been ridiculously accurate for more than 50 years - how long will it hold up? See in this visualization how the actual transistors in CPUs and GPUs compare to the linear progression of Moore's Law. From the early days of microprocessors, to Intel dominance and the rise of GPUs. 

 

Music: Dizaro - Aurora Borealis https://theartistunion.com/dizarofr 

Data sources: Too many to list here, see wikipedia article: https://en.wikipedia.org/w/index.php?... for Moore's Law, I took a starting point of 8000 in 1975, and worked my way forward and backward from there.

Intel at EECS Colloquium "Moore’s Law Is Not Dead"

Intel’s Jim Keller: “We’re all building nanowires… Intel, TSMC, Samsung” Keller in his "Moore’s Law Is Not Dead" talk at UC Berkeley this week said, “We had planar transistors, we went to FinFET. We’re all building nanowires in the fab. Intel, TSMC, Samsung, everybody’s working on it. There’s a really interesting thing. While the world thinks Moore’s Law’s dead, the fabs and the technologists think it’s not and everybody’s announced now a 10-year roadmap for Moore’s Law.” 

The UC Berkeley EECS Events team has live streamed the entire talk over on YouTube and you can catch up on this fascinating, intimate little talk (below).

 

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By Abhishekkumar Thakur

Strategy Utilizing Electrochemical ALD of Cu-Zn for Enabling Metallization of Sub-10 nm Semiconductor Device Nodes

Strategy Utilizing Electrochemical ALD of Cu-Zn for Enabling Metallization of Sub-10 nm Semiconductor Device Nodes

Aniruddha Joi, Kailash Venkatraman, Kuang-Chih Tso, Dries Dictus, Yezdi Dordi, Pu-Wei Wu, Chih-Wen Pao and Rohan Akolkar

doi: 10.1149/2.0181909 jss ECS J. Solid State Sci. Technol. 2019 volume 8, issue 9, P516-P521 

A novel interface engineering approach, utilizing electrochemical atomic layer deposition (e-ALD) of Cu(Zn) on a Ru liner, is presented for enabling the metallization of sub-10 nm interconnects in future semiconductor devices. Upon thermal treatment, Zn present in the e-ALD Cu layer at ∼0.8 at.% is shown to diffuse through the Ru liner and react with the SiO₂ to form a Zn-silicate layer at the Ru-SiO₂ interface. This ‘self-forming’ interfacial layer provides adhesion enhancement to the Ru-SiO₂ interface and serves as a diffusion barrier retarding Cu diffusion into the SiO₂ layer while enabling void-free gap-filling of high aspect ratio trench structures. Absorption Near-Edge Spectroscopy and Extended X-ray Absorption Fine Structure analyses confirm that the self-formed barrier layer is composed primarily of Zn₂SiO₄. The interface engineering approach utilizing Cu(Zn) presented herein offers several potential advantages over traditional Mn-based self-forming barrier approaches, i.e., scalability to narrower dimensions and minimal impact to interconnect resistance.

Process flow for adhesion testing by scratch and peel method for (a) Cu/Cu-Zn/Ru/SiO2 and (b) Cu/Ru/SiO2 stack without the Zn-containing interlayer.

Picosun Regional Sales and Service Manager, Europe – Dresden, Germany

Picosun is now searching for a Regional Sales and Service Manager for sales and customer support in Central Europe, mainly in German speaking countries. You will be located at the Picosun office in Dresden, Germany, and you will be working closely with customers and Picosun’s European sales, application and service teams.

Main Duties

• Customer support in Central Europe
  ­
• Managing existing customers and building new customer base together with Picosun sales, application and service teams and service subcontractors
  ­
• Developing and maintaining lasting relationships with the customers and other partners
  ­
• Providing responses to customers’ technical enquiries
  ­
• Participating in hands-on selling, in support including repair and servicing the equipment, and in training of the customers

Desired Skills and Experience

• Degree in engineering (e.g. in Electronics, Chemistry or Physics) is preferred
  ­
• Experience in customer service with a strong focus on customer satisfaction
  ­
• Experience in semiconductor processes and equipment
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• Field service and maintenance experience
  ­
• Problem solving
  ­
• Willingness to travel
  ­
• Good communications and interpersonal skills
  ­
• Hands on experience in automation and vacuum systems is a plus

Please send your application and CV to hr@picosun.com. For heading/subject please write “Sales and Service Manager – Germany”.

For additional information, you may contact Christoph Hossbach, christoph.hossbach@picosun.com, +49 1522 44 949 11, General Manager of Picosun Europe GmbH.

The website for the 2020 Area Selective Deposition Workshop is now live!

Developments in nanoelectronics and nanoscale surface modification have continued to drive the need for more elegant and reliable bottom-up area selective deposition (ASD) strategies. Most notably, the semiconductor industry has relentlessly pursued sub-10 nm transistor fabrication for next-generation devices, an endeavor that increasingly relies on selective deposition techniques to facilitate proper material alignment. However, other fields beyond traditional transistor fabrication have also found potential applications for selective deposition. Mixed-material catalysts have consistently shown the benefits of having site-specific material growth, but new optical devices and materials for energy storage have also contributed to an increased focus on developing new strategies for ASD.

Website: https://asd2020.avs.org/

The website for the 2020 Area Selective Deposition Workshop is now live! Come join us next April 2-3 at Stanford to learn about the cutting edge science being performed around the world! #Area_Selective #ASD20 #ALDep #CVDep https://t.co/MJxTgGECkf

— Bent Group (@BentGroup) September 11, 2019

In an effort to help facilitate the progression of ASD techniques, Stanford University is proud to host the 5th Area Selective Deposition Workshop (ASD 2020), held on April 2–3, 2020 in Palo Alto, California USA. Located in the heart of Silicon Valley, this year’s workshop will act as a central event for sharing and discussing the newest developments in ASD by gathering leading experts from both academia and industry. Attendees can expect to participate in talks regarding fundamental challenges related to recent developments in ASD, applications for ASD in next-generation technology, emergent processes for implementing ASD techniques, and new perspectives on metrological and characterization strategies for further understanding persistent mechanistic challenges.

Based on the success of the previous workshops, ASD 2020 will consist of two days of presentations by invited and contributing speakers, as well as a banquet reception and poster session at Stanford University. We hope that guests will also have time to experience some of the local attractions and natural beauty that the Bay Area has to offer!

Industrial Atomic Layer Deposition for Image Sensors and Light Sources

Here is an interview by SEMI (LINK) with Dr. Mikko Söderlund, sales director for Beneq’s semiconductor business. The interview is about trends in ALD applications. Söderlund shared his views ahead of his presentation at SEMI MEMS & Imaging Sensors Summit, 25-27 September, 2019, at the WTC in Grenoble, France. Besides the leading edge 300 mm semi market Beneq sees ALD growth in the following markets.

• Backside Illuminated (BSI) CMOS Image Sensors (CIS)  
• MEMS (actuators and sensors, RF) 
• GaN Power and RF
• Photonics.

Dr. Mikko Söderlund is the Sales Director for Beneq’s semiconductor business. He has more than 20 years of experience in product development, product management, technical sales and business development across Photonics, OLED, and Semiconductor industries. Mikko received his Ph.D. in Micro- and Nanotechnology from the Helsinki University of Technology.

 

LG Technology Ventures & Mitsui Kinzoku-SBI Material Innovation Fund Join Forge Nano Inc. Series A

LOUISVILLE, Colo., Sept. 5, 2019 /PRNewswire/ -- Mitsui Kinzoku-SBI Material Innovation Fund and LG Technology Ventures join in Forge Nano's Series A, bringing the total investment to date to $18M, up from Volkswagen's initial $10M investment announced in January 2019.

The investment will help to accelerate advanced materials for new battery technologies while also broadening applications for atomic-level nano-coatings into a diverse set of new markets. Forge Nano's technology paves the way for entirely new applications for nanoscale surface engineering. Atomic layer deposition (ALD) is an ultra-thin film deposition process that allows precision coatings that are the thickness of one atom to be deposited one layer at a time onto a surface. Forge Nano's ALD enabled core-shell battery materials have been demonstrated to improve the energy density, charge rate, cycle life, and safety of lithium-ion batteries as well as to enable next generation battery technologies.

Beyond batteries, ALD nano-coatings are enabling the next era of higher performance materials for catalysts, 3D printing, thermal fillers, separations and an array of other new market applications. Virtually any application using industrial powders that benefit from tuned surface properties but require precise, uniform and conformal coatings that are chemically bonded to the surface can now use ALD nano-coatings to unlock the next level of performance and value.

"Forge's proprietary nano-coating technology and high-throughput manufacturing processes will open the door for a new stage of high performance materials. A collaboration between Forge Nano and Mitsui Kinzoku will accelerate the production of high performance materials and provide our customers high value products in various market."
-Mitsui Kinzoku-SBI Material Innovation Fund

About Mitsui Kinzoku-SBI Material Innovation Fund: Mitsui Kinzoku-SBI Material Innovation Fund was jointly established in 2017 by Mitsui Kinzoku and SBI Investment. Its investment target is start-up companies with material technologies, material manufacturing and processing know-how which are each likely to generate a business synergy effect with Mitsui Kinzoku's business.

About LG Technology Ventures: LG Technology Ventures was established in 2018 and is the venture capital investment arm of the LG Group of South Korea. The LG Technology Ventures team consists of experienced investors, entrepreneurs, technologists, and industry domain experts. Currently, LG Technology Ventures is managing over $400 million of fund assets and invests in early-stage information technology, automotive, manufacturing, life-sciences, energy, and advanced materials companies.

About Forge Nano: Based in Louisville, Colo., Forge Nano is a global leader in surface engineering and precision nano-coating technology. Forge Nano's proprietary technology and manufacturing processes make angstrom-thick coatings fast, affordable and commercially viable for a wide range of materials, applications and industries. Forge Nano's suite of ALD products and services covers the full spectrum from lab-scale to pilot and commercial-scale manufacturing systems. For more information visit www.ForgeNano.com

ALD PhD Thesises form the dawn of time

Number of PhD thesis' about Atomic Layer Deposition (ALD), according to data collector in the VPHA, up to sept. 2019

Presentations of the EuroCVD 22 – Baltic ALD 16 | 2019 conference for download

Please find below the presentations of the EuroCVD 22 – Baltic ALD 16 | 2019 conference (Luxembourg - June 24 to 28, 2019) that has been published online so far (LINK)

Programme: LINK

Invited speakers:

• D2 Simon_Elliott

Oral presentations:

• D1_Alexandre_Michau
• D1_Andre_Strittmatter
• D1_Astié_Vincent D1_Jan-Lucas_Wree
• D1_J._Ruud_van_Ommen_and_Aris_Goulas
• D1_Lovikka_Ville
• D1_Schilirò_Emanuela
• D1_Tony_Schenk
• D2_Evgeniy_Skopin
• D2_Jun_Yamaguchi
• D2_Milad_Mirabedin
• D3_Beer_Sebastian
• D3_Claudia_de_Melo
• D3_Lisa_McElwee_White
• D3_Nishant_Peddagopu
• D4_Ali_Haider
• D4_Andreas_Kafizas
• D4_David_Munoz-Rojas
• D4_David Zanders
• D4_Heikkilä_Mikko
• D4_Kukli_Kaupo
• D4_Laurent_Souqui
• D4_Lokeshwari_Mohan
• D4_Mario_Ziegler
• D4_Yukihiro_Shimogaki
• D5_Jesse_Saari
• D5_Lorenzo_Bottiglieri
• D5_Scarafagio_Marion
• D5_Julian_Pilz

Abstracts

Abstracts_Oral_Presentations_Day_1
Abstracts_Oral_Presentations_Day_2
Abstracts_Oral_Presentations_Day_3
Abstracts_Oral_Presentations_Day_4
Abstracts_Oral_Presentations_Day_5

Hydrogen diffusion barrier using thermal ALD Al2O3 encapsulation for IGZO TFTs

Amorphous phase In-Ga-Zn-O(IGZO), the typical oxide TFT compositions, has 20 to 50 times higher of field-effect mobility than that of a-Si TFTs and excellent SS (Sub-Threshold Voltage Swing) properties as well as has been very promising to apply for high performance and large area displays and for transparent displays due to their superior properties and good uniformity.

But IGZO TFTs with PECVD SiNx as an encapsulation layer have degraded their superb properties because hydrogen included in SiNx from 20% to 30% has passed through OLED layers and then diffused into IGZO layers.

Comparison of I-V characteristic of a-IGZO TFTs with and without hydrogen diffusio

If this performance degradation by hydrogen diffusion showed in typical I-V graph, SS slop would be decreased, Ioff increased and Vth shifted to negative direction from the original I-V curve.

In case of applying to OLED display with IGZO TFTs using SiNx encapsulation layers including hydrogen, Al2O3 layers would be the very excellent barriers not to degrade IGZO TFTs properties by diffusion of hydrogen from SiNx.

However it is not good choice to apply PEALD Al2O3 using plasma to the first encapsulation layer because oxygen plasma could cause the side effect such as cathode oxidation during the process. So IGZO TFTs and thermal ALD Al2O3 encapsulation layers without plasma damage could be optimum combination.

NCD Lucida GD Series that is thermal ALD batch equipment for mass production to deposit on large substrates up to 6th generation glasses could provide superior Al2O3 hydrogen barriers preventing diffusion into IGZO TFTs from PECVD SiNx encapsulation layers including hydrogen as well as expect to apply to transparent fordable OLED displays by using Al2O3/Polymer/Al2O3 encapsulation layers.

NCD’s LucidaTM GD Series ALD

ALD - Why ASMI is doing so well

[BITS&CHIPS] Grueling work with Intel cemented the company’s position in the atomic layer deposition market, but the emergence of more ALD semiconductor applications was required for that investment to really pay off. The story of why ASM International is doing so well these days.

ASM International is on a roll. While the semiconductor industry has been experiencing a cold spell since mid to late 2018, the Almere-based semiconductor equipment maker has been posting one quarterly sales growth after the other. Last July, front-end sales even reached an all-time record – and the orders keep pouring in. Many of those are for ASMI’s atomic layer deposition (ALD) systems, which at the moment are its best selling product line, CEO Chuck del Prado noted in a conference call with investors, though he added demand is generally healthy in other businesses as well.

Full story: When persistence pays off: why ASMI is doing so well [LINK]

An ASM Pulsar 2000 form the year 2000 (Photo CAE LINK), which was used by many semiconductor fabs for the early development of ALD High-k in both logic and DRAM (Al2O3, ZrO2, HfO2, and others). One of the first high volume manufacturing applications was dielectric layers for GMR and TMR magnetic heads by, e.g., Seagate. The 200 mm single wafer ALD reactor was later made as a 300 mm reactor for the first roll-out of high-k ALD at Intel 45 nm node in 2007. The Pulsar was typical at the beginning used on the Polygon platform. However, now it is available on the new more productive XP series of the ASM platforms (LINK).

Picosun launch new high power Micro Wave Plasma ALD

ESPOO, Finland, 29th August 2019 – Picosun Group, the leading supplier of AGILE ALD® (Atomic Layer Deposition) thin film coating solutions, reports excellent results obtained with its next generation R&D PEALD (plasma-enhanced ALD) technology.

PEALD enables deposition at low temperatures and of several materials that could not be deposited with thermal process only. The drawback of PEALD, however, is damage to the sample surface, caused by ion bombardment. Picosun’s solution to this is remote plasma method, where the plasma source is located high enough above the sample, and the reactive species hitting the surface are radicals, not high-energy ions.

“Picosun’s operating philosophy is based on constant improvement and development, as we want to offer our customers always the best-in-class, leading quality ALD solutions. Our Picoplasma™ equipment has been a hit product in the R&D community since its launch, and we have now upgraded it to a completely new level, to enable even faster processing with superior film quality and purity,” says Dr. Jani Kivioja, CTO of Picosun Group.

Picosun’s next generation PEALD solution is based on remote, high power microwave plasma (MWP). The compact, lightweight plasma generator can be integrated to existing PICOSUN® R&D ALD reactors as such. The new plasma-ALD solution realizes deposition with virtually no added particles, with extremely low metal contamination and with far shorter cycle times compared to the previously used method. Excellent film quality and uniformity have been obtained(*), and the new MWP allows wider operating range (in terms of plasma parameters) which widens also the selection of available ALD processes.

“We are pleased to provide our customers with our new, thoroughly upgraded plasma-ALD solution. There are several important application areas, such as medical devices and MEMS, where substrates are sensitive and require processing at low temperatures. Now we have an ideal solution to this, which will again facilitate ALD’s breakthrough to yet new components and devices,” continues Dr. Kivioja.

(*) Film properties, SiO2 as an example:

 

Wafer size	Dep. temperature	GPC	Film non-uniformity (1σ, 5mm EE, 49pts)	Leakage current (@4MV)	Particles (@>0,25µm)	Metal contamination (Fe, Ti, Cr, Mn, Ni, Cu, Zn atoms)
200 mm	400 °C	0.86 Å/cycle	1.7 % (~10 nm film)	2.1 x 10-8 A/cm2	< 60	< 2 x 1010 /cm2

 

New coating paves the way for low weight lithium metal batteries

A Dynamic, Electrolyte-Blocking, and Single-Ion-Conductive Network for Stable Lithium-Metal Anodes

Zhiao Yu, David G. Mackanic, Wesley Michaels, Jian Qin, Yi Cui, Zhenan Bao

Published:August 26, 2019 DOI:https://doi.org/10.1016/j.joule.2019.07.025

Highlights

• A multifunctional network material is proposed to stabilize lithium-metal anodes
• Improved cyclability is achieved for high-voltage lithium-metal full battery
• Direct lithium-metal processability enables practical application
• Crosslinking chemistry is tuned to study the synergistic stabilizing effects

Implementation of lithium (Li)-metal anodes requires developments to solve the heterogeneity and instability issues of naturally formed solid-electrolyte interphase (SEI). The artificial SEI, as an alternative, enables an ideal interface by regulating critical features such as fast ion transport, conformal protection, and parasitic reaction mitigation. Herein, for the first time, we integrate all of these desired properties into a single matrix, the dynamic single-ion-conductive network (DSN), as a multifunctional artificial SEI. The DSN incorporates the tetrahedral Al(OR) 4 − (R = soft fluorinated linker) centers as both dynamic bonding motifs and counter anions, endowing it with flowability and Li + single-ion conductivity. Simultaneously, the fluorinated linkers provide chain mobility and electrolyte-blocking capability. A solution-processed DSN coating was found to simultaneously hinder electrolyte penetration, mitigate side reactions between Li and electrolyte, maintain low interfacial impedance, and allow homogenous Li deposition. With this coating, long cycle life and high Coulombic efficiency are achieved for Li-metal battery in a commercial carbonate electrolyte.

Surface-Inhibiting Effect in Chemical Vapor Deposition of Boron–Carbon Thin Films from Trimethylboron

Here are deep insights to the understand of conformal boron-carbon films in very high aspect ratio structures by researchers from Linköping University, Sweden. If you don't have the journal access, please check the pre-print (LINK).

Surface-Inhibiting Effect in Chemical Vapor Deposition of Boron–Carbon Thin Films from Trimethylboron

Laurent Souqui, Hans Högberg, Henrik Pedersen
Chem. Mater. 201931155408-5412 LINK

We use the ability to control surface chemistry in chemical vapor deposition (CVD) to deposit boron–carbon films into pores with an aspect ratio of 60:1 without clogging the opening, and into lateral trenches with ratios of up to 2000:1. In contrast to many other surface-controlled CVD processes, operating at low temperatures (100–250 °C) and pressures (10–1000 Pa), we use trimethylboron at a higher temperature (700 °C) and pressure (5000 Pa), affording a surface-inhibited CVD process in hydrogen ambient. We show that the deposition rate is highly dependent on the partial pressure of hydrogen; decreasing proportionally to the logarithm of the partial pressure. The surface-controlled effect is not encountered in argon ambient. We propose that this is explained by a competitive adsorption of growth species and inhibiting dihydrogen or atomic hydrogen species following a Temkin isotherm.

.@CesiumTheDay covering Laurent and @hacp81's recent high aspect ratio B-C #CVDep work #BarryLab pic.twitter.com/9L84lQGOkr

— Scientist Tiger (@sean_t_barry) August 26, 2019

Team Hjulbusarna Motrosport in Swedish Badhotelrallyt 2019

Team Hjulbusarna Motrosport Sven Karlsson/Prof. Henrik Pedersen in a Volvo 244 bursting through the Swedish Badhotellrallyt 2019. BALD Engineering is proud to sponsor the team!

Caught in action during last weekend's rally. #codriver pic.twitter.com/zYjY7C5Tbt

— Henrik Pedersen (@hacp81) August 26, 2019

Towards the finish line! Really good fun in the rally car, as always. #codriver pic.twitter.com/weAMSHjvrN

— Henrik Pedersen (@hacp81) August 24, 2019

Rally time again! No pace notes today either, mainly to enjoy the ride. Two hours waiting before the start pic.twitter.com/w3bbYR7FsJ

— Henrik Pedersen (@hacp81) August 24, 2019

Vapor-deposited zeolitic imidazolate frameworks as gap-filling ultra-low-k dielectrics (Open Access)

Researches at Imec/KU Leuven show that MOF-CVD ZIF films demonstrate dielectric and mechanical characteristics competitive with state-of-the-art porous OSG dielectrics (a low-k organosilicate glass). They also argue that the MOF-CVD integration process may outperform porous OSG dielectrics in future integration schemes because of the gap-filling nature of the deposition process. Please check details below as well as quite some good stuff available in the Supplementary Information

Vapor-deposited zeolitic imidazolate frameworks as gap-filling ultra-low-k dielectrics (Open Access)

Mikhail Krishtab, Ivo Stassen, Timothée Stassin, Alexander John Cruz, Oguzhan Orkut Okudur, Silvia Armini, Chris Wilson, Stefan De Gendt & Rob Ameloot

Nature Communications volume 10, Article number: 3729 (2019) DOI https://doi.org/10.1038/s41467-019-11703-x

Abstract: The performance of modern chips is strongly related to the multi-layer interconnect structure that interfaces the semiconductor layer with the outside world. The resulting demand to continuously reduce the k-value of the dielectric in these interconnects creates multiple integration challenges and encourages the search for novel materials. Here we report a strategy for the integration of metal-organic frameworks (MOFs) as gap-filling low-k dielectrics in advanced on-chip interconnects. The method relies on the selective conversion of purpose-grown or native metal-oxide films on the metal interconnect lines into MOFs by exposure to organic linker vapor. The proposed strategy is validated for thin films of the zeolitic imidazolate frameworks ZIF-8 and ZIF-67, formed in 2-methylimidazole vapor from ALD ZnO and native CoOx, respectively. Both materials show a Young’s modulus and dielectric constant comparable to state-of-the-art porous organosilica dielectrics. Moreover, the fast nucleation and volume expansion accompanying the oxide-to-MOF conversion enable uniform growth and gap-filling of narrow trenches, as demonstrated for 45 nm half-pitch fork-fork capacitors.

The preparation method is described in detail in the paper and includes a number of PVD, ALD and CVD process steps as follows:

Preparation of MOF-CVD precursor layers on blanket wafer

The layers of ALD ZnO and PVD Co were prepared on highly-doped p⁺⁺ Si substrates. ALD ZnO deposition was realized at 120 °C by 30 cycles of diethyl zinc (DEZ)/water precursor pulses separated by N₂ purge steps (Savannah S200, Veeco Instruments Inc.). PVD Co film was sputtered on Ar-plasma precleaned Si substrate (NC7900, Canon Anelva Corp.).

Preparation of MOF-CVD precursor layer on patterned wafer

The fork–fork capacitor structures featuring 45 nm line/space width were prepared on p-type 300 mm Si-wafers according to a modified integration route (Supplementary Fig. 2) based on using sacrificial amorphous carbon (a-C) layer to form a pattern of passivated copper wires. The initial stack of layers above the substrate consisted of 1000 nm SiO_x, 30 nm SiCN diffusion barrier, 90 nm a-C, and a multilayer hard-mask stack. After formation of a device pattern in the top positive resist coating with 193 nm immersion lithography, the pattern features were then transferred into the underlying a-C film. Following the wet removal of hard-mask residues, the exposed surfaces of a-C/SiCN were coated with 3 nm ALD TiN. The subsequent metallization steps included sputtering of 20 nm Cu seed, electroplating of 500 nm Cu, and chemical mechanical polishing down to the a-C film. The removal of a-C sacrificial layer was done in He/H₂ remote plasma. Afterward, the metallic lines were passivated with a non-conformal 3 nm PECVD SiCN barrier layer and then additionally covered with a conformal 2 nm PEALD SiN_x film. The deposition of CVD Co was realized at 200 °C on VECTOR Excel tool cluster (Lam Research Corp.). Before deposition of CVD Co on the SiCN/SiN_x-passivated Cu pattern, the growth conditions were optimized on blanket SiN_x surface to obtain 4.0 ± 1.0 nm Co layer across 300 mm wafer (assessed by RBS). ALD ZnO deposition on the metal lines passivated with SiN_x layer was performed by applying the same growth conditions as used on blanket wafers (see above).

Vapor-phase conversion process (MOF-CVD)

For the conversion to appropriate ZIF layer, samples with precursor layers were placed in a glassware reactor (Supplementary Fig. 1). The glassware reactor was connected to a vacuum pump via a manual valve. Upon assembly the reactor was checked for leaks. The glass tube containing 2-methylimidazole powder (99%, CAS #693-98-1, Sigma-Aldrich) was connected to one of the ports of the glassware reactor via another manual valve. The whole setup was placed in a furnace preheated at 120 °C. After the temperature stabilization (15 min), the valve to the vacuum pump was opened, and the reactor was evacuated until pressure stabilization below 10 mbar. The vacuum valve was then closed and the valve to the 2-methylimidazole tube opened. The exposure of samples to vapors of 2-methylimidazole was set to 120 min, after which the precursor valve was closed, and the sample area of the reactor was kept under dynamic vacuum for 15 min to remove the unreacted organic linker from the sample surface and pores of formed ZIF films (activation). Finally, the reactor was let to cool down before the samples could be taken out for further characterization.

Two proposed routes for the integration of ultra-low-k MOF dielectrics in on-chip interconnects via the MOF-CVD process. Routes A and B differ in how the MOF precursor layer is formed around the interconnect wires. In Route A, metal oxide to be converted into MOF is deposited after passivation of metal lines, while Route B relies on selective conversion of metal oxide formed through controlled oxidation of the metal pattern From: Vapor-deposited zeolitic imidazolate frameworks as gap-filling ultra-low-k dielectrics

Validation of the MOF-CVD process and characterization of the deposited MOF thin films. a Schematic representation of the conversion of ALD ZnO and native CoO_x to ZIF-8 and ZIF-67 and the corresponding increase in thickness as measured by spectroscopic ellipsometry (SE) and from SEM cross-sectional images. b Baseline-corrected GI-XRD diffraction patterns together with simulated powder diffractogram for ZIF-8. c Ellipsometric porosimetry with methanol and water as adsorbates. The amount of adsorbate corresponds to the change of the ellipsometric angle Delta (@633 nm) relative to the value recorded before introducing probe molecules. The values are normalized against the Delta change measured at methanol saturation pressure. d AFM topography images of MOF-CVD films: ZIF-8 (purple frame) and ZIF-67 (light blue frame) From: Vapor-deposited zeolitic imidazolate frameworks as gap-filling ultra-low-k dielectrics

Open Access This article is licensed under a Creative Commons Attribution 4.0 International License, which permits use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license, and indicate if changes were made. The images or other third party material in this article are included in the article’s Creative Commons license, unless indicated otherwise in a credit line to the material. If material is not included in the article’s Creative Commons license and your intended use is not permitted by statutory regulation or exceeds the permitted use, you will need to obtain permission directly from the copyright holder. To view a copy of this license, visit http://creativecommons.org/licenses/by/4.0/.

Micron has started volume production of 10 nm-class DRAM (1z nm)

Micron announced on Thursday that it had started volume production of memory chips using its 3rd Generation 10 nm-class fabrication technology (also known as 1Z nm). The first DRAMs to be made using Micron’s 1Z nm process are 16 Gb monolithic DDR4 and LPDDR4X devices. 

The company claims that its 16 Gb DDR4 device consumes 40% less power than two 8 Gb DDR4 DRAMs (presumably at the same clocks). Meanwhile, Micron’s 16 Gb LPDDR4X ICs will bring an up to 10% power saving. One of the first products to use the company’s 16 Gb DDR4 devices will be high-capacity (e.g., 32 GB and higher) memory modules for desktops, notebooks, and workstations.

Source: Anandtech LINK

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By Abhishekkumar Thakur

ALD at V2019 in Dresden October 9th to 10th with Keynote by Dr. Suntola, Millenium Technology Prize winner of 2018

We are very happy to announce the almost complete program for the ALD Workshop at V2019 in Dresden, October 9th to 10th organized by EFDS:

• Keynote Lecture to Atomic Layer Deposition by Dr. Tuomo Suntola, Millenium Technology Prize 2018
• Presentations to “Atomic Layer Deposition” Program (Link) 
• Workshop 5: October 9 – October 10, 2019Industrial Exhibition for Surface Technologies and adjacent Branches : Medical, Optics, Energy and ALD
• Industrial Evening & V-Dinner
• Information to Industrial International Funding

Downloads●  Profile of V2019 [PDF]
●  Time Schedule of V2019 [PDF]
●  Industrial Exhibition for Exhibitors [PDF]
●  Program to Atomic Layer Deposition (engl. Language) [PDF]
●  List of Exhibitors (Link)
●  Information for students and junior employees [PDF]
●  Information for job advertisements [PDF]

Lecutues | 2019.10.09 - FREE FOR ALL - No registration fee required

Lecture, part I


"45 years of ALD"
Prof. Tuomo Suntola, Picosun Oy, Espoo, Finland - Millenium Technology Prize 2018Abstract [PDF]
© Picture: By courtesy of Technology Academy Finland.

Lecture, part II
"Current and Emerging ALD Processes, Precursors and Applications in High Volume Production"
Jonas Sundqvist, Fraunhofer-Institut für Keramische Technologien und Systeme IKTS, Dresden, Germany
Abstract [PDF]

Presenations | 2019.09.10 & 2019.10.10

"Advances in quantitative characterization of thin films with help of AFM-based methods"
Malgorzata Kopycinska-Müller, Fraunhofer-Institut für Keramische Technologien und Systeme IKTS, Dresden, Germany
Abstract [PDF]

"In situ metrology for Atomic Layer Deposition processes"
Martin Knaut, Technische Universität Dresden, IHM, Dresden, Germany
Abstract [PDF]

 
"Conformality in Atomic Layer Deposition"
Véronique Cremers, Plasma Electronic GmbH, Neuenburg, Germany
Abstract [PDF]

"Oxides for Electronics"
Mari Napari, Department of Materials Science and Metallurgy, University of Cambridge, Cambridge, UK
Abstract [PDF]

 
"Atomic Layer Deposition of Indium Nitride using Hexacoordinated In–N Bonded Precursors and NH3 Plasma"
Nathan O´Brian, Linköping University, Linköping, Sweden
Abstract [PDF]

 
"Multi-layer Stacked ALD Coating for Hermetic Encapsulation of Implantable Biomedical Microdevices"
Christoph Hossbach, Picosun group, Espoo, Finnland
Abstract [PDF]

 
"Fast plasma ALD employing de Laval Nozzles for high velocity precursor injection"
Abhishekkumar Thakur, Plasway-Technologies GmbH, Dresden, Germany
Abstract [PDF]

More to follow...

Available: VPHA poster at AVS ALD 2019

[VHPA: aldhistory.blogspot.com] The VPHA poster on the ALD doctoral thesis list was updated, as planned, for the AVS 19th International Conference on Atomic Layer Deposition (ALD 2019) featuring the 6th International Atomic Layer Etching Workshop (ALE 2019), https://ald2019.avs.org/. Figure 1 of the poster below. The poster will be included in the AVS collections, and it is currently available via the http://vph-ald.com website.

• Link to poster: here 
• Link to abstract: here
• Link to supplementary information - with full author list: here

The doctoral thesis collection is still certainly missing entries. Suggestions for additions are welcome. Please preferably provide the information via the Google Sheets file, which all can edit: VPHA-thesis-to-be-added.

5th day of #CVDALD2019 has started (longish conference). Here, once more, the #VPHA #ALDep thesis poster with two of the many authors, myself and @JRvanOmmen, posing next to it. We have already found that there are theses from Switzerland and Korea that are missing from the list. pic.twitter.com/Vj62lhcGiu

— Riikka Puurunen (@rlpuu) June 28, 2019

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Virtual Project on the History of ALD (VPHA) - in atmosphere of Openness, Respect, and Trust

ALDFun Workshop at TU Delft (NL) are now online

The presentations form the ALDFundamentals workshop organized at TU-Delft (NL) as videos of speaker and Powerpoint are now available online.

ALDFundamentals: Presentations LINK

Looking back at a great workshop "Fundamentals of #ALDep: Modelling & Validation" @ChemeTUDelft. Thanks to all speakers for great talks, and to all participants for lively discussions. A big thank you to @FatemehHashemi_ for organizing this day so well! #ALDFun (1/2) https://t.co/Hr9aYbWoXY

— Ruud van Ommen (@JRvanOmmen) July 3, 2019

Review of AVS ALD2019 by Prof. Kessels

Please finde here a review of AVS ALD2019 / ALE 2019 by Prof. Kessels, whom recieved the ALD Innovator Award and gave a presentation at the plenary session on Monday morning.

Report: Atomic Limits LINK
Presentation download: Atomic Scale Processing: from Understanding to Innovation LINK

BALD Engineering ALD News blog see doubled visitor traffic last 18 months

The overall monthly visitors to the News Blog doubled in 2018 from about 10,000 to about 20,000. Growth was seen in both the main blog section for ALD Technology news and the ALD Financial News.

The recent trend is increased traffic from India and China. India and China used to contribute to less than 10% of the visitor traffic, but recently they account for more than 25%. The typical monthly geographical origin of the visitors are:

• 25% USA
• 25% India and China
• 25% Germany, France, Russia, Japan, Israel, Finland, and South Korea
• 25% Rest of the world

Please contact Jonas Sundqvist (jonas.sundqvist@baldengineering.com) for :

• Banner sponsoring
• Promotional blogs & press releases
• Announcing ALD events (conferences, workshops, exhibitions)
• Become a guest blogger

Lam Research Adds Global Wafer Stress Management Solutions to Portfolio to 3D NAND Scaling

FREMONT, Calif., Aug. 07, 2019 (GLOBE NEWSWIRE) — Lam Research Corp. (Nasdaq: LRCX) today announced new solutions to help customers increase chip memory density, which is needed for applications such as artificial intelligence and machine learning. With the introduction of VECTOR® DT for backside deposition and EOS® GS wet etch for film removal on backside and bevel, Lam continues the expansion of its stress management product portfolio.

While high aspect ratio deposition and etching are key enablers for 3D NAND scaling, the combination of increasing the number of layers while controlling wafer bow due to cumulative stress in the film stack has become a major challenge. Such stress-induced wafer distortion has a significant impact on wafer yield due to degraded lithography depth-of-focus, overlay performance, and structural distortion. To improve overall yield, wafer-, die-, and feature-level stresses need to be carefully managed at various steps throughout the entire manufacturing process flow, at times potentially resulting in the preclusion of otherwise performance-enhancing process steps due to their stress characteristics.

Designed to provide a cost-effective solution for controlling wafer bow in 3D NAND manufacturing, the VECTOR DT system is the newest addition to Lam’s plasma-enhanced chemical vapor deposition (PECVD) product family. VECTOR DT provides a single-step solution for wafer shape management by depositing a tunable counter-stress film on the back of the wafer without contacting the front side, thereby enabling improved lithography results, reduced bow-induced failures, and integration of high performance but highly stressed films. With strong customer adoption since its debut, the VECTOR DT installed base continues to grow as customers are transitioning to more than 96 layers.

In addition to depositing a counter stress film, Lam provides the flexibility to remove backside films, allowing customers to adjust wafer stress during the 3D NAND manufacturing flow. Lam’s EOS GS wet etch product complements the VECTOR DT by simultaneously removing backside and bevel films with industry-leading wet etch uniformity, while fully protecting the wafer front side. As part of a comprehensive wafer bow management solution, Lam’s EOS GS has also been adopted by memory manufacturers worldwide.

“As our customers continue to dramatically increase the number of memory cell layers, the cumulative stress and wafer bow can exceed the limits of a lithography tool. Minimizing stress-induced distortion is critical for achieving the desired yield and enabling the cost-per-bit roadmap,” said Sesha Varadarajan, senior vice president and general manager of the deposition product group at Lam Research. “With the addition of the VECTOR DT and EOS GS systems, we are expanding our stress management solutions portfolio for managing global stress in support of our customers’ vertical scaling roadmap.”

Source: Lam Research LINK

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By Abhishekkumar Thakur

Atomic Layer Deposition of Emerging 2D Semiconductors, HfS2 and ZrS2, for Optoelectronics

Miika Mattinen from Prof. Mikko Ritala's group, University of Helsinki, reports the ALD growth of 2D HfS2 and ZrS2—the potential rivals of the hot favorite 2D semiconductors MoS2 and WSe2. 

Abstract: Semiconducting 2D materials are studied intensively because of their promising performance in diverse applications from electronics to energy storage and catalysis. Recently, HfS2 and ZrS2 have emerged as potential rivals for the commonly studied 2D semiconductors such as MoS2 and WSe2, but their use is hindered by the difficulty of producing continuous films. 

Herein, we report the first atomic layer deposition (ALD) processes for HfS2 and ZrS2 using HfCl4 and ZrCl4 with H2S as the precursors. We demonstrate the deposition of uniform and continuous films on a range of substrates with accurately controlled thicknesses ranging from a few monolayers to tens of nanometers. The use of semiconductor industry-compatible precursors and temperatures (approximately 400 °C) enables facile upscaling of the process. The deposited HfS2 and ZrS2 films are crystalline, smooth, and stoichiometric with oxygen as the main impurity. 

Source : Atomic Layer Deposition of Emerging 2D Semiconductors, HfS2 and ZrS2, for Optoelectronics

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By Abhishekkumar Thakur

ALD online education course Summer 2019 by Prof. Han-Bo-Ram Lee, of Incheon National University.

Here is an excellent source of ALD online education by Prof. Han-Bo-Ram Lee, of Incheon National University.

ALD Class in English 2019 Summer
1. Review of Fundamentals (https://lnkd.in/fqjD9_N) 
2. Introduction of ALD (https://lnkd.in/fKdaq46) 
3. Basic Growth Characteristics of ALD (https://lnkd.in/fAzq9DY) 
4. ALD Precursors & Reactants (https://lnkd.in/frDVvXA) 
5. ALD Systems (https://lnkd.in/fyYbzGZ) 
6. ALD Applications for Si Devices (https://lnkd.in/fCW6cDd) 
7. Atomic Crafting Beyond ALD (https://lnkd.in/fJZEQEH)

ASM International NV 2019 Q2 Results - Earnings Call

ASM International N.V. (Euronext Amsterdam: ASM) today reports its second quarter 2019 operating results (unaudited) in accordance with IFRS.

• New orders were €373 million. Excluding €103 million related to the patent litigation settlement new orders were €270 million.

• Net sales for the second quarter 2019 were €363 million. Excluding €103 million related to the patent litigation settlement, net sales were €260 million and increased 5% compared to the previous quarter.

• Gross profit margin was 59.0% in Q2 2019 and 42.8% excluding the patent litigation settlement compared to 41.3% in the previous quarter.

• Operating result increased to €150 million. Excluding the patent litigation settlement operating result was stable at €47 million compared to the previous quarter.

• Normalized net earnings, including the patent litigation settlement, for the second quarter 2019 increased by €72 million compared to Q1 2019. Besides the positive impact of the patent litigation settlement net earnings in Q2 were negatively impacted by adverse currency effects and the increase in taxes due to the full utilization of the remaining net operating losses in the Netherlands. Results from investments decreased to €2 million.

ASM INTERNATIONAL N.V. REPORTS SECOND QUARTER 2019 RESULTS

"Logic bookings increased compare to Q1 and were primarily driven by 10 nanometer related demand and early tools for 7nm. Foundry orders decreased so much compared to the record high level in Q1 and primarily reflected its further investments into 5 nm node. Memory orders during the second quarter increased compared to a low level in Q1 mainly driven by DRAM, The increased DRAM bookings during the quarter were largely related to specific customer demands, and in our view not indicative of a broad base recovery in spending in this segment. 

Looking at the bookings by product line, while ALD was again our largest product line, we also experienced healthy demand in for instance LPCVD and Epi business in the quarter. In terms of product lines ALD continues to be a solid driver for our company. 

The long-term outlook remains strong. The current most advanced nodes 10-nanometer in logic and 5-nanometer in foundry have been a major inflection in terms of ALD needs, driven by further miniaturization, new materials, and by new more complex device architecture, that are on the industry's roadmap, the need for additional ALD applications at future nodes will only further increase. This will support continuing healthy growth in these segments of the ALD market over the longer-term. 

Our focus in the memory segments of the ALD market remains the expansion of our swift available market, or so called SAM. We continue to invest in broadening our portfolio of ALD applications for future DRAM and 3D NAND device technology. In 3D NAND for instance as the industry moves to higher stacks of the 96 layers, 128 layers and beyond, the increasing device complexity and high aspect ratio structures will stimulate the needs for a higher number of single wafer ALD applications . We are targeting to increase our SAM and our share of the memory market step-by-step, as customers transition to next generation devices over the next years."

-CEO Charles del Prado

ASM International NV's (ASMIY) CEO Charles del Prado on Q2 2019 Results - Earnings Call Transcript by Seeking Alpha | LINK

Investor presentation Q2 2019 | LINK

Analyts reports:

ASM International: Strong Headwinds We Didn't Hear In Conference Call
Seeking Alpha: ASM International NV (OTCQX:ASMIY) reported 2Q earnings on July 23, 2019. According to financial disclosures, net sales for the second ...