AtomicLimits: Atomic Layer Etch Carves the Path to More Efficient Computing

Here is a good blog post by Intermolecular at atomic Limits on advances in ALE and future prospects

• High-volume manufacturing (HVM) of atomic-scale semiconductor devices requires new approaches to deposit and etch materials in complex nano-architectures. Next-generation logic devices, including gate all-around (GAA) transistors and the conductors that link them together, must be engineered with atomic precision.
• The selective removal of materials also enables efficient integration schemes which mitigate costly lithography issues and could lead to new ways to make memory devices. Thermal atomic layer etching (ALE) of metals, dielectrics, and semiconductors provides atomically precise isotropic etching in 3D device structures. 
• ALE processes must be selective to the materials to be etched, have robust process parameter windows, and leave minimal residues or surface damage. The complexity of experimental design requires close collaboration between chemists, process & integration engineers, and device designers, as well as new methods for combinatorial etch testing and smart data handling.
• Meeting these requirements will ensure high device yields, a necessary outcome for success in the extremely competitive semiconductor market.

LINK: Atomic Layer Etch Carves the Path to More Efficient Computing – Atomic Limits

Examples of ALE of a trench structure, with poor kinetic control of the ALE process leading to inconsistent etch (top), or good control of the ALE process leading to a surface-limited reaction and consistent etching at high aspect ratio (bottom). (Source: Intermolecular, AtomicLimits.com)