Thursday, June 18, 2015

Graphene Benchmarked to TaN as Cu Diffusion Barrier for Ultimate Interconnect Scaling

Here is an interesting paper from VLSI2015 in Kyoto Japan (Symposia of VLSI Technology and Circuits ) from Stanford and Univ. of Wisconsin–Madison wrapping graphene around the Cu lines instead of tantalum nitride barriers for future scaled interconnects. It will be interesting to see more solid data once these become available. As you probably read this many times - graphene sucks as a future channel material for future CMOS since it does not have band gap and there are various attempts to solve this problem - we just have to use graphene for something and especially in semiconductor technology. However, in Cu interconnects you could´t care less about the lack of a bandgap and it would be sort of funny and maybe a bit unexpected if graphene were to be implemented in BEOL instead of FEOL.


H.-S. P. Wong, Professor of Electrical Engineering

“Graphene has been promised to benefit the electronics industry for a long time, and using it as a copper barrier is perhaps the first realization of this promise,” Wong said.

Check out this article in Stanford Engineering for more details and answers from the researchers: http://engineering.stanford.edu/news/stanford-engineers-find-simple-yet-clever-way-boost-chip-speeds


VLSI 2015 Abstract:

Cu Diffusion Barrier: Graphene Benchmarked to TaN for Ultimate Interconnect Scaling
L. Li*, X. Chen*, C.-H. Wang*, S. Lee*, J. Cao*, S. S. Roy**, M. S. Arnold** and H.-S. P. Wong*, *Stanford Univ. and **Univ. of Wisconsin–Madison, USA 

The advantages of graphene diffusion barrier are studied and benchmarked to the industry-standard barrier material TaN for the first time. Even when the wire width is scaled to 10 nm, the effective resistivity of the Cu interconnect is maintained near the intrinsic value of Cu using a 3 Å single layer graphene (SLG) barrier. In the time dependent dielectric breakdown (TDDB) test, 4 nm multi-layer graphene (MLG) gives 6.5X shorter mean time to fail (MTTF) than 4 nm TaN. However when the barrier thickness is reduced, 3 Å single-layer graphene (SLG) gives 3.3X longer MTTF than 2 nm TaN, showing that SLG has better scaling potential. The influences of graphene grain size and various transfer methods are presented for further improving the SLG barrier performance.

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