Thursday, May 14, 2015

LAM Research MMP Technology Etch for Advanced Memory

"MMP technology enables atomic layer etching (ALE), providing extendibility and repeatability with atomic-scale fidelity"

Atomic-scale fidelity - Can you put it more beautiful?

LAM Research has developed a mixed-mode pulsing (MMP) technology that enables critical conductor etch for advanced memory like 3D NAND and DRAM. The technology is available for their Kiyo Product F Series chambers

LAM Research reports: The Kiyo F Series delivers high productivity while minimizing variability for advanced memory applications. Lam's MMP technology provides advanced profile and CD control for vertical profiles with good selectivity and tuning controls for consistent etch depths. These capabilities enable higher trim rate for 3D NAND staircase etch along with excellent repeatability, which is needed for manufacturing environments. Symmetric chamber design and radial tuning provide best-in-class uniformity, which is essential for minimizing CD variability. 

In addition, for new generations of advanced memory as well as logic devices, MMP technology enables atomic layer etching (ALE), providing extendibility and repeatability with atomic-scale fidelity.

By stacking memory cells vertically, NAND flash manufacturers can pack more storage capacity onto a smaller device, ease lithography requirements, and reduce manufacturing cost per bit. For multilayer 3D NAND structures, critical conductor etch processes include staircase etch and high aspect ratio (HAR) mask open for vertical channels. This mask open is crucial since it defines the CD and CD uniformity for subsequent etching of the vertical transistor channels. For staircase etch, equal-width "steps" are created at the edge of each dielectric-film pair throughout the 3D stack to form a staircase-shaped structure. Because of extensive repetition of these steps during device processing, etching at high throughput with stringent process control is vital. CD variability must be tightly managed since wordline contacts may otherwise miss landing on a step that is too narrow or uneven. 

Just for visualisation for the reader of this blog, here the advance HAR etch that is required and mastered by LAM MMP Technology described in a reverse engineering cross section by Chipworks from a SAMSUNG V-NAND Flash array (published here)

LAM Research further reports with respect to DRAM : For advanced DRAM devices, depth control is a key parameter, particularly for HAR front-end-of-line silicon etch applications. Concerns include aspect ratio loading, where etch rates vary because of differences in feature dimensions, and depth loading, where different etch depths may occur due to pattern density variations.

More detailed information on mixed-mode plasma pulsing (MMP) can be found in this patent by LAM Research:

Mixed mode pulsing etching in plasma processing systems US 20130168354 A1

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